diff options
author | Stephen Hemminger <shemminger@osdl.org> | 2005-08-16 17:00:54 -0400 |
---|---|---|
committer | Jeff Garzik <jgarzik@pobox.com> | 2005-08-16 17:03:13 -0400 |
commit | 050ec18a35f3106437da8e9c55e441c076c7b93e (patch) | |
tree | e0de01c46c50d466e515a8459807bb491c4af767 /drivers/net/skge.c | |
parent | ab707da7cf0a1a1d27c6021356cfb3692cf1bd26 (diff) |
[PATCH] skge: stop bogus sensor messages
Some versions of the Marvell yukon generate bogus sensor warning interrupts.
The driver would flood log with these messages. Handle this situation
cleanly by masking away at boot time.
Fixes: http://bugs.gentoo.org/show_bug.cgi?id=87182
Signed-off-by: Stephen Hemminger <shemminger@osdl.org>
drivers/net/skge.c | 24 ++++++++++--------------
drivers/net/skge.h | 8 ++++++--
2 files changed, 16 insertions(+), 16 deletions(-)
Signed-off-by: Jeff Garzik <jgarzik@pobox.com>
Diffstat (limited to 'drivers/net/skge.c')
-rw-r--r-- | drivers/net/skge.c | 24 |
1 files changed, 10 insertions, 14 deletions
diff --git a/drivers/net/skge.c b/drivers/net/skge.c index f15739481d62..9ff1261f07ca 100644 --- a/drivers/net/skge.c +++ b/drivers/net/skge.c | |||
@@ -2670,18 +2670,6 @@ static void skge_error_irq(struct skge_hw *hw) | |||
2670 | /* Timestamp (unused) overflow */ | 2670 | /* Timestamp (unused) overflow */ |
2671 | if (hwstatus & IS_IRQ_TIST_OV) | 2671 | if (hwstatus & IS_IRQ_TIST_OV) |
2672 | skge_write8(hw, GMAC_TI_ST_CTRL, GMT_ST_CLR_IRQ); | 2672 | skge_write8(hw, GMAC_TI_ST_CTRL, GMT_ST_CLR_IRQ); |
2673 | |||
2674 | if (hwstatus & IS_IRQ_SENSOR) { | ||
2675 | /* no sensors on 32-bit Yukon */ | ||
2676 | if (!(skge_read16(hw, B0_CTST) & CS_BUS_SLOT_SZ)) { | ||
2677 | printk(KERN_ERR PFX "ignoring bogus sensor interrups\n"); | ||
2678 | skge_write32(hw, B0_HWE_IMSK, | ||
2679 | IS_ERR_MSK & ~IS_IRQ_SENSOR); | ||
2680 | } else | ||
2681 | printk(KERN_WARNING PFX "sensor interrupt\n"); | ||
2682 | } | ||
2683 | |||
2684 | |||
2685 | } | 2673 | } |
2686 | 2674 | ||
2687 | if (hwstatus & IS_RAM_RD_PAR) { | 2675 | if (hwstatus & IS_RAM_RD_PAR) { |
@@ -2712,9 +2700,10 @@ static void skge_error_irq(struct skge_hw *hw) | |||
2712 | 2700 | ||
2713 | skge_pci_clear(hw); | 2701 | skge_pci_clear(hw); |
2714 | 2702 | ||
2703 | /* if error still set then just ignore it */ | ||
2715 | hwstatus = skge_read32(hw, B0_HWE_ISRC); | 2704 | hwstatus = skge_read32(hw, B0_HWE_ISRC); |
2716 | if (hwstatus & IS_IRQ_STAT) { | 2705 | if (hwstatus & IS_IRQ_STAT) { |
2717 | printk(KERN_WARNING PFX "IRQ status %x: still set ignoring hardware errors\n", | 2706 | pr_debug("IRQ status %x: still set ignoring hardware errors\n", |
2718 | hwstatus); | 2707 | hwstatus); |
2719 | hw->intr_mask &= ~IS_HW_ERR; | 2708 | hw->intr_mask &= ~IS_HW_ERR; |
2720 | } | 2709 | } |
@@ -2948,12 +2937,20 @@ static int skge_reset(struct skge_hw *hw) | |||
2948 | else | 2937 | else |
2949 | hw->ram_size = t8 * 4096; | 2938 | hw->ram_size = t8 * 4096; |
2950 | 2939 | ||
2940 | hw->intr_mask = IS_HW_ERR | IS_EXT_REG; | ||
2951 | if (hw->chip_id == CHIP_ID_GENESIS) | 2941 | if (hw->chip_id == CHIP_ID_GENESIS) |
2952 | genesis_init(hw); | 2942 | genesis_init(hw); |
2953 | else { | 2943 | else { |
2954 | /* switch power to VCC (WA for VAUX problem) */ | 2944 | /* switch power to VCC (WA for VAUX problem) */ |
2955 | skge_write8(hw, B0_POWER_CTRL, | 2945 | skge_write8(hw, B0_POWER_CTRL, |
2956 | PC_VAUX_ENA | PC_VCC_ENA | PC_VAUX_OFF | PC_VCC_ON); | 2946 | PC_VAUX_ENA | PC_VCC_ENA | PC_VAUX_OFF | PC_VCC_ON); |
2947 | /* avoid boards with stuck Hardware error bits */ | ||
2948 | if ((skge_read32(hw, B0_ISRC) & IS_HW_ERR) && | ||
2949 | (skge_read32(hw, B0_HWE_ISRC) & IS_IRQ_SENSOR)) { | ||
2950 | printk(KERN_WARNING PFX "stuck hardware sensor bit\n"); | ||
2951 | hw->intr_mask &= ~IS_HW_ERR; | ||
2952 | } | ||
2953 | |||
2957 | for (i = 0; i < hw->ports; i++) { | 2954 | for (i = 0; i < hw->ports; i++) { |
2958 | skge_write16(hw, SK_REG(i, GMAC_LINK_CTRL), GMLC_RST_SET); | 2955 | skge_write16(hw, SK_REG(i, GMAC_LINK_CTRL), GMLC_RST_SET); |
2959 | skge_write16(hw, SK_REG(i, GMAC_LINK_CTRL), GMLC_RST_CLR); | 2956 | skge_write16(hw, SK_REG(i, GMAC_LINK_CTRL), GMLC_RST_CLR); |
@@ -2994,7 +2991,6 @@ static int skge_reset(struct skge_hw *hw) | |||
2994 | skge_write32(hw, B2_IRQM_INI, skge_usecs2clk(hw, 100)); | 2991 | skge_write32(hw, B2_IRQM_INI, skge_usecs2clk(hw, 100)); |
2995 | skge_write32(hw, B2_IRQM_CTRL, TIM_START); | 2992 | skge_write32(hw, B2_IRQM_CTRL, TIM_START); |
2996 | 2993 | ||
2997 | hw->intr_mask = IS_HW_ERR | IS_EXT_REG; | ||
2998 | skge_write32(hw, B0_IMSK, hw->intr_mask); | 2994 | skge_write32(hw, B0_IMSK, hw->intr_mask); |
2999 | 2995 | ||
3000 | if (hw->chip_id != CHIP_ID_GENESIS) | 2996 | if (hw->chip_id != CHIP_ID_GENESIS) |