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authorLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
commit1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch)
tree0bba044c4ce775e45a88a51686b5d9f90697ea9d /drivers/net/sis900.c
Linux-2.6.12-rc2v2.6.12-rc2
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
Diffstat (limited to 'drivers/net/sis900.c')
-rw-r--r--drivers/net/sis900.c2370
1 files changed, 2370 insertions, 0 deletions
diff --git a/drivers/net/sis900.c b/drivers/net/sis900.c
new file mode 100644
index 000000000000..3e9d9aab0588
--- /dev/null
+++ b/drivers/net/sis900.c
@@ -0,0 +1,2370 @@
1/* sis900.c: A SiS 900/7016 PCI Fast Ethernet driver for Linux.
2 Copyright 1999 Silicon Integrated System Corporation
3 Revision: 1.08.08 Jan. 22 2005
4
5 Modified from the driver which is originally written by Donald Becker.
6
7 This software may be used and distributed according to the terms
8 of the GNU General Public License (GPL), incorporated herein by reference.
9 Drivers based on this skeleton fall under the GPL and must retain
10 the authorship (implicit copyright) notice.
11
12 References:
13 SiS 7016 Fast Ethernet PCI Bus 10/100 Mbps LAN Controller with OnNow Support,
14 preliminary Rev. 1.0 Jan. 14, 1998
15 SiS 900 Fast Ethernet PCI Bus 10/100 Mbps LAN Single Chip with OnNow Support,
16 preliminary Rev. 1.0 Nov. 10, 1998
17 SiS 7014 Single Chip 100BASE-TX/10BASE-T Physical Layer Solution,
18 preliminary Rev. 1.0 Jan. 18, 1998
19
20 Rev 1.08.08 Jan. 22 2005 Daniele Venzano use netif_msg for debugging messages
21 Rev 1.08.07 Nov. 2 2003 Daniele Venzano <webvenza@libero.it> add suspend/resume support
22 Rev 1.08.06 Sep. 24 2002 Mufasa Yang bug fix for Tx timeout & add SiS963 support
23 Rev 1.08.05 Jun. 6 2002 Mufasa Yang bug fix for read_eeprom & Tx descriptor over-boundary
24 Rev 1.08.04 Apr. 25 2002 Mufasa Yang <mufasa@sis.com.tw> added SiS962 support
25 Rev 1.08.03 Feb. 1 2002 Matt Domsch <Matt_Domsch@dell.com> update to use library crc32 function
26 Rev 1.08.02 Nov. 30 2001 Hui-Fen Hsu workaround for EDB & bug fix for dhcp problem
27 Rev 1.08.01 Aug. 25 2001 Hui-Fen Hsu update for 630ET & workaround for ICS1893 PHY
28 Rev 1.08.00 Jun. 11 2001 Hui-Fen Hsu workaround for RTL8201 PHY and some bug fix
29 Rev 1.07.11 Apr. 2 2001 Hui-Fen Hsu updates PCI drivers to use the new pci_set_dma_mask for kernel 2.4.3
30 Rev 1.07.10 Mar. 1 2001 Hui-Fen Hsu <hfhsu@sis.com.tw> some bug fix & 635M/B support
31 Rev 1.07.09 Feb. 9 2001 Dave Jones <davej@suse.de> PCI enable cleanup
32 Rev 1.07.08 Jan. 8 2001 Lei-Chun Chang added RTL8201 PHY support
33 Rev 1.07.07 Nov. 29 2000 Lei-Chun Chang added kernel-doc extractable documentation and 630 workaround fix
34 Rev 1.07.06 Nov. 7 2000 Jeff Garzik <jgarzik@pobox.com> some bug fix and cleaning
35 Rev 1.07.05 Nov. 6 2000 metapirat<metapirat@gmx.de> contribute media type select by ifconfig
36 Rev 1.07.04 Sep. 6 2000 Lei-Chun Chang added ICS1893 PHY support
37 Rev 1.07.03 Aug. 24 2000 Lei-Chun Chang (lcchang@sis.com.tw) modified 630E eqaulizer workaround rule
38 Rev 1.07.01 Aug. 08 2000 Ollie Lho minor update for SiS 630E and SiS 630E A1
39 Rev 1.07 Mar. 07 2000 Ollie Lho bug fix in Rx buffer ring
40 Rev 1.06.04 Feb. 11 2000 Jeff Garzik <jgarzik@pobox.com> softnet and init for kernel 2.4
41 Rev 1.06.03 Dec. 23 1999 Ollie Lho Third release
42 Rev 1.06.02 Nov. 23 1999 Ollie Lho bug in mac probing fixed
43 Rev 1.06.01 Nov. 16 1999 Ollie Lho CRC calculation provide by Joseph Zbiciak (im14u2c@primenet.com)
44 Rev 1.06 Nov. 4 1999 Ollie Lho (ollie@sis.com.tw) Second release
45 Rev 1.05.05 Oct. 29 1999 Ollie Lho (ollie@sis.com.tw) Single buffer Tx/Rx
46 Chin-Shan Li (lcs@sis.com.tw) Added AMD Am79c901 HomePNA PHY support
47 Rev 1.05 Aug. 7 1999 Jim Huang (cmhuang@sis.com.tw) Initial release
48*/
49
50#include <linux/module.h>
51#include <linux/moduleparam.h>
52#include <linux/kernel.h>
53#include <linux/string.h>
54#include <linux/timer.h>
55#include <linux/errno.h>
56#include <linux/ioport.h>
57#include <linux/slab.h>
58#include <linux/interrupt.h>
59#include <linux/pci.h>
60#include <linux/netdevice.h>
61#include <linux/init.h>
62#include <linux/mii.h>
63#include <linux/etherdevice.h>
64#include <linux/skbuff.h>
65#include <linux/delay.h>
66#include <linux/ethtool.h>
67#include <linux/crc32.h>
68#include <linux/bitops.h>
69
70#include <asm/processor.h> /* Processor type for cache alignment. */
71#include <asm/io.h>
72#include <asm/irq.h>
73#include <asm/uaccess.h> /* User space memory access functions */
74
75#include "sis900.h"
76
77#define SIS900_MODULE_NAME "sis900"
78#define SIS900_DRV_VERSION "v1.08.08 Jan. 22 2005"
79
80static char version[] __devinitdata =
81KERN_INFO "sis900.c: " SIS900_DRV_VERSION "\n";
82
83static int max_interrupt_work = 40;
84static int multicast_filter_limit = 128;
85
86static int sis900_debug = -1; /* Use SIS900_DEF_MSG as value */
87
88#define SIS900_DEF_MSG \
89 (NETIF_MSG_DRV | \
90 NETIF_MSG_LINK | \
91 NETIF_MSG_RX_ERR | \
92 NETIF_MSG_TX_ERR)
93
94/* Time in jiffies before concluding the transmitter is hung. */
95#define TX_TIMEOUT (4*HZ)
96/* SiS 900 is capable of 32 bits BM DMA */
97#define SIS900_DMA_MASK 0xffffffff
98
99enum {
100 SIS_900 = 0,
101 SIS_7016
102};
103static char * card_names[] = {
104 "SiS 900 PCI Fast Ethernet",
105 "SiS 7016 PCI Fast Ethernet"
106};
107static struct pci_device_id sis900_pci_tbl [] = {
108 {PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_900,
109 PCI_ANY_ID, PCI_ANY_ID, 0, 0, SIS_900},
110 {PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_7016,
111 PCI_ANY_ID, PCI_ANY_ID, 0, 0, SIS_7016},
112 {0,}
113};
114MODULE_DEVICE_TABLE (pci, sis900_pci_tbl);
115
116static void sis900_read_mode(struct net_device *net_dev, int *speed, int *duplex);
117
118static struct mii_chip_info {
119 const char * name;
120 u16 phy_id0;
121 u16 phy_id1;
122 u8 phy_types;
123#define HOME 0x0001
124#define LAN 0x0002
125#define MIX 0x0003
126#define UNKNOWN 0x0
127} mii_chip_table[] = {
128 { "SiS 900 Internal MII PHY", 0x001d, 0x8000, LAN },
129 { "SiS 7014 Physical Layer Solution", 0x0016, 0xf830, LAN },
130 { "Altimata AC101LF PHY", 0x0022, 0x5520, LAN },
131 { "AMD 79C901 10BASE-T PHY", 0x0000, 0x6B70, LAN },
132 { "AMD 79C901 HomePNA PHY", 0x0000, 0x6B90, HOME},
133 { "ICS LAN PHY", 0x0015, 0xF440, LAN },
134 { "NS 83851 PHY", 0x2000, 0x5C20, MIX },
135 { "NS 83847 PHY", 0x2000, 0x5C30, MIX },
136 { "Realtek RTL8201 PHY", 0x0000, 0x8200, LAN },
137 { "VIA 6103 PHY", 0x0101, 0x8f20, LAN },
138 {NULL,},
139};
140
141struct mii_phy {
142 struct mii_phy * next;
143 int phy_addr;
144 u16 phy_id0;
145 u16 phy_id1;
146 u16 status;
147 u8 phy_types;
148};
149
150typedef struct _BufferDesc {
151 u32 link;
152 u32 cmdsts;
153 u32 bufptr;
154} BufferDesc;
155
156struct sis900_private {
157 struct net_device_stats stats;
158 struct pci_dev * pci_dev;
159
160 spinlock_t lock;
161
162 struct mii_phy * mii;
163 struct mii_phy * first_mii; /* record the first mii structure */
164 unsigned int cur_phy;
165
166 struct timer_list timer; /* Link status detection timer. */
167 u8 autong_complete; /* 1: auto-negotiate complete */
168
169 u32 msg_enable;
170
171 unsigned int cur_rx, dirty_rx; /* producer/comsumer pointers for Tx/Rx ring */
172 unsigned int cur_tx, dirty_tx;
173
174 /* The saved address of a sent/receive-in-place packet buffer */
175 struct sk_buff *tx_skbuff[NUM_TX_DESC];
176 struct sk_buff *rx_skbuff[NUM_RX_DESC];
177 BufferDesc *tx_ring;
178 BufferDesc *rx_ring;
179
180 dma_addr_t tx_ring_dma;
181 dma_addr_t rx_ring_dma;
182
183 unsigned int tx_full; /* The Tx queue is full. */
184 u8 host_bridge_rev;
185 u8 chipset_rev;
186};
187
188MODULE_AUTHOR("Jim Huang <cmhuang@sis.com.tw>, Ollie Lho <ollie@sis.com.tw>");
189MODULE_DESCRIPTION("SiS 900 PCI Fast Ethernet driver");
190MODULE_LICENSE("GPL");
191
192module_param(multicast_filter_limit, int, 0444);
193module_param(max_interrupt_work, int, 0444);
194module_param(sis900_debug, int, 0444);
195MODULE_PARM_DESC(multicast_filter_limit, "SiS 900/7016 maximum number of filtered multicast addresses");
196MODULE_PARM_DESC(max_interrupt_work, "SiS 900/7016 maximum events handled per interrupt");
197MODULE_PARM_DESC(sis900_debug, "SiS 900/7016 bitmapped debugging message level");
198
199#ifdef CONFIG_NET_POLL_CONTROLLER
200static void sis900_poll(struct net_device *dev);
201#endif
202static int sis900_open(struct net_device *net_dev);
203static int sis900_mii_probe (struct net_device * net_dev);
204static void sis900_init_rxfilter (struct net_device * net_dev);
205static u16 read_eeprom(long ioaddr, int location);
206static u16 mdio_read(struct net_device *net_dev, int phy_id, int location);
207static void mdio_write(struct net_device *net_dev, int phy_id, int location, int val);
208static void sis900_timer(unsigned long data);
209static void sis900_check_mode (struct net_device *net_dev, struct mii_phy *mii_phy);
210static void sis900_tx_timeout(struct net_device *net_dev);
211static void sis900_init_tx_ring(struct net_device *net_dev);
212static void sis900_init_rx_ring(struct net_device *net_dev);
213static int sis900_start_xmit(struct sk_buff *skb, struct net_device *net_dev);
214static int sis900_rx(struct net_device *net_dev);
215static void sis900_finish_xmit (struct net_device *net_dev);
216static irqreturn_t sis900_interrupt(int irq, void *dev_instance, struct pt_regs *regs);
217static int sis900_close(struct net_device *net_dev);
218static int mii_ioctl(struct net_device *net_dev, struct ifreq *rq, int cmd);
219static struct net_device_stats *sis900_get_stats(struct net_device *net_dev);
220static u16 sis900_mcast_bitnr(u8 *addr, u8 revision);
221static void set_rx_mode(struct net_device *net_dev);
222static void sis900_reset(struct net_device *net_dev);
223static void sis630_set_eq(struct net_device *net_dev, u8 revision);
224static int sis900_set_config(struct net_device *dev, struct ifmap *map);
225static u16 sis900_default_phy(struct net_device * net_dev);
226static void sis900_set_capability( struct net_device *net_dev ,struct mii_phy *phy);
227static u16 sis900_reset_phy(struct net_device *net_dev, int phy_addr);
228static void sis900_auto_negotiate(struct net_device *net_dev, int phy_addr);
229static void sis900_set_mode (long ioaddr, int speed, int duplex);
230static struct ethtool_ops sis900_ethtool_ops;
231
232/**
233 * sis900_get_mac_addr - Get MAC address for stand alone SiS900 model
234 * @pci_dev: the sis900 pci device
235 * @net_dev: the net device to get address for
236 *
237 * Older SiS900 and friends, use EEPROM to store MAC address.
238 * MAC address is read from read_eeprom() into @net_dev->dev_addr.
239 */
240
241static int __devinit sis900_get_mac_addr(struct pci_dev * pci_dev, struct net_device *net_dev)
242{
243 long ioaddr = pci_resource_start(pci_dev, 0);
244 u16 signature;
245 int i;
246
247 /* check to see if we have sane EEPROM */
248 signature = (u16) read_eeprom(ioaddr, EEPROMSignature);
249 if (signature == 0xffff || signature == 0x0000) {
250 printk (KERN_WARNING "%s: Error EERPOM read %x\n",
251 pci_name(pci_dev), signature);
252 return 0;
253 }
254
255 /* get MAC address from EEPROM */
256 for (i = 0; i < 3; i++)
257 ((u16 *)(net_dev->dev_addr))[i] = read_eeprom(ioaddr, i+EEPROMMACAddr);
258
259 return 1;
260}
261
262/**
263 * sis630e_get_mac_addr - Get MAC address for SiS630E model
264 * @pci_dev: the sis900 pci device
265 * @net_dev: the net device to get address for
266 *
267 * SiS630E model, use APC CMOS RAM to store MAC address.
268 * APC CMOS RAM is accessed through ISA bridge.
269 * MAC address is read into @net_dev->dev_addr.
270 */
271
272static int __devinit sis630e_get_mac_addr(struct pci_dev * pci_dev,
273 struct net_device *net_dev)
274{
275 struct pci_dev *isa_bridge = NULL;
276 u8 reg;
277 int i;
278
279 isa_bridge = pci_get_device(PCI_VENDOR_ID_SI, 0x0008, isa_bridge);
280 if (!isa_bridge)
281 isa_bridge = pci_get_device(PCI_VENDOR_ID_SI, 0x0018, isa_bridge);
282 if (!isa_bridge) {
283 printk(KERN_WARNING "%s: Can not find ISA bridge\n",
284 pci_name(pci_dev));
285 return 0;
286 }
287 pci_read_config_byte(isa_bridge, 0x48, &reg);
288 pci_write_config_byte(isa_bridge, 0x48, reg | 0x40);
289
290 for (i = 0; i < 6; i++) {
291 outb(0x09 + i, 0x70);
292 ((u8 *)(net_dev->dev_addr))[i] = inb(0x71);
293 }
294 pci_write_config_byte(isa_bridge, 0x48, reg & ~0x40);
295 pci_dev_put(isa_bridge);
296
297 return 1;
298}
299
300
301/**
302 * sis635_get_mac_addr - Get MAC address for SIS635 model
303 * @pci_dev: the sis900 pci device
304 * @net_dev: the net device to get address for
305 *
306 * SiS635 model, set MAC Reload Bit to load Mac address from APC
307 * to rfdr. rfdr is accessed through rfcr. MAC address is read into
308 * @net_dev->dev_addr.
309 */
310
311static int __devinit sis635_get_mac_addr(struct pci_dev * pci_dev,
312 struct net_device *net_dev)
313{
314 long ioaddr = net_dev->base_addr;
315 u32 rfcrSave;
316 u32 i;
317
318 rfcrSave = inl(rfcr + ioaddr);
319
320 outl(rfcrSave | RELOAD, ioaddr + cr);
321 outl(0, ioaddr + cr);
322
323 /* disable packet filtering before setting filter */
324 outl(rfcrSave & ~RFEN, rfcr + ioaddr);
325
326 /* load MAC addr to filter data register */
327 for (i = 0 ; i < 3 ; i++) {
328 outl((i << RFADDR_shift), ioaddr + rfcr);
329 *( ((u16 *)net_dev->dev_addr) + i) = inw(ioaddr + rfdr);
330 }
331
332 /* enable packet filtering */
333 outl(rfcrSave | RFEN, rfcr + ioaddr);
334
335 return 1;
336}
337
338/**
339 * sis96x_get_mac_addr - Get MAC address for SiS962 or SiS963 model
340 * @pci_dev: the sis900 pci device
341 * @net_dev: the net device to get address for
342 *
343 * SiS962 or SiS963 model, use EEPROM to store MAC address. And EEPROM
344 * is shared by
345 * LAN and 1394. When access EEPROM, send EEREQ signal to hardware first
346 * and wait for EEGNT. If EEGNT is ON, EEPROM is permitted to be access
347 * by LAN, otherwise is not. After MAC address is read from EEPROM, send
348 * EEDONE signal to refuse EEPROM access by LAN.
349 * The EEPROM map of SiS962 or SiS963 is different to SiS900.
350 * The signature field in SiS962 or SiS963 spec is meaningless.
351 * MAC address is read into @net_dev->dev_addr.
352 */
353
354static int __devinit sis96x_get_mac_addr(struct pci_dev * pci_dev,
355 struct net_device *net_dev)
356{
357 long ioaddr = net_dev->base_addr;
358 long ee_addr = ioaddr + mear;
359 u32 waittime = 0;
360 int i;
361
362 outl(EEREQ, ee_addr);
363 while(waittime < 2000) {
364 if(inl(ee_addr) & EEGNT) {
365
366 /* get MAC address from EEPROM */
367 for (i = 0; i < 3; i++)
368 ((u16 *)(net_dev->dev_addr))[i] = read_eeprom(ioaddr, i+EEPROMMACAddr);
369
370 outl(EEDONE, ee_addr);
371 return 1;
372 } else {
373 udelay(1);
374 waittime ++;
375 }
376 }
377 outl(EEDONE, ee_addr);
378 return 0;
379}
380
381/**
382 * sis900_probe - Probe for sis900 device
383 * @pci_dev: the sis900 pci device
384 * @pci_id: the pci device ID
385 *
386 * Check and probe sis900 net device for @pci_dev.
387 * Get mac address according to the chip revision,
388 * and assign SiS900-specific entries in the device structure.
389 * ie: sis900_open(), sis900_start_xmit(), sis900_close(), etc.
390 */
391
392static int __devinit sis900_probe(struct pci_dev *pci_dev,
393 const struct pci_device_id *pci_id)
394{
395 struct sis900_private *sis_priv;
396 struct net_device *net_dev;
397 struct pci_dev *dev;
398 dma_addr_t ring_dma;
399 void *ring_space;
400 long ioaddr;
401 int i, ret;
402 char *card_name = card_names[pci_id->driver_data];
403 const char *dev_name = pci_name(pci_dev);
404
405/* when built into the kernel, we only print version if device is found */
406#ifndef MODULE
407 static int printed_version;
408 if (!printed_version++)
409 printk(version);
410#endif
411
412 /* setup various bits in PCI command register */
413 ret = pci_enable_device(pci_dev);
414 if(ret) return ret;
415
416 i = pci_set_dma_mask(pci_dev, SIS900_DMA_MASK);
417 if(i){
418 printk(KERN_ERR "sis900.c: architecture does not support"
419 "32bit PCI busmaster DMA\n");
420 return i;
421 }
422
423 pci_set_master(pci_dev);
424
425 net_dev = alloc_etherdev(sizeof(struct sis900_private));
426 if (!net_dev)
427 return -ENOMEM;
428 SET_MODULE_OWNER(net_dev);
429 SET_NETDEV_DEV(net_dev, &pci_dev->dev);
430
431 /* We do a request_region() to register /proc/ioports info. */
432 ioaddr = pci_resource_start(pci_dev, 0);
433 ret = pci_request_regions(pci_dev, "sis900");
434 if (ret)
435 goto err_out;
436
437 sis_priv = net_dev->priv;
438 net_dev->base_addr = ioaddr;
439 net_dev->irq = pci_dev->irq;
440 sis_priv->pci_dev = pci_dev;
441 spin_lock_init(&sis_priv->lock);
442
443 pci_set_drvdata(pci_dev, net_dev);
444
445 ring_space = pci_alloc_consistent(pci_dev, TX_TOTAL_SIZE, &ring_dma);
446 if (!ring_space) {
447 ret = -ENOMEM;
448 goto err_out_cleardev;
449 }
450 sis_priv->tx_ring = (BufferDesc *)ring_space;
451 sis_priv->tx_ring_dma = ring_dma;
452
453 ring_space = pci_alloc_consistent(pci_dev, RX_TOTAL_SIZE, &ring_dma);
454 if (!ring_space) {
455 ret = -ENOMEM;
456 goto err_unmap_tx;
457 }
458 sis_priv->rx_ring = (BufferDesc *)ring_space;
459 sis_priv->rx_ring_dma = ring_dma;
460
461 /* The SiS900-specific entries in the device structure. */
462 net_dev->open = &sis900_open;
463 net_dev->hard_start_xmit = &sis900_start_xmit;
464 net_dev->stop = &sis900_close;
465 net_dev->get_stats = &sis900_get_stats;
466 net_dev->set_config = &sis900_set_config;
467 net_dev->set_multicast_list = &set_rx_mode;
468 net_dev->do_ioctl = &mii_ioctl;
469 net_dev->tx_timeout = sis900_tx_timeout;
470 net_dev->watchdog_timeo = TX_TIMEOUT;
471 net_dev->ethtool_ops = &sis900_ethtool_ops;
472
473#ifdef CONFIG_NET_POLL_CONTROLLER
474 net_dev->poll_controller = &sis900_poll;
475#endif
476
477 if (sis900_debug > 0)
478 sis_priv->msg_enable = sis900_debug;
479 else
480 sis_priv->msg_enable = SIS900_DEF_MSG;
481
482 /* Get Mac address according to the chip revision */
483 pci_read_config_byte(pci_dev, PCI_CLASS_REVISION, &(sis_priv->chipset_rev));
484 if(netif_msg_probe(sis_priv))
485 printk(KERN_DEBUG "%s: detected revision %2.2x, "
486 "trying to get MAC address...\n",
487 dev_name, sis_priv->chipset_rev);
488
489 ret = 0;
490 if (sis_priv->chipset_rev == SIS630E_900_REV)
491 ret = sis630e_get_mac_addr(pci_dev, net_dev);
492 else if ((sis_priv->chipset_rev > 0x81) && (sis_priv->chipset_rev <= 0x90) )
493 ret = sis635_get_mac_addr(pci_dev, net_dev);
494 else if (sis_priv->chipset_rev == SIS96x_900_REV)
495 ret = sis96x_get_mac_addr(pci_dev, net_dev);
496 else
497 ret = sis900_get_mac_addr(pci_dev, net_dev);
498
499 if (ret == 0) {
500 printk(KERN_WARNING "%s: Cannot read MAC address.\n", dev_name);
501 ret = -ENODEV;
502 goto err_unmap_rx;
503 }
504
505 /* 630ET : set the mii access mode as software-mode */
506 if (sis_priv->chipset_rev == SIS630ET_900_REV)
507 outl(ACCESSMODE | inl(ioaddr + cr), ioaddr + cr);
508
509 /* probe for mii transceiver */
510 if (sis900_mii_probe(net_dev) == 0) {
511 printk(KERN_WARNING "%s: Error probing MII device.\n",
512 dev_name);
513 ret = -ENODEV;
514 goto err_unmap_rx;
515 }
516
517 /* save our host bridge revision */
518 dev = pci_get_device(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_630, NULL);
519 if (dev) {
520 pci_read_config_byte(dev, PCI_CLASS_REVISION, &sis_priv->host_bridge_rev);
521 pci_dev_put(dev);
522 }
523
524 ret = register_netdev(net_dev);
525 if (ret)
526 goto err_unmap_rx;
527
528 /* print some information about our NIC */
529 printk(KERN_INFO "%s: %s at %#lx, IRQ %d, ", net_dev->name,
530 card_name, ioaddr, net_dev->irq);
531 for (i = 0; i < 5; i++)
532 printk("%2.2x:", (u8)net_dev->dev_addr[i]);
533 printk("%2.2x.\n", net_dev->dev_addr[i]);
534
535 return 0;
536
537 err_unmap_rx:
538 pci_free_consistent(pci_dev, RX_TOTAL_SIZE, sis_priv->rx_ring,
539 sis_priv->rx_ring_dma);
540 err_unmap_tx:
541 pci_free_consistent(pci_dev, TX_TOTAL_SIZE, sis_priv->tx_ring,
542 sis_priv->tx_ring_dma);
543 err_out_cleardev:
544 pci_set_drvdata(pci_dev, NULL);
545 pci_release_regions(pci_dev);
546 err_out:
547 free_netdev(net_dev);
548 return ret;
549}
550
551/**
552 * sis900_mii_probe - Probe MII PHY for sis900
553 * @net_dev: the net device to probe for
554 *
555 * Search for total of 32 possible mii phy addresses.
556 * Identify and set current phy if found one,
557 * return error if it failed to found.
558 */
559
560static int __init sis900_mii_probe(struct net_device * net_dev)
561{
562 struct sis900_private * sis_priv = net_dev->priv;
563 const char *dev_name = pci_name(sis_priv->pci_dev);
564 u16 poll_bit = MII_STAT_LINK, status = 0;
565 unsigned long timeout = jiffies + 5 * HZ;
566 int phy_addr;
567
568 sis_priv->mii = NULL;
569
570 /* search for total of 32 possible mii phy addresses */
571 for (phy_addr = 0; phy_addr < 32; phy_addr++) {
572 struct mii_phy * mii_phy = NULL;
573 u16 mii_status;
574 int i;
575
576 mii_phy = NULL;
577 for(i = 0; i < 2; i++)
578 mii_status = mdio_read(net_dev, phy_addr, MII_STATUS);
579
580 if (mii_status == 0xffff || mii_status == 0x0000) {
581 if (netif_msg_probe(sis_priv))
582 printk(KERN_DEBUG "%s: MII at address %d"
583 " not accessible\n",
584 dev_name, phy_addr);
585 continue;
586 }
587
588 if ((mii_phy = kmalloc(sizeof(struct mii_phy), GFP_KERNEL)) == NULL) {
589 printk(KERN_WARNING "Cannot allocate mem for struct mii_phy\n");
590 mii_phy = sis_priv->first_mii;
591 while (mii_phy) {
592 struct mii_phy *phy;
593 phy = mii_phy;
594 mii_phy = mii_phy->next;
595 kfree(phy);
596 }
597 return 0;
598 }
599
600 mii_phy->phy_id0 = mdio_read(net_dev, phy_addr, MII_PHY_ID0);
601 mii_phy->phy_id1 = mdio_read(net_dev, phy_addr, MII_PHY_ID1);
602 mii_phy->phy_addr = phy_addr;
603 mii_phy->status = mii_status;
604 mii_phy->next = sis_priv->mii;
605 sis_priv->mii = mii_phy;
606 sis_priv->first_mii = mii_phy;
607
608 for (i = 0; mii_chip_table[i].phy_id1; i++)
609 if ((mii_phy->phy_id0 == mii_chip_table[i].phy_id0 ) &&
610 ((mii_phy->phy_id1 & 0xFFF0) == mii_chip_table[i].phy_id1)){
611 mii_phy->phy_types = mii_chip_table[i].phy_types;
612 if (mii_chip_table[i].phy_types == MIX)
613 mii_phy->phy_types =
614 (mii_status & (MII_STAT_CAN_TX_FDX | MII_STAT_CAN_TX)) ? LAN : HOME;
615 printk(KERN_INFO "%s: %s transceiver found "
616 "at address %d.\n",
617 dev_name,
618 mii_chip_table[i].name,
619 phy_addr);
620 break;
621 }
622
623 if( !mii_chip_table[i].phy_id1 ) {
624 printk(KERN_INFO "%s: Unknown PHY transceiver found at address %d.\n",
625 dev_name, phy_addr);
626 mii_phy->phy_types = UNKNOWN;
627 }
628 }
629
630 if (sis_priv->mii == NULL) {
631 printk(KERN_INFO "%s: No MII transceivers found!\n", dev_name);
632 return 0;
633 }
634
635 /* select default PHY for mac */
636 sis_priv->mii = NULL;
637 sis900_default_phy( net_dev );
638
639 /* Reset phy if default phy is internal sis900 */
640 if ((sis_priv->mii->phy_id0 == 0x001D) &&
641 ((sis_priv->mii->phy_id1&0xFFF0) == 0x8000))
642 status = sis900_reset_phy(net_dev, sis_priv->cur_phy);
643
644 /* workaround for ICS1893 PHY */
645 if ((sis_priv->mii->phy_id0 == 0x0015) &&
646 ((sis_priv->mii->phy_id1&0xFFF0) == 0xF440))
647 mdio_write(net_dev, sis_priv->cur_phy, 0x0018, 0xD200);
648
649 if(status & MII_STAT_LINK){
650 while (poll_bit) {
651 yield();
652
653 poll_bit ^= (mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS) & poll_bit);
654 if (time_after_eq(jiffies, timeout)) {
655 printk(KERN_WARNING "%s: reset phy and link down now\n",
656 dev_name);
657 return -ETIME;
658 }
659 }
660 }
661
662 if (sis_priv->chipset_rev == SIS630E_900_REV) {
663 /* SiS 630E has some bugs on default value of PHY registers */
664 mdio_write(net_dev, sis_priv->cur_phy, MII_ANADV, 0x05e1);
665 mdio_write(net_dev, sis_priv->cur_phy, MII_CONFIG1, 0x22);
666 mdio_write(net_dev, sis_priv->cur_phy, MII_CONFIG2, 0xff00);
667 mdio_write(net_dev, sis_priv->cur_phy, MII_MASK, 0xffc0);
668 //mdio_write(net_dev, sis_priv->cur_phy, MII_CONTROL, 0x1000);
669 }
670
671 if (sis_priv->mii->status & MII_STAT_LINK)
672 netif_carrier_on(net_dev);
673 else
674 netif_carrier_off(net_dev);
675
676 return 1;
677}
678
679/**
680 * sis900_default_phy - Select default PHY for sis900 mac.
681 * @net_dev: the net device to probe for
682 *
683 * Select first detected PHY with link as default.
684 * If no one is link on, select PHY whose types is HOME as default.
685 * If HOME doesn't exist, select LAN.
686 */
687
688static u16 sis900_default_phy(struct net_device * net_dev)
689{
690 struct sis900_private * sis_priv = net_dev->priv;
691 struct mii_phy *phy = NULL, *phy_home = NULL,
692 *default_phy = NULL, *phy_lan = NULL;
693 u16 status;
694
695 for (phy=sis_priv->first_mii; phy; phy=phy->next) {
696 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
697 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
698
699 /* Link ON & Not select default PHY & not ghost PHY */
700 if ((status & MII_STAT_LINK) && !default_phy &&
701 (phy->phy_types != UNKNOWN))
702 default_phy = phy;
703 else {
704 status = mdio_read(net_dev, phy->phy_addr, MII_CONTROL);
705 mdio_write(net_dev, phy->phy_addr, MII_CONTROL,
706 status | MII_CNTL_AUTO | MII_CNTL_ISOLATE);
707 if (phy->phy_types == HOME)
708 phy_home = phy;
709 else if(phy->phy_types == LAN)
710 phy_lan = phy;
711 }
712 }
713
714 if (!default_phy && phy_home)
715 default_phy = phy_home;
716 else if (!default_phy && phy_lan)
717 default_phy = phy_lan;
718 else if (!default_phy)
719 default_phy = sis_priv->first_mii;
720
721 if (sis_priv->mii != default_phy) {
722 sis_priv->mii = default_phy;
723 sis_priv->cur_phy = default_phy->phy_addr;
724 printk(KERN_INFO "%s: Using transceiver found at address %d as default\n",
725 pci_name(sis_priv->pci_dev), sis_priv->cur_phy);
726 }
727
728 status = mdio_read(net_dev, sis_priv->cur_phy, MII_CONTROL);
729 status &= (~MII_CNTL_ISOLATE);
730
731 mdio_write(net_dev, sis_priv->cur_phy, MII_CONTROL, status);
732 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
733 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
734
735 return status;
736}
737
738
739/**
740 * sis900_set_capability - set the media capability of network adapter.
741 * @net_dev : the net device to probe for
742 * @phy : default PHY
743 *
744 * Set the media capability of network adapter according to
745 * mii status register. It's necessary before auto-negotiate.
746 */
747
748static void sis900_set_capability(struct net_device *net_dev, struct mii_phy *phy)
749{
750 u16 cap;
751 u16 status;
752
753 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
754 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
755
756 cap = MII_NWAY_CSMA_CD |
757 ((phy->status & MII_STAT_CAN_TX_FDX)? MII_NWAY_TX_FDX:0) |
758 ((phy->status & MII_STAT_CAN_TX) ? MII_NWAY_TX:0) |
759 ((phy->status & MII_STAT_CAN_T_FDX) ? MII_NWAY_T_FDX:0)|
760 ((phy->status & MII_STAT_CAN_T) ? MII_NWAY_T:0);
761
762 mdio_write(net_dev, phy->phy_addr, MII_ANADV, cap);
763}
764
765
766/* Delay between EEPROM clock transitions. */
767#define eeprom_delay() inl(ee_addr)
768
769/**
770 * read_eeprom - Read Serial EEPROM
771 * @ioaddr: base i/o address
772 * @location: the EEPROM location to read
773 *
774 * Read Serial EEPROM through EEPROM Access Register.
775 * Note that location is in word (16 bits) unit
776 */
777
778static u16 __devinit read_eeprom(long ioaddr, int location)
779{
780 int i;
781 u16 retval = 0;
782 long ee_addr = ioaddr + mear;
783 u32 read_cmd = location | EEread;
784
785 outl(0, ee_addr);
786 eeprom_delay();
787 outl(EECS, ee_addr);
788 eeprom_delay();
789
790 /* Shift the read command (9) bits out. */
791 for (i = 8; i >= 0; i--) {
792 u32 dataval = (read_cmd & (1 << i)) ? EEDI | EECS : EECS;
793 outl(dataval, ee_addr);
794 eeprom_delay();
795 outl(dataval | EECLK, ee_addr);
796 eeprom_delay();
797 }
798 outl(EECS, ee_addr);
799 eeprom_delay();
800
801 /* read the 16-bits data in */
802 for (i = 16; i > 0; i--) {
803 outl(EECS, ee_addr);
804 eeprom_delay();
805 outl(EECS | EECLK, ee_addr);
806 eeprom_delay();
807 retval = (retval << 1) | ((inl(ee_addr) & EEDO) ? 1 : 0);
808 eeprom_delay();
809 }
810
811 /* Terminate the EEPROM access. */
812 outl(0, ee_addr);
813 eeprom_delay();
814
815 return (retval);
816}
817
818/* Read and write the MII management registers using software-generated
819 serial MDIO protocol. Note that the command bits and data bits are
820 send out separately */
821#define mdio_delay() inl(mdio_addr)
822
823static void mdio_idle(long mdio_addr)
824{
825 outl(MDIO | MDDIR, mdio_addr);
826 mdio_delay();
827 outl(MDIO | MDDIR | MDC, mdio_addr);
828}
829
830/* Syncronize the MII management interface by shifting 32 one bits out. */
831static void mdio_reset(long mdio_addr)
832{
833 int i;
834
835 for (i = 31; i >= 0; i--) {
836 outl(MDDIR | MDIO, mdio_addr);
837 mdio_delay();
838 outl(MDDIR | MDIO | MDC, mdio_addr);
839 mdio_delay();
840 }
841 return;
842}
843
844/**
845 * mdio_read - read MII PHY register
846 * @net_dev: the net device to read
847 * @phy_id: the phy address to read
848 * @location: the phy regiester id to read
849 *
850 * Read MII registers through MDIO and MDC
851 * using MDIO management frame structure and protocol(defined by ISO/IEC).
852 * Please see SiS7014 or ICS spec
853 */
854
855static u16 mdio_read(struct net_device *net_dev, int phy_id, int location)
856{
857 long mdio_addr = net_dev->base_addr + mear;
858 int mii_cmd = MIIread|(phy_id<<MIIpmdShift)|(location<<MIIregShift);
859 u16 retval = 0;
860 int i;
861
862 mdio_reset(mdio_addr);
863 mdio_idle(mdio_addr);
864
865 for (i = 15; i >= 0; i--) {
866 int dataval = (mii_cmd & (1 << i)) ? MDDIR | MDIO : MDDIR;
867 outl(dataval, mdio_addr);
868 mdio_delay();
869 outl(dataval | MDC, mdio_addr);
870 mdio_delay();
871 }
872
873 /* Read the 16 data bits. */
874 for (i = 16; i > 0; i--) {
875 outl(0, mdio_addr);
876 mdio_delay();
877 retval = (retval << 1) | ((inl(mdio_addr) & MDIO) ? 1 : 0);
878 outl(MDC, mdio_addr);
879 mdio_delay();
880 }
881 outl(0x00, mdio_addr);
882
883 return retval;
884}
885
886/**
887 * mdio_write - write MII PHY register
888 * @net_dev: the net device to write
889 * @phy_id: the phy address to write
890 * @location: the phy regiester id to write
891 * @value: the register value to write with
892 *
893 * Write MII registers with @value through MDIO and MDC
894 * using MDIO management frame structure and protocol(defined by ISO/IEC)
895 * please see SiS7014 or ICS spec
896 */
897
898static void mdio_write(struct net_device *net_dev, int phy_id, int location,
899 int value)
900{
901 long mdio_addr = net_dev->base_addr + mear;
902 int mii_cmd = MIIwrite|(phy_id<<MIIpmdShift)|(location<<MIIregShift);
903 int i;
904
905 mdio_reset(mdio_addr);
906 mdio_idle(mdio_addr);
907
908 /* Shift the command bits out. */
909 for (i = 15; i >= 0; i--) {
910 int dataval = (mii_cmd & (1 << i)) ? MDDIR | MDIO : MDDIR;
911 outb(dataval, mdio_addr);
912 mdio_delay();
913 outb(dataval | MDC, mdio_addr);
914 mdio_delay();
915 }
916 mdio_delay();
917
918 /* Shift the value bits out. */
919 for (i = 15; i >= 0; i--) {
920 int dataval = (value & (1 << i)) ? MDDIR | MDIO : MDDIR;
921 outl(dataval, mdio_addr);
922 mdio_delay();
923 outl(dataval | MDC, mdio_addr);
924 mdio_delay();
925 }
926 mdio_delay();
927
928 /* Clear out extra bits. */
929 for (i = 2; i > 0; i--) {
930 outb(0, mdio_addr);
931 mdio_delay();
932 outb(MDC, mdio_addr);
933 mdio_delay();
934 }
935 outl(0x00, mdio_addr);
936
937 return;
938}
939
940
941/**
942 * sis900_reset_phy - reset sis900 mii phy.
943 * @net_dev: the net device to write
944 * @phy_addr: default phy address
945 *
946 * Some specific phy can't work properly without reset.
947 * This function will be called during initialization and
948 * link status change from ON to DOWN.
949 */
950
951static u16 sis900_reset_phy(struct net_device *net_dev, int phy_addr)
952{
953 int i = 0;
954 u16 status;
955
956 while (i++ < 2)
957 status = mdio_read(net_dev, phy_addr, MII_STATUS);
958
959 mdio_write( net_dev, phy_addr, MII_CONTROL, MII_CNTL_RESET );
960
961 return status;
962}
963
964#ifdef CONFIG_NET_POLL_CONTROLLER
965/*
966 * Polling 'interrupt' - used by things like netconsole to send skbs
967 * without having to re-enable interrupts. It's not called while
968 * the interrupt routine is executing.
969*/
970static void sis900_poll(struct net_device *dev)
971{
972 disable_irq(dev->irq);
973 sis900_interrupt(dev->irq, dev, NULL);
974 enable_irq(dev->irq);
975}
976#endif
977
978/**
979 * sis900_open - open sis900 device
980 * @net_dev: the net device to open
981 *
982 * Do some initialization and start net interface.
983 * enable interrupts and set sis900 timer.
984 */
985
986static int
987sis900_open(struct net_device *net_dev)
988{
989 struct sis900_private *sis_priv = net_dev->priv;
990 long ioaddr = net_dev->base_addr;
991 int ret;
992
993 /* Soft reset the chip. */
994 sis900_reset(net_dev);
995
996 /* Equalizer workaround Rule */
997 sis630_set_eq(net_dev, sis_priv->chipset_rev);
998
999 ret = request_irq(net_dev->irq, &sis900_interrupt, SA_SHIRQ,
1000 net_dev->name, net_dev);
1001 if (ret)
1002 return ret;
1003
1004 sis900_init_rxfilter(net_dev);
1005
1006 sis900_init_tx_ring(net_dev);
1007 sis900_init_rx_ring(net_dev);
1008
1009 set_rx_mode(net_dev);
1010
1011 netif_start_queue(net_dev);
1012
1013 /* Workaround for EDB */
1014 sis900_set_mode(ioaddr, HW_SPEED_10_MBPS, FDX_CAPABLE_HALF_SELECTED);
1015
1016 /* Enable all known interrupts by setting the interrupt mask. */
1017 outl((RxSOVR|RxORN|RxERR|RxOK|TxURN|TxERR|TxIDLE), ioaddr + imr);
1018 outl(RxENA | inl(ioaddr + cr), ioaddr + cr);
1019 outl(IE, ioaddr + ier);
1020
1021 sis900_check_mode(net_dev, sis_priv->mii);
1022
1023 /* Set the timer to switch to check for link beat and perhaps switch
1024 to an alternate media type. */
1025 init_timer(&sis_priv->timer);
1026 sis_priv->timer.expires = jiffies + HZ;
1027 sis_priv->timer.data = (unsigned long)net_dev;
1028 sis_priv->timer.function = &sis900_timer;
1029 add_timer(&sis_priv->timer);
1030
1031 return 0;
1032}
1033
1034/**
1035 * sis900_init_rxfilter - Initialize the Rx filter
1036 * @net_dev: the net device to initialize for
1037 *
1038 * Set receive filter address to our MAC address
1039 * and enable packet filtering.
1040 */
1041
1042static void
1043sis900_init_rxfilter (struct net_device * net_dev)
1044{
1045 struct sis900_private *sis_priv = net_dev->priv;
1046 long ioaddr = net_dev->base_addr;
1047 u32 rfcrSave;
1048 u32 i;
1049
1050 rfcrSave = inl(rfcr + ioaddr);
1051
1052 /* disable packet filtering before setting filter */
1053 outl(rfcrSave & ~RFEN, rfcr + ioaddr);
1054
1055 /* load MAC addr to filter data register */
1056 for (i = 0 ; i < 3 ; i++) {
1057 u32 w;
1058
1059 w = (u32) *((u16 *)(net_dev->dev_addr)+i);
1060 outl((i << RFADDR_shift), ioaddr + rfcr);
1061 outl(w, ioaddr + rfdr);
1062
1063 if (netif_msg_hw(sis_priv)) {
1064 printk(KERN_DEBUG "%s: Receive Filter Addrss[%d]=%x\n",
1065 net_dev->name, i, inl(ioaddr + rfdr));
1066 }
1067 }
1068
1069 /* enable packet filtering */
1070 outl(rfcrSave | RFEN, rfcr + ioaddr);
1071}
1072
1073/**
1074 * sis900_init_tx_ring - Initialize the Tx descriptor ring
1075 * @net_dev: the net device to initialize for
1076 *
1077 * Initialize the Tx descriptor ring,
1078 */
1079
1080static void
1081sis900_init_tx_ring(struct net_device *net_dev)
1082{
1083 struct sis900_private *sis_priv = net_dev->priv;
1084 long ioaddr = net_dev->base_addr;
1085 int i;
1086
1087 sis_priv->tx_full = 0;
1088 sis_priv->dirty_tx = sis_priv->cur_tx = 0;
1089
1090 for (i = 0; i < NUM_TX_DESC; i++) {
1091 sis_priv->tx_skbuff[i] = NULL;
1092
1093 sis_priv->tx_ring[i].link = sis_priv->tx_ring_dma +
1094 ((i+1)%NUM_TX_DESC)*sizeof(BufferDesc);
1095 sis_priv->tx_ring[i].cmdsts = 0;
1096 sis_priv->tx_ring[i].bufptr = 0;
1097 }
1098
1099 /* load Transmit Descriptor Register */
1100 outl(sis_priv->tx_ring_dma, ioaddr + txdp);
1101 if (netif_msg_hw(sis_priv))
1102 printk(KERN_DEBUG "%s: TX descriptor register loaded with: %8.8x\n",
1103 net_dev->name, inl(ioaddr + txdp));
1104}
1105
1106/**
1107 * sis900_init_rx_ring - Initialize the Rx descriptor ring
1108 * @net_dev: the net device to initialize for
1109 *
1110 * Initialize the Rx descriptor ring,
1111 * and pre-allocate recevie buffers (socket buffer)
1112 */
1113
1114static void
1115sis900_init_rx_ring(struct net_device *net_dev)
1116{
1117 struct sis900_private *sis_priv = net_dev->priv;
1118 long ioaddr = net_dev->base_addr;
1119 int i;
1120
1121 sis_priv->cur_rx = 0;
1122 sis_priv->dirty_rx = 0;
1123
1124 /* init RX descriptor */
1125 for (i = 0; i < NUM_RX_DESC; i++) {
1126 sis_priv->rx_skbuff[i] = NULL;
1127
1128 sis_priv->rx_ring[i].link = sis_priv->rx_ring_dma +
1129 ((i+1)%NUM_RX_DESC)*sizeof(BufferDesc);
1130 sis_priv->rx_ring[i].cmdsts = 0;
1131 sis_priv->rx_ring[i].bufptr = 0;
1132 }
1133
1134 /* allocate sock buffers */
1135 for (i = 0; i < NUM_RX_DESC; i++) {
1136 struct sk_buff *skb;
1137
1138 if ((skb = dev_alloc_skb(RX_BUF_SIZE)) == NULL) {
1139 /* not enough memory for skbuff, this makes a "hole"
1140 on the buffer ring, it is not clear how the
1141 hardware will react to this kind of degenerated
1142 buffer */
1143 break;
1144 }
1145 skb->dev = net_dev;
1146 sis_priv->rx_skbuff[i] = skb;
1147 sis_priv->rx_ring[i].cmdsts = RX_BUF_SIZE;
1148 sis_priv->rx_ring[i].bufptr = pci_map_single(sis_priv->pci_dev,
1149 skb->tail, RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1150 }
1151 sis_priv->dirty_rx = (unsigned int) (i - NUM_RX_DESC);
1152
1153 /* load Receive Descriptor Register */
1154 outl(sis_priv->rx_ring_dma, ioaddr + rxdp);
1155 if (netif_msg_hw(sis_priv))
1156 printk(KERN_DEBUG "%s: RX descriptor register loaded with: %8.8x\n",
1157 net_dev->name, inl(ioaddr + rxdp));
1158}
1159
1160/**
1161 * sis630_set_eq - set phy equalizer value for 630 LAN
1162 * @net_dev: the net device to set equalizer value
1163 * @revision: 630 LAN revision number
1164 *
1165 * 630E equalizer workaround rule(Cyrus Huang 08/15)
1166 * PHY register 14h(Test)
1167 * Bit 14: 0 -- Automatically dectect (default)
1168 * 1 -- Manually set Equalizer filter
1169 * Bit 13: 0 -- (Default)
1170 * 1 -- Speed up convergence of equalizer setting
1171 * Bit 9 : 0 -- (Default)
1172 * 1 -- Disable Baseline Wander
1173 * Bit 3~7 -- Equalizer filter setting
1174 * Link ON: Set Bit 9, 13 to 1, Bit 14 to 0
1175 * Then calculate equalizer value
1176 * Then set equalizer value, and set Bit 14 to 1, Bit 9 to 0
1177 * Link Off:Set Bit 13 to 1, Bit 14 to 0
1178 * Calculate Equalizer value:
1179 * When Link is ON and Bit 14 is 0, SIS900PHY will auto-dectect proper equalizer value.
1180 * When the equalizer is stable, this value is not a fixed value. It will be within
1181 * a small range(eg. 7~9). Then we get a minimum and a maximum value(eg. min=7, max=9)
1182 * 0 <= max <= 4 --> set equalizer to max
1183 * 5 <= max <= 14 --> set equalizer to max+1 or set equalizer to max+2 if max == min
1184 * max >= 15 --> set equalizer to max+5 or set equalizer to max+6 if max == min
1185 */
1186
1187static void sis630_set_eq(struct net_device *net_dev, u8 revision)
1188{
1189 struct sis900_private *sis_priv = net_dev->priv;
1190 u16 reg14h, eq_value=0, max_value=0, min_value=0;
1191 int i, maxcount=10;
1192
1193 if ( !(revision == SIS630E_900_REV || revision == SIS630EA1_900_REV ||
1194 revision == SIS630A_900_REV || revision == SIS630ET_900_REV) )
1195 return;
1196
1197 if (netif_carrier_ok(net_dev)) {
1198 reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV);
1199 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV,
1200 (0x2200 | reg14h) & 0xBFFF);
1201 for (i=0; i < maxcount; i++) {
1202 eq_value = (0x00F8 & mdio_read(net_dev,
1203 sis_priv->cur_phy, MII_RESV)) >> 3;
1204 if (i == 0)
1205 max_value=min_value=eq_value;
1206 max_value = (eq_value > max_value) ?
1207 eq_value : max_value;
1208 min_value = (eq_value < min_value) ?
1209 eq_value : min_value;
1210 }
1211 /* 630E rule to determine the equalizer value */
1212 if (revision == SIS630E_900_REV || revision == SIS630EA1_900_REV ||
1213 revision == SIS630ET_900_REV) {
1214 if (max_value < 5)
1215 eq_value = max_value;
1216 else if (max_value >= 5 && max_value < 15)
1217 eq_value = (max_value == min_value) ?
1218 max_value+2 : max_value+1;
1219 else if (max_value >= 15)
1220 eq_value=(max_value == min_value) ?
1221 max_value+6 : max_value+5;
1222 }
1223 /* 630B0&B1 rule to determine the equalizer value */
1224 if (revision == SIS630A_900_REV &&
1225 (sis_priv->host_bridge_rev == SIS630B0 ||
1226 sis_priv->host_bridge_rev == SIS630B1)) {
1227 if (max_value == 0)
1228 eq_value = 3;
1229 else
1230 eq_value = (max_value + min_value + 1)/2;
1231 }
1232 /* write equalizer value and setting */
1233 reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV);
1234 reg14h = (reg14h & 0xFF07) | ((eq_value << 3) & 0x00F8);
1235 reg14h = (reg14h | 0x6000) & 0xFDFF;
1236 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV, reg14h);
1237 } else {
1238 reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV);
1239 if (revision == SIS630A_900_REV &&
1240 (sis_priv->host_bridge_rev == SIS630B0 ||
1241 sis_priv->host_bridge_rev == SIS630B1))
1242 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV,
1243 (reg14h | 0x2200) & 0xBFFF);
1244 else
1245 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV,
1246 (reg14h | 0x2000) & 0xBFFF);
1247 }
1248 return;
1249}
1250
1251/**
1252 * sis900_timer - sis900 timer routine
1253 * @data: pointer to sis900 net device
1254 *
1255 * On each timer ticks we check two things,
1256 * link status (ON/OFF) and link mode (10/100/Full/Half)
1257 */
1258
1259static void sis900_timer(unsigned long data)
1260{
1261 struct net_device *net_dev = (struct net_device *)data;
1262 struct sis900_private *sis_priv = net_dev->priv;
1263 struct mii_phy *mii_phy = sis_priv->mii;
1264 static int next_tick = 5*HZ;
1265 u16 status;
1266
1267 if (!sis_priv->autong_complete){
1268 int speed, duplex = 0;
1269
1270 sis900_read_mode(net_dev, &speed, &duplex);
1271 if (duplex){
1272 sis900_set_mode(net_dev->base_addr, speed, duplex);
1273 sis630_set_eq(net_dev, sis_priv->chipset_rev);
1274 netif_start_queue(net_dev);
1275 }
1276
1277 sis_priv->timer.expires = jiffies + HZ;
1278 add_timer(&sis_priv->timer);
1279 return;
1280 }
1281
1282 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
1283 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
1284
1285 /* Link OFF -> ON */
1286 if (!netif_carrier_ok(net_dev)) {
1287 LookForLink:
1288 /* Search for new PHY */
1289 status = sis900_default_phy(net_dev);
1290 mii_phy = sis_priv->mii;
1291
1292 if (status & MII_STAT_LINK){
1293 sis900_check_mode(net_dev, mii_phy);
1294 netif_carrier_on(net_dev);
1295 }
1296 } else {
1297 /* Link ON -> OFF */
1298 if (!(status & MII_STAT_LINK)){
1299 netif_carrier_off(net_dev);
1300 if(netif_msg_link(sis_priv))
1301 printk(KERN_INFO "%s: Media Link Off\n", net_dev->name);
1302
1303 /* Change mode issue */
1304 if ((mii_phy->phy_id0 == 0x001D) &&
1305 ((mii_phy->phy_id1 & 0xFFF0) == 0x8000))
1306 sis900_reset_phy(net_dev, sis_priv->cur_phy);
1307
1308 sis630_set_eq(net_dev, sis_priv->chipset_rev);
1309
1310 goto LookForLink;
1311 }
1312 }
1313
1314 sis_priv->timer.expires = jiffies + next_tick;
1315 add_timer(&sis_priv->timer);
1316}
1317
1318/**
1319 * sis900_check_mode - check the media mode for sis900
1320 * @net_dev: the net device to be checked
1321 * @mii_phy: the mii phy
1322 *
1323 * Older driver gets the media mode from mii status output
1324 * register. Now we set our media capability and auto-negotiate
1325 * to get the upper bound of speed and duplex between two ends.
1326 * If the types of mii phy is HOME, it doesn't need to auto-negotiate
1327 * and autong_complete should be set to 1.
1328 */
1329
1330static void sis900_check_mode(struct net_device *net_dev, struct mii_phy *mii_phy)
1331{
1332 struct sis900_private *sis_priv = net_dev->priv;
1333 long ioaddr = net_dev->base_addr;
1334 int speed, duplex;
1335
1336 if (mii_phy->phy_types == LAN) {
1337 outl(~EXD & inl(ioaddr + cfg), ioaddr + cfg);
1338 sis900_set_capability(net_dev , mii_phy);
1339 sis900_auto_negotiate(net_dev, sis_priv->cur_phy);
1340 } else {
1341 outl(EXD | inl(ioaddr + cfg), ioaddr + cfg);
1342 speed = HW_SPEED_HOME;
1343 duplex = FDX_CAPABLE_HALF_SELECTED;
1344 sis900_set_mode(ioaddr, speed, duplex);
1345 sis_priv->autong_complete = 1;
1346 }
1347}
1348
1349/**
1350 * sis900_set_mode - Set the media mode of mac register.
1351 * @ioaddr: the address of the device
1352 * @speed : the transmit speed to be determined
1353 * @duplex: the duplex mode to be determined
1354 *
1355 * Set the media mode of mac register txcfg/rxcfg according to
1356 * speed and duplex of phy. Bit EDB_MASTER_EN indicates the EDB
1357 * bus is used instead of PCI bus. When this bit is set 1, the
1358 * Max DMA Burst Size for TX/RX DMA should be no larger than 16
1359 * double words.
1360 */
1361
1362static void sis900_set_mode (long ioaddr, int speed, int duplex)
1363{
1364 u32 tx_flags = 0, rx_flags = 0;
1365
1366 if (inl(ioaddr + cfg) & EDB_MASTER_EN) {
1367 tx_flags = TxATP | (DMA_BURST_64 << TxMXDMA_shift) |
1368 (TX_FILL_THRESH << TxFILLT_shift);
1369 rx_flags = DMA_BURST_64 << RxMXDMA_shift;
1370 } else {
1371 tx_flags = TxATP | (DMA_BURST_512 << TxMXDMA_shift) |
1372 (TX_FILL_THRESH << TxFILLT_shift);
1373 rx_flags = DMA_BURST_512 << RxMXDMA_shift;
1374 }
1375
1376 if (speed == HW_SPEED_HOME || speed == HW_SPEED_10_MBPS) {
1377 rx_flags |= (RxDRNT_10 << RxDRNT_shift);
1378 tx_flags |= (TxDRNT_10 << TxDRNT_shift);
1379 } else {
1380 rx_flags |= (RxDRNT_100 << RxDRNT_shift);
1381 tx_flags |= (TxDRNT_100 << TxDRNT_shift);
1382 }
1383
1384 if (duplex == FDX_CAPABLE_FULL_SELECTED) {
1385 tx_flags |= (TxCSI | TxHBI);
1386 rx_flags |= RxATX;
1387 }
1388
1389 outl (tx_flags, ioaddr + txcfg);
1390 outl (rx_flags, ioaddr + rxcfg);
1391}
1392
1393/**
1394 * sis900_auto_negotiate - Set the Auto-Negotiation Enable/Reset bit.
1395 * @net_dev: the net device to read mode for
1396 * @phy_addr: mii phy address
1397 *
1398 * If the adapter is link-on, set the auto-negotiate enable/reset bit.
1399 * autong_complete should be set to 0 when starting auto-negotiation.
1400 * autong_complete should be set to 1 if we didn't start auto-negotiation.
1401 * sis900_timer will wait for link on again if autong_complete = 0.
1402 */
1403
1404static void sis900_auto_negotiate(struct net_device *net_dev, int phy_addr)
1405{
1406 struct sis900_private *sis_priv = net_dev->priv;
1407 int i = 0;
1408 u32 status;
1409
1410 while (i++ < 2)
1411 status = mdio_read(net_dev, phy_addr, MII_STATUS);
1412
1413 if (!(status & MII_STAT_LINK)){
1414 if(netif_msg_link(sis_priv))
1415 printk(KERN_INFO "%s: Media Link Off\n", net_dev->name);
1416 sis_priv->autong_complete = 1;
1417 netif_carrier_off(net_dev);
1418 return;
1419 }
1420
1421 /* (Re)start AutoNegotiate */
1422 mdio_write(net_dev, phy_addr, MII_CONTROL,
1423 MII_CNTL_AUTO | MII_CNTL_RST_AUTO);
1424 sis_priv->autong_complete = 0;
1425}
1426
1427
1428/**
1429 * sis900_read_mode - read media mode for sis900 internal phy
1430 * @net_dev: the net device to read mode for
1431 * @speed : the transmit speed to be determined
1432 * @duplex : the duplex mode to be determined
1433 *
1434 * The capability of remote end will be put in mii register autorec
1435 * after auto-negotiation. Use AND operation to get the upper bound
1436 * of speed and duplex between two ends.
1437 */
1438
1439static void sis900_read_mode(struct net_device *net_dev, int *speed, int *duplex)
1440{
1441 struct sis900_private *sis_priv = net_dev->priv;
1442 struct mii_phy *phy = sis_priv->mii;
1443 int phy_addr = sis_priv->cur_phy;
1444 u32 status;
1445 u16 autoadv, autorec;
1446 int i = 0;
1447
1448 while (i++ < 2)
1449 status = mdio_read(net_dev, phy_addr, MII_STATUS);
1450
1451 if (!(status & MII_STAT_LINK))
1452 return;
1453
1454 /* AutoNegotiate completed */
1455 autoadv = mdio_read(net_dev, phy_addr, MII_ANADV);
1456 autorec = mdio_read(net_dev, phy_addr, MII_ANLPAR);
1457 status = autoadv & autorec;
1458
1459 *speed = HW_SPEED_10_MBPS;
1460 *duplex = FDX_CAPABLE_HALF_SELECTED;
1461
1462 if (status & (MII_NWAY_TX | MII_NWAY_TX_FDX))
1463 *speed = HW_SPEED_100_MBPS;
1464 if (status & ( MII_NWAY_TX_FDX | MII_NWAY_T_FDX))
1465 *duplex = FDX_CAPABLE_FULL_SELECTED;
1466
1467 sis_priv->autong_complete = 1;
1468
1469 /* Workaround for Realtek RTL8201 PHY issue */
1470 if ((phy->phy_id0 == 0x0000) && ((phy->phy_id1 & 0xFFF0) == 0x8200)) {
1471 if (mdio_read(net_dev, phy_addr, MII_CONTROL) & MII_CNTL_FDX)
1472 *duplex = FDX_CAPABLE_FULL_SELECTED;
1473 if (mdio_read(net_dev, phy_addr, 0x0019) & 0x01)
1474 *speed = HW_SPEED_100_MBPS;
1475 }
1476
1477 if(netif_msg_link(sis_priv))
1478 printk(KERN_INFO "%s: Media Link On %s %s-duplex \n",
1479 net_dev->name,
1480 *speed == HW_SPEED_100_MBPS ?
1481 "100mbps" : "10mbps",
1482 *duplex == FDX_CAPABLE_FULL_SELECTED ?
1483 "full" : "half");
1484}
1485
1486/**
1487 * sis900_tx_timeout - sis900 transmit timeout routine
1488 * @net_dev: the net device to transmit
1489 *
1490 * print transmit timeout status
1491 * disable interrupts and do some tasks
1492 */
1493
1494static void sis900_tx_timeout(struct net_device *net_dev)
1495{
1496 struct sis900_private *sis_priv = net_dev->priv;
1497 long ioaddr = net_dev->base_addr;
1498 unsigned long flags;
1499 int i;
1500
1501 if(netif_msg_tx_err(sis_priv))
1502 printk(KERN_INFO "%s: Transmit timeout, status %8.8x %8.8x \n",
1503 net_dev->name, inl(ioaddr + cr), inl(ioaddr + isr));
1504
1505 /* Disable interrupts by clearing the interrupt mask. */
1506 outl(0x0000, ioaddr + imr);
1507
1508 /* use spinlock to prevent interrupt handler accessing buffer ring */
1509 spin_lock_irqsave(&sis_priv->lock, flags);
1510
1511 /* discard unsent packets */
1512 sis_priv->dirty_tx = sis_priv->cur_tx = 0;
1513 for (i = 0; i < NUM_TX_DESC; i++) {
1514 struct sk_buff *skb = sis_priv->tx_skbuff[i];
1515
1516 if (skb) {
1517 pci_unmap_single(sis_priv->pci_dev,
1518 sis_priv->tx_ring[i].bufptr, skb->len,
1519 PCI_DMA_TODEVICE);
1520 dev_kfree_skb_irq(skb);
1521 sis_priv->tx_skbuff[i] = NULL;
1522 sis_priv->tx_ring[i].cmdsts = 0;
1523 sis_priv->tx_ring[i].bufptr = 0;
1524 sis_priv->stats.tx_dropped++;
1525 }
1526 }
1527 sis_priv->tx_full = 0;
1528 netif_wake_queue(net_dev);
1529
1530 spin_unlock_irqrestore(&sis_priv->lock, flags);
1531
1532 net_dev->trans_start = jiffies;
1533
1534 /* load Transmit Descriptor Register */
1535 outl(sis_priv->tx_ring_dma, ioaddr + txdp);
1536
1537 /* Enable all known interrupts by setting the interrupt mask. */
1538 outl((RxSOVR|RxORN|RxERR|RxOK|TxURN|TxERR|TxIDLE), ioaddr + imr);
1539 return;
1540}
1541
1542/**
1543 * sis900_start_xmit - sis900 start transmit routine
1544 * @skb: socket buffer pointer to put the data being transmitted
1545 * @net_dev: the net device to transmit with
1546 *
1547 * Set the transmit buffer descriptor,
1548 * and write TxENA to enable transmit state machine.
1549 * tell upper layer if the buffer is full
1550 */
1551
1552static int
1553sis900_start_xmit(struct sk_buff *skb, struct net_device *net_dev)
1554{
1555 struct sis900_private *sis_priv = net_dev->priv;
1556 long ioaddr = net_dev->base_addr;
1557 unsigned int entry;
1558 unsigned long flags;
1559 unsigned int index_cur_tx, index_dirty_tx;
1560 unsigned int count_dirty_tx;
1561
1562 /* Don't transmit data before the complete of auto-negotiation */
1563 if(!sis_priv->autong_complete){
1564 netif_stop_queue(net_dev);
1565 return 1;
1566 }
1567
1568 spin_lock_irqsave(&sis_priv->lock, flags);
1569
1570 /* Calculate the next Tx descriptor entry. */
1571 entry = sis_priv->cur_tx % NUM_TX_DESC;
1572 sis_priv->tx_skbuff[entry] = skb;
1573
1574 /* set the transmit buffer descriptor and enable Transmit State Machine */
1575 sis_priv->tx_ring[entry].bufptr = pci_map_single(sis_priv->pci_dev,
1576 skb->data, skb->len, PCI_DMA_TODEVICE);
1577 sis_priv->tx_ring[entry].cmdsts = (OWN | skb->len);
1578 outl(TxENA | inl(ioaddr + cr), ioaddr + cr);
1579
1580 sis_priv->cur_tx ++;
1581 index_cur_tx = sis_priv->cur_tx;
1582 index_dirty_tx = sis_priv->dirty_tx;
1583
1584 for (count_dirty_tx = 0; index_cur_tx != index_dirty_tx; index_dirty_tx++)
1585 count_dirty_tx ++;
1586
1587 if (index_cur_tx == index_dirty_tx) {
1588 /* dirty_tx is met in the cycle of cur_tx, buffer full */
1589 sis_priv->tx_full = 1;
1590 netif_stop_queue(net_dev);
1591 } else if (count_dirty_tx < NUM_TX_DESC) {
1592 /* Typical path, tell upper layer that more transmission is possible */
1593 netif_start_queue(net_dev);
1594 } else {
1595 /* buffer full, tell upper layer no more transmission */
1596 sis_priv->tx_full = 1;
1597 netif_stop_queue(net_dev);
1598 }
1599
1600 spin_unlock_irqrestore(&sis_priv->lock, flags);
1601
1602 net_dev->trans_start = jiffies;
1603
1604 if (netif_msg_tx_queued(sis_priv))
1605 printk(KERN_DEBUG "%s: Queued Tx packet at %p size %d "
1606 "to slot %d.\n",
1607 net_dev->name, skb->data, (int)skb->len, entry);
1608
1609 return 0;
1610}
1611
1612/**
1613 * sis900_interrupt - sis900 interrupt handler
1614 * @irq: the irq number
1615 * @dev_instance: the client data object
1616 * @regs: snapshot of processor context
1617 *
1618 * The interrupt handler does all of the Rx thread work,
1619 * and cleans up after the Tx thread
1620 */
1621
1622static irqreturn_t sis900_interrupt(int irq, void *dev_instance, struct pt_regs *regs)
1623{
1624 struct net_device *net_dev = dev_instance;
1625 struct sis900_private *sis_priv = net_dev->priv;
1626 int boguscnt = max_interrupt_work;
1627 long ioaddr = net_dev->base_addr;
1628 u32 status;
1629 unsigned int handled = 0;
1630
1631 spin_lock (&sis_priv->lock);
1632
1633 do {
1634 status = inl(ioaddr + isr);
1635
1636 if ((status & (HIBERR|TxURN|TxERR|TxIDLE|RxORN|RxERR|RxOK)) == 0)
1637 /* nothing intresting happened */
1638 break;
1639 handled = 1;
1640
1641 /* why dow't we break after Tx/Rx case ?? keyword: full-duplex */
1642 if (status & (RxORN | RxERR | RxOK))
1643 /* Rx interrupt */
1644 sis900_rx(net_dev);
1645
1646 if (status & (TxURN | TxERR | TxIDLE))
1647 /* Tx interrupt */
1648 sis900_finish_xmit(net_dev);
1649
1650 /* something strange happened !!! */
1651 if (status & HIBERR) {
1652 if(netif_msg_intr(sis_priv))
1653 printk(KERN_INFO "%s: Abnormal interrupt,"
1654 "status %#8.8x.\n", net_dev->name, status);
1655 break;
1656 }
1657 if (--boguscnt < 0) {
1658 if(netif_msg_intr(sis_priv))
1659 printk(KERN_INFO "%s: Too much work at interrupt, "
1660 "interrupt status = %#8.8x.\n",
1661 net_dev->name, status);
1662 break;
1663 }
1664 } while (1);
1665
1666 if(netif_msg_intr(sis_priv))
1667 printk(KERN_DEBUG "%s: exiting interrupt, "
1668 "interrupt status = 0x%#8.8x.\n",
1669 net_dev->name, inl(ioaddr + isr));
1670
1671 spin_unlock (&sis_priv->lock);
1672 return IRQ_RETVAL(handled);
1673}
1674
1675/**
1676 * sis900_rx - sis900 receive routine
1677 * @net_dev: the net device which receives data
1678 *
1679 * Process receive interrupt events,
1680 * put buffer to higher layer and refill buffer pool
1681 * Note: This fucntion is called by interrupt handler,
1682 * don't do "too much" work here
1683 */
1684
1685static int sis900_rx(struct net_device *net_dev)
1686{
1687 struct sis900_private *sis_priv = net_dev->priv;
1688 long ioaddr = net_dev->base_addr;
1689 unsigned int entry = sis_priv->cur_rx % NUM_RX_DESC;
1690 u32 rx_status = sis_priv->rx_ring[entry].cmdsts;
1691
1692 if (netif_msg_rx_status(sis_priv))
1693 printk(KERN_DEBUG "sis900_rx, cur_rx:%4.4d, dirty_rx:%4.4d "
1694 "status:0x%8.8x\n",
1695 sis_priv->cur_rx, sis_priv->dirty_rx, rx_status);
1696
1697 while (rx_status & OWN) {
1698 unsigned int rx_size;
1699
1700 rx_size = (rx_status & DSIZE) - CRC_SIZE;
1701
1702 if (rx_status & (ABORT|OVERRUN|TOOLONG|RUNT|RXISERR|CRCERR|FAERR)) {
1703 /* corrupted packet received */
1704 if (netif_msg_rx_err(sis_priv))
1705 printk(KERN_DEBUG "%s: Corrupted packet "
1706 "received, buffer status = 0x%8.8x.\n",
1707 net_dev->name, rx_status);
1708 sis_priv->stats.rx_errors++;
1709 if (rx_status & OVERRUN)
1710 sis_priv->stats.rx_over_errors++;
1711 if (rx_status & (TOOLONG|RUNT))
1712 sis_priv->stats.rx_length_errors++;
1713 if (rx_status & (RXISERR | FAERR))
1714 sis_priv->stats.rx_frame_errors++;
1715 if (rx_status & CRCERR)
1716 sis_priv->stats.rx_crc_errors++;
1717 /* reset buffer descriptor state */
1718 sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE;
1719 } else {
1720 struct sk_buff * skb;
1721
1722 /* This situation should never happen, but due to
1723 some unknow bugs, it is possible that
1724 we are working on NULL sk_buff :-( */
1725 if (sis_priv->rx_skbuff[entry] == NULL) {
1726 if (netif_msg_rx_err(sis_priv))
1727 printk(KERN_INFO "%s: NULL pointer "
1728 "encountered in Rx ring, skipping\n",
1729 net_dev->name);
1730 break;
1731 }
1732
1733 pci_unmap_single(sis_priv->pci_dev,
1734 sis_priv->rx_ring[entry].bufptr, RX_BUF_SIZE,
1735 PCI_DMA_FROMDEVICE);
1736 /* give the socket buffer to upper layers */
1737 skb = sis_priv->rx_skbuff[entry];
1738 skb_put(skb, rx_size);
1739 skb->protocol = eth_type_trans(skb, net_dev);
1740 netif_rx(skb);
1741
1742 /* some network statistics */
1743 if ((rx_status & BCAST) == MCAST)
1744 sis_priv->stats.multicast++;
1745 net_dev->last_rx = jiffies;
1746 sis_priv->stats.rx_bytes += rx_size;
1747 sis_priv->stats.rx_packets++;
1748
1749 /* refill the Rx buffer, what if there is not enought
1750 * memory for new socket buffer ?? */
1751 if ((skb = dev_alloc_skb(RX_BUF_SIZE)) == NULL) {
1752 /* not enough memory for skbuff, this makes a
1753 * "hole" on the buffer ring, it is not clear
1754 * how the hardware will react to this kind
1755 * of degenerated buffer */
1756 if (netif_msg_rx_status(sis_priv))
1757 printk(KERN_INFO "%s: Memory squeeze,"
1758 "deferring packet.\n",
1759 net_dev->name);
1760 sis_priv->rx_skbuff[entry] = NULL;
1761 /* reset buffer descriptor state */
1762 sis_priv->rx_ring[entry].cmdsts = 0;
1763 sis_priv->rx_ring[entry].bufptr = 0;
1764 sis_priv->stats.rx_dropped++;
1765 break;
1766 }
1767 skb->dev = net_dev;
1768 sis_priv->rx_skbuff[entry] = skb;
1769 sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE;
1770 sis_priv->rx_ring[entry].bufptr =
1771 pci_map_single(sis_priv->pci_dev, skb->tail,
1772 RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1773 sis_priv->dirty_rx++;
1774 }
1775 sis_priv->cur_rx++;
1776 entry = sis_priv->cur_rx % NUM_RX_DESC;
1777 rx_status = sis_priv->rx_ring[entry].cmdsts;
1778 } // while
1779
1780 /* refill the Rx buffer, what if the rate of refilling is slower
1781 * than consuming ?? */
1782 for (;sis_priv->cur_rx - sis_priv->dirty_rx > 0; sis_priv->dirty_rx++) {
1783 struct sk_buff *skb;
1784
1785 entry = sis_priv->dirty_rx % NUM_RX_DESC;
1786
1787 if (sis_priv->rx_skbuff[entry] == NULL) {
1788 if ((skb = dev_alloc_skb(RX_BUF_SIZE)) == NULL) {
1789 /* not enough memory for skbuff, this makes a
1790 * "hole" on the buffer ring, it is not clear
1791 * how the hardware will react to this kind
1792 * of degenerated buffer */
1793 if (netif_msg_rx_err(sis_priv))
1794 printk(KERN_INFO "%s: Memory squeeze,"
1795 "deferring packet.\n",
1796 net_dev->name);
1797 sis_priv->stats.rx_dropped++;
1798 break;
1799 }
1800 skb->dev = net_dev;
1801 sis_priv->rx_skbuff[entry] = skb;
1802 sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE;
1803 sis_priv->rx_ring[entry].bufptr =
1804 pci_map_single(sis_priv->pci_dev, skb->tail,
1805 RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1806 }
1807 }
1808 /* re-enable the potentially idle receive state matchine */
1809 outl(RxENA | inl(ioaddr + cr), ioaddr + cr );
1810
1811 return 0;
1812}
1813
1814/**
1815 * sis900_finish_xmit - finish up transmission of packets
1816 * @net_dev: the net device to be transmitted on
1817 *
1818 * Check for error condition and free socket buffer etc
1819 * schedule for more transmission as needed
1820 * Note: This fucntion is called by interrupt handler,
1821 * don't do "too much" work here
1822 */
1823
1824static void sis900_finish_xmit (struct net_device *net_dev)
1825{
1826 struct sis900_private *sis_priv = net_dev->priv;
1827
1828 for (; sis_priv->dirty_tx != sis_priv->cur_tx; sis_priv->dirty_tx++) {
1829 struct sk_buff *skb;
1830 unsigned int entry;
1831 u32 tx_status;
1832
1833 entry = sis_priv->dirty_tx % NUM_TX_DESC;
1834 tx_status = sis_priv->tx_ring[entry].cmdsts;
1835
1836 if (tx_status & OWN) {
1837 /* The packet is not transmitted yet (owned by hardware) !
1838 * Note: the interrupt is generated only when Tx Machine
1839 * is idle, so this is an almost impossible case */
1840 break;
1841 }
1842
1843 if (tx_status & (ABORT | UNDERRUN | OWCOLL)) {
1844 /* packet unsuccessfully transmitted */
1845 if (netif_msg_tx_err(sis_priv))
1846 printk(KERN_DEBUG "%s: Transmit "
1847 "error, Tx status %8.8x.\n",
1848 net_dev->name, tx_status);
1849 sis_priv->stats.tx_errors++;
1850 if (tx_status & UNDERRUN)
1851 sis_priv->stats.tx_fifo_errors++;
1852 if (tx_status & ABORT)
1853 sis_priv->stats.tx_aborted_errors++;
1854 if (tx_status & NOCARRIER)
1855 sis_priv->stats.tx_carrier_errors++;
1856 if (tx_status & OWCOLL)
1857 sis_priv->stats.tx_window_errors++;
1858 } else {
1859 /* packet successfully transmitted */
1860 sis_priv->stats.collisions += (tx_status & COLCNT) >> 16;
1861 sis_priv->stats.tx_bytes += tx_status & DSIZE;
1862 sis_priv->stats.tx_packets++;
1863 }
1864 /* Free the original skb. */
1865 skb = sis_priv->tx_skbuff[entry];
1866 pci_unmap_single(sis_priv->pci_dev,
1867 sis_priv->tx_ring[entry].bufptr, skb->len,
1868 PCI_DMA_TODEVICE);
1869 dev_kfree_skb_irq(skb);
1870 sis_priv->tx_skbuff[entry] = NULL;
1871 sis_priv->tx_ring[entry].bufptr = 0;
1872 sis_priv->tx_ring[entry].cmdsts = 0;
1873 }
1874
1875 if (sis_priv->tx_full && netif_queue_stopped(net_dev) &&
1876 sis_priv->cur_tx - sis_priv->dirty_tx < NUM_TX_DESC - 4) {
1877 /* The ring is no longer full, clear tx_full and schedule
1878 * more transmission by netif_wake_queue(net_dev) */
1879 sis_priv->tx_full = 0;
1880 netif_wake_queue (net_dev);
1881 }
1882}
1883
1884/**
1885 * sis900_close - close sis900 device
1886 * @net_dev: the net device to be closed
1887 *
1888 * Disable interrupts, stop the Tx and Rx Status Machine
1889 * free Tx and RX socket buffer
1890 */
1891
1892static int sis900_close(struct net_device *net_dev)
1893{
1894 long ioaddr = net_dev->base_addr;
1895 struct sis900_private *sis_priv = net_dev->priv;
1896 struct sk_buff *skb;
1897 int i;
1898
1899 netif_stop_queue(net_dev);
1900
1901 /* Disable interrupts by clearing the interrupt mask. */
1902 outl(0x0000, ioaddr + imr);
1903 outl(0x0000, ioaddr + ier);
1904
1905 /* Stop the chip's Tx and Rx Status Machine */
1906 outl(RxDIS | TxDIS | inl(ioaddr + cr), ioaddr + cr);
1907
1908 del_timer(&sis_priv->timer);
1909
1910 free_irq(net_dev->irq, net_dev);
1911
1912 /* Free Tx and RX skbuff */
1913 for (i = 0; i < NUM_RX_DESC; i++) {
1914 skb = sis_priv->rx_skbuff[i];
1915 if (skb) {
1916 pci_unmap_single(sis_priv->pci_dev,
1917 sis_priv->rx_ring[i].bufptr,
1918 RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1919 dev_kfree_skb(skb);
1920 sis_priv->rx_skbuff[i] = NULL;
1921 }
1922 }
1923 for (i = 0; i < NUM_TX_DESC; i++) {
1924 skb = sis_priv->tx_skbuff[i];
1925 if (skb) {
1926 pci_unmap_single(sis_priv->pci_dev,
1927 sis_priv->tx_ring[i].bufptr, skb->len,
1928 PCI_DMA_TODEVICE);
1929 dev_kfree_skb(skb);
1930 sis_priv->tx_skbuff[i] = NULL;
1931 }
1932 }
1933
1934 /* Green! Put the chip in low-power mode. */
1935
1936 return 0;
1937}
1938
1939/**
1940 * sis900_get_drvinfo - Return information about driver
1941 * @net_dev: the net device to probe
1942 * @info: container for info returned
1943 *
1944 * Process ethtool command such as "ehtool -i" to show information
1945 */
1946
1947static void sis900_get_drvinfo(struct net_device *net_dev,
1948 struct ethtool_drvinfo *info)
1949{
1950 struct sis900_private *sis_priv = net_dev->priv;
1951
1952 strcpy (info->driver, SIS900_MODULE_NAME);
1953 strcpy (info->version, SIS900_DRV_VERSION);
1954 strcpy (info->bus_info, pci_name(sis_priv->pci_dev));
1955}
1956
1957static u32 sis900_get_msglevel(struct net_device *net_dev)
1958{
1959 struct sis900_private *sis_priv = net_dev->priv;
1960 return sis_priv->msg_enable;
1961}
1962
1963static void sis900_set_msglevel(struct net_device *net_dev, u32 value)
1964{
1965 struct sis900_private *sis_priv = net_dev->priv;
1966 sis_priv->msg_enable = value;
1967}
1968
1969static struct ethtool_ops sis900_ethtool_ops = {
1970 .get_drvinfo = sis900_get_drvinfo,
1971 .get_msglevel = sis900_get_msglevel,
1972 .set_msglevel = sis900_set_msglevel,
1973};
1974
1975/**
1976 * mii_ioctl - process MII i/o control command
1977 * @net_dev: the net device to command for
1978 * @rq: parameter for command
1979 * @cmd: the i/o command
1980 *
1981 * Process MII command like read/write MII register
1982 */
1983
1984static int mii_ioctl(struct net_device *net_dev, struct ifreq *rq, int cmd)
1985{
1986 struct sis900_private *sis_priv = net_dev->priv;
1987 struct mii_ioctl_data *data = if_mii(rq);
1988
1989 switch(cmd) {
1990 case SIOCGMIIPHY: /* Get address of MII PHY in use. */
1991 data->phy_id = sis_priv->mii->phy_addr;
1992 /* Fall Through */
1993
1994 case SIOCGMIIREG: /* Read MII PHY register. */
1995 data->val_out = mdio_read(net_dev, data->phy_id & 0x1f, data->reg_num & 0x1f);
1996 return 0;
1997
1998 case SIOCSMIIREG: /* Write MII PHY register. */
1999 if (!capable(CAP_NET_ADMIN))
2000 return -EPERM;
2001 mdio_write(net_dev, data->phy_id & 0x1f, data->reg_num & 0x1f, data->val_in);
2002 return 0;
2003 default:
2004 return -EOPNOTSUPP;
2005 }
2006}
2007
2008/**
2009 * sis900_get_stats - Get sis900 read/write statistics
2010 * @net_dev: the net device to get statistics for
2011 *
2012 * get tx/rx statistics for sis900
2013 */
2014
2015static struct net_device_stats *
2016sis900_get_stats(struct net_device *net_dev)
2017{
2018 struct sis900_private *sis_priv = net_dev->priv;
2019
2020 return &sis_priv->stats;
2021}
2022
2023/**
2024 * sis900_set_config - Set media type by net_device.set_config
2025 * @dev: the net device for media type change
2026 * @map: ifmap passed by ifconfig
2027 *
2028 * Set media type to 10baseT, 100baseT or 0(for auto) by ifconfig
2029 * we support only port changes. All other runtime configuration
2030 * changes will be ignored
2031 */
2032
2033static int sis900_set_config(struct net_device *dev, struct ifmap *map)
2034{
2035 struct sis900_private *sis_priv = dev->priv;
2036 struct mii_phy *mii_phy = sis_priv->mii;
2037
2038 u16 status;
2039
2040 if ((map->port != (u_char)(-1)) && (map->port != dev->if_port)) {
2041 /* we switch on the ifmap->port field. I couldn't find anything
2042 * like a definition or standard for the values of that field.
2043 * I think the meaning of those values is device specific. But
2044 * since I would like to change the media type via the ifconfig
2045 * command I use the definition from linux/netdevice.h
2046 * (which seems to be different from the ifport(pcmcia) definition) */
2047 switch(map->port){
2048 case IF_PORT_UNKNOWN: /* use auto here */
2049 dev->if_port = map->port;
2050 /* we are going to change the media type, so the Link
2051 * will be temporary down and we need to reflect that
2052 * here. When the Link comes up again, it will be
2053 * sensed by the sis_timer procedure, which also does
2054 * all the rest for us */
2055 netif_carrier_off(dev);
2056
2057 /* read current state */
2058 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL);
2059
2060 /* enable auto negotiation and reset the negotioation
2061 * (I don't really know what the auto negatiotiation
2062 * reset really means, but it sounds for me right to
2063 * do one here) */
2064 mdio_write(dev, mii_phy->phy_addr,
2065 MII_CONTROL, status | MII_CNTL_AUTO | MII_CNTL_RST_AUTO);
2066
2067 break;
2068
2069 case IF_PORT_10BASET: /* 10BaseT */
2070 dev->if_port = map->port;
2071
2072 /* we are going to change the media type, so the Link
2073 * will be temporary down and we need to reflect that
2074 * here. When the Link comes up again, it will be
2075 * sensed by the sis_timer procedure, which also does
2076 * all the rest for us */
2077 netif_carrier_off(dev);
2078
2079 /* set Speed to 10Mbps */
2080 /* read current state */
2081 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL);
2082
2083 /* disable auto negotiation and force 10MBit mode*/
2084 mdio_write(dev, mii_phy->phy_addr,
2085 MII_CONTROL, status & ~(MII_CNTL_SPEED |
2086 MII_CNTL_AUTO));
2087 break;
2088
2089 case IF_PORT_100BASET: /* 100BaseT */
2090 case IF_PORT_100BASETX: /* 100BaseTx */
2091 dev->if_port = map->port;
2092
2093 /* we are going to change the media type, so the Link
2094 * will be temporary down and we need to reflect that
2095 * here. When the Link comes up again, it will be
2096 * sensed by the sis_timer procedure, which also does
2097 * all the rest for us */
2098 netif_carrier_off(dev);
2099
2100 /* set Speed to 100Mbps */
2101 /* disable auto negotiation and enable 100MBit Mode */
2102 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL);
2103 mdio_write(dev, mii_phy->phy_addr,
2104 MII_CONTROL, (status & ~MII_CNTL_SPEED) |
2105 MII_CNTL_SPEED);
2106
2107 break;
2108
2109 case IF_PORT_10BASE2: /* 10Base2 */
2110 case IF_PORT_AUI: /* AUI */
2111 case IF_PORT_100BASEFX: /* 100BaseFx */
2112 /* These Modes are not supported (are they?)*/
2113 return -EOPNOTSUPP;
2114 break;
2115
2116 default:
2117 return -EINVAL;
2118 }
2119 }
2120 return 0;
2121}
2122
2123/**
2124 * sis900_mcast_bitnr - compute hashtable index
2125 * @addr: multicast address
2126 * @revision: revision id of chip
2127 *
2128 * SiS 900 uses the most sigificant 7 bits to index a 128 bits multicast
2129 * hash table, which makes this function a little bit different from other drivers
2130 * SiS 900 B0 & 635 M/B uses the most significat 8 bits to index 256 bits
2131 * multicast hash table.
2132 */
2133
2134static inline u16 sis900_mcast_bitnr(u8 *addr, u8 revision)
2135{
2136
2137 u32 crc = ether_crc(6, addr);
2138
2139 /* leave 8 or 7 most siginifant bits */
2140 if ((revision >= SIS635A_900_REV) || (revision == SIS900B_900_REV))
2141 return ((int)(crc >> 24));
2142 else
2143 return ((int)(crc >> 25));
2144}
2145
2146/**
2147 * set_rx_mode - Set SiS900 receive mode
2148 * @net_dev: the net device to be set
2149 *
2150 * Set SiS900 receive mode for promiscuous, multicast, or broadcast mode.
2151 * And set the appropriate multicast filter.
2152 * Multicast hash table changes from 128 to 256 bits for 635M/B & 900B0.
2153 */
2154
2155static void set_rx_mode(struct net_device *net_dev)
2156{
2157 long ioaddr = net_dev->base_addr;
2158 struct sis900_private * sis_priv = net_dev->priv;
2159 u16 mc_filter[16] = {0}; /* 256/128 bits multicast hash table */
2160 int i, table_entries;
2161 u32 rx_mode;
2162
2163 /* 635 Hash Table entires = 256(2^16) */
2164 if((sis_priv->chipset_rev >= SIS635A_900_REV) ||
2165 (sis_priv->chipset_rev == SIS900B_900_REV))
2166 table_entries = 16;
2167 else
2168 table_entries = 8;
2169
2170 if (net_dev->flags & IFF_PROMISC) {
2171 /* Accept any kinds of packets */
2172 rx_mode = RFPromiscuous;
2173 for (i = 0; i < table_entries; i++)
2174 mc_filter[i] = 0xffff;
2175 } else if ((net_dev->mc_count > multicast_filter_limit) ||
2176 (net_dev->flags & IFF_ALLMULTI)) {
2177 /* too many multicast addresses or accept all multicast packet */
2178 rx_mode = RFAAB | RFAAM;
2179 for (i = 0; i < table_entries; i++)
2180 mc_filter[i] = 0xffff;
2181 } else {
2182 /* Accept Broadcast packet, destination address matchs our
2183 * MAC address, use Receive Filter to reject unwanted MCAST
2184 * packets */
2185 struct dev_mc_list *mclist;
2186 rx_mode = RFAAB;
2187 for (i = 0, mclist = net_dev->mc_list;
2188 mclist && i < net_dev->mc_count;
2189 i++, mclist = mclist->next) {
2190 unsigned int bit_nr =
2191 sis900_mcast_bitnr(mclist->dmi_addr, sis_priv->chipset_rev);
2192 mc_filter[bit_nr >> 4] |= (1 << (bit_nr & 0xf));
2193 }
2194 }
2195
2196 /* update Multicast Hash Table in Receive Filter */
2197 for (i = 0; i < table_entries; i++) {
2198 /* why plus 0x04 ??, That makes the correct value for hash table. */
2199 outl((u32)(0x00000004+i) << RFADDR_shift, ioaddr + rfcr);
2200 outl(mc_filter[i], ioaddr + rfdr);
2201 }
2202
2203 outl(RFEN | rx_mode, ioaddr + rfcr);
2204
2205 /* sis900 is capable of looping back packets at MAC level for
2206 * debugging purpose */
2207 if (net_dev->flags & IFF_LOOPBACK) {
2208 u32 cr_saved;
2209 /* We must disable Tx/Rx before setting loopback mode */
2210 cr_saved = inl(ioaddr + cr);
2211 outl(cr_saved | TxDIS | RxDIS, ioaddr + cr);
2212 /* enable loopback */
2213 outl(inl(ioaddr + txcfg) | TxMLB, ioaddr + txcfg);
2214 outl(inl(ioaddr + rxcfg) | RxATX, ioaddr + rxcfg);
2215 /* restore cr */
2216 outl(cr_saved, ioaddr + cr);
2217 }
2218
2219 return;
2220}
2221
2222/**
2223 * sis900_reset - Reset sis900 MAC
2224 * @net_dev: the net device to reset
2225 *
2226 * reset sis900 MAC and wait until finished
2227 * reset through command register
2228 * change backoff algorithm for 900B0 & 635 M/B
2229 */
2230
2231static void sis900_reset(struct net_device *net_dev)
2232{
2233 struct sis900_private * sis_priv = net_dev->priv;
2234 long ioaddr = net_dev->base_addr;
2235 int i = 0;
2236 u32 status = TxRCMP | RxRCMP;
2237
2238 outl(0, ioaddr + ier);
2239 outl(0, ioaddr + imr);
2240 outl(0, ioaddr + rfcr);
2241
2242 outl(RxRESET | TxRESET | RESET | inl(ioaddr + cr), ioaddr + cr);
2243
2244 /* Check that the chip has finished the reset. */
2245 while (status && (i++ < 1000)) {
2246 status ^= (inl(isr + ioaddr) & status);
2247 }
2248
2249 if( (sis_priv->chipset_rev >= SIS635A_900_REV) ||
2250 (sis_priv->chipset_rev == SIS900B_900_REV) )
2251 outl(PESEL | RND_CNT, ioaddr + cfg);
2252 else
2253 outl(PESEL, ioaddr + cfg);
2254}
2255
2256/**
2257 * sis900_remove - Remove sis900 device
2258 * @pci_dev: the pci device to be removed
2259 *
2260 * remove and release SiS900 net device
2261 */
2262
2263static void __devexit sis900_remove(struct pci_dev *pci_dev)
2264{
2265 struct net_device *net_dev = pci_get_drvdata(pci_dev);
2266 struct sis900_private * sis_priv = net_dev->priv;
2267 struct mii_phy *phy = NULL;
2268
2269 while (sis_priv->first_mii) {
2270 phy = sis_priv->first_mii;
2271 sis_priv->first_mii = phy->next;
2272 kfree(phy);
2273 }
2274
2275 pci_free_consistent(pci_dev, RX_TOTAL_SIZE, sis_priv->rx_ring,
2276 sis_priv->rx_ring_dma);
2277 pci_free_consistent(pci_dev, TX_TOTAL_SIZE, sis_priv->tx_ring,
2278 sis_priv->tx_ring_dma);
2279 unregister_netdev(net_dev);
2280 free_netdev(net_dev);
2281 pci_release_regions(pci_dev);
2282 pci_set_drvdata(pci_dev, NULL);
2283}
2284
2285#ifdef CONFIG_PM
2286
2287static int sis900_suspend(struct pci_dev *pci_dev, pm_message_t state)
2288{
2289 struct net_device *net_dev = pci_get_drvdata(pci_dev);
2290 long ioaddr = net_dev->base_addr;
2291
2292 if(!netif_running(net_dev))
2293 return 0;
2294
2295 netif_stop_queue(net_dev);
2296 netif_device_detach(net_dev);
2297
2298 /* Stop the chip's Tx and Rx Status Machine */
2299 outl(RxDIS | TxDIS | inl(ioaddr + cr), ioaddr + cr);
2300
2301 pci_set_power_state(pci_dev, PCI_D3hot);
2302 pci_save_state(pci_dev);
2303
2304 return 0;
2305}
2306
2307static int sis900_resume(struct pci_dev *pci_dev)
2308{
2309 struct net_device *net_dev = pci_get_drvdata(pci_dev);
2310 struct sis900_private *sis_priv = net_dev->priv;
2311 long ioaddr = net_dev->base_addr;
2312
2313 if(!netif_running(net_dev))
2314 return 0;
2315 pci_restore_state(pci_dev);
2316 pci_set_power_state(pci_dev, PCI_D0);
2317
2318 sis900_init_rxfilter(net_dev);
2319
2320 sis900_init_tx_ring(net_dev);
2321 sis900_init_rx_ring(net_dev);
2322
2323 set_rx_mode(net_dev);
2324
2325 netif_device_attach(net_dev);
2326 netif_start_queue(net_dev);
2327
2328 /* Workaround for EDB */
2329 sis900_set_mode(ioaddr, HW_SPEED_10_MBPS, FDX_CAPABLE_HALF_SELECTED);
2330
2331 /* Enable all known interrupts by setting the interrupt mask. */
2332 outl((RxSOVR|RxORN|RxERR|RxOK|TxURN|TxERR|TxIDLE), ioaddr + imr);
2333 outl(RxENA | inl(ioaddr + cr), ioaddr + cr);
2334 outl(IE, ioaddr + ier);
2335
2336 sis900_check_mode(net_dev, sis_priv->mii);
2337
2338 return 0;
2339}
2340#endif /* CONFIG_PM */
2341
2342static struct pci_driver sis900_pci_driver = {
2343 .name = SIS900_MODULE_NAME,
2344 .id_table = sis900_pci_tbl,
2345 .probe = sis900_probe,
2346 .remove = __devexit_p(sis900_remove),
2347#ifdef CONFIG_PM
2348 .suspend = sis900_suspend,
2349 .resume = sis900_resume,
2350#endif /* CONFIG_PM */
2351};
2352
2353static int __init sis900_init_module(void)
2354{
2355/* when a module, this is printed whether or not devices are found in probe */
2356#ifdef MODULE
2357 printk(version);
2358#endif
2359
2360 return pci_module_init(&sis900_pci_driver);
2361}
2362
2363static void __exit sis900_cleanup_module(void)
2364{
2365 pci_unregister_driver(&sis900_pci_driver);
2366}
2367
2368module_init(sis900_init_module);
2369module_exit(sis900_cleanup_module);
2370
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-11 00:47:21 -0500