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authorYoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>2011-03-07 16:59:38 -0500
committerDavid S. Miller <davem@davemloft.net>2011-03-14 17:10:14 -0400
commitc5ed53687b39c195b4730de8c0355c1b78054ba6 (patch)
tree273acc9e661d8d50ce3ccddcb18d933e387eeb5b /drivers/net/sh_eth.h
parent4986b996882d82c68ab54b822d7cfdd7dd35f19a (diff)
net: sh_eth: remove almost #ifdef of SH7763
The SH7763 has GETHER. So the specification of some registers differs than other CPUs. This patch removes almost #ifdef of CONFIG_CPU_SUBTYPE_SH7763. Then we are able to add other CPU's GETHER easily. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/sh_eth.h')
-rw-r--r--drivers/net/sh_eth.h14
1 files changed, 4 insertions, 10 deletions
diff --git a/drivers/net/sh_eth.h b/drivers/net/sh_eth.h
index 35a3adbb2e7a..b349c5e2bcda 100644
--- a/drivers/net/sh_eth.h
+++ b/drivers/net/sh_eth.h
@@ -400,20 +400,14 @@ enum GECMR_BIT {
400enum DMAC_M_BIT { 400enum DMAC_M_BIT {
401 EDMR_EL = 0x40, /* Litte endian */ 401 EDMR_EL = 0x40, /* Litte endian */
402 EDMR_DL1 = 0x20, EDMR_DL0 = 0x10, 402 EDMR_DL1 = 0x20, EDMR_DL0 = 0x10,
403#ifdef CONFIG_CPU_SUBTYPE_SH7763 403 EDMR_SRST_GETHER = 0x03,
404 EDMR_SRST = 0x03, 404 EDMR_SRST_ETHER = 0x01,
405#else /* CONFIG_CPU_SUBTYPE_SH7763 */
406 EDMR_SRST = 0x01,
407#endif
408}; 405};
409 406
410/* EDTRR */ 407/* EDTRR */
411enum DMAC_T_BIT { 408enum DMAC_T_BIT {
412#ifdef CONFIG_CPU_SUBTYPE_SH7763 409 EDTRR_TRNS_GETHER = 0x03,
413 EDTRR_TRNS = 0x03, 410 EDTRR_TRNS_ETHER = 0x01,
414#else
415 EDTRR_TRNS = 0x01,
416#endif
417}; 411};
418 412
419/* EDRRR*/ 413/* EDRRR*/