diff options
author | Ben Hutchings <bhutchings@solarflare.com> | 2010-02-03 04:28:14 -0500 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2010-02-03 22:12:43 -0500 |
commit | 5297a98d5dd6de86fe1e2ffc9ea60cdf59b71443 (patch) | |
tree | 5a3c49f3fe9a3eb148479489792853f53b6ccbcb /drivers/net/sfc | |
parent | 91e83432f8abc1fc93499a2323f6c4bd6026029e (diff) |
sfc: Update MCDI protocol definitions
Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/sfc')
-rw-r--r-- | drivers/net/sfc/mcdi_pcol.h | 202 |
1 files changed, 179 insertions, 23 deletions
diff --git a/drivers/net/sfc/mcdi_pcol.h b/drivers/net/sfc/mcdi_pcol.h index 73e71f420624..bd59302695b3 100644 --- a/drivers/net/sfc/mcdi_pcol.h +++ b/drivers/net/sfc/mcdi_pcol.h | |||
@@ -786,16 +786,18 @@ | |||
786 | #define MC_CMD_GET_PHY_CFG_OUT_FLAGS_OFST 0 | 786 | #define MC_CMD_GET_PHY_CFG_OUT_FLAGS_OFST 0 |
787 | #define MC_CMD_GET_PHY_CFG_PRESENT_LBN 0 | 787 | #define MC_CMD_GET_PHY_CFG_PRESENT_LBN 0 |
788 | #define MC_CMD_GET_PHY_CFG_PRESENT_WIDTH 1 | 788 | #define MC_CMD_GET_PHY_CFG_PRESENT_WIDTH 1 |
789 | #define MC_CMD_GET_PHY_CFG_SHORTBIST_LBN 1 | 789 | #define MC_CMD_GET_PHY_CFG_BIST_CABLE_SHORT_LBN 1 |
790 | #define MC_CMD_GET_PHY_CFG_SHORTBIST_WIDTH 1 | 790 | #define MC_CMD_GET_PHY_CFG_BIST_CABLE_SHORT_WIDTH 1 |
791 | #define MC_CMD_GET_PHY_CFG_LONGBIST_LBN 2 | 791 | #define MC_CMD_GET_PHY_CFG_BIST_CABLE_LONG_LBN 2 |
792 | #define MC_CMD_GET_PHY_CFG_LONGBIST_WIDTH 1 | 792 | #define MC_CMD_GET_PHY_CFG_BIST_CABLE_LONG_WIDTH 1 |
793 | #define MC_CMD_GET_PHY_CFG_LOWPOWER_LBN 3 | 793 | #define MC_CMD_GET_PHY_CFG_LOWPOWER_LBN 3 |
794 | #define MC_CMD_GET_PHY_CFG_LOWPOWER_WIDTH 1 | 794 | #define MC_CMD_GET_PHY_CFG_LOWPOWER_WIDTH 1 |
795 | #define MC_CMD_GET_PHY_CFG_POWEROFF_LBN 4 | 795 | #define MC_CMD_GET_PHY_CFG_POWEROFF_LBN 4 |
796 | #define MC_CMD_GET_PHY_CFG_POWEROFF_WIDTH 1 | 796 | #define MC_CMD_GET_PHY_CFG_POWEROFF_WIDTH 1 |
797 | #define MC_CMD_GET_PHY_CFG_TXDIS_LBN 5 | 797 | #define MC_CMD_GET_PHY_CFG_TXDIS_LBN 5 |
798 | #define MC_CMD_GET_PHY_CFG_TXDIS_WIDTH 1 | 798 | #define MC_CMD_GET_PHY_CFG_TXDIS_WIDTH 1 |
799 | #define MC_CMD_GET_PHY_CFG_BIST_LBN 6 | ||
800 | #define MC_CMD_GET_PHY_CFG_BIST_WIDTH 1 | ||
799 | #define MC_CMD_GET_PHY_CFG_OUT_TYPE_OFST 4 | 801 | #define MC_CMD_GET_PHY_CFG_OUT_TYPE_OFST 4 |
800 | /* Bitmask of supported capabilities */ | 802 | /* Bitmask of supported capabilities */ |
801 | #define MC_CMD_GET_PHY_CFG_OUT_SUPPORTED_CAP_OFST 8 | 803 | #define MC_CMD_GET_PHY_CFG_OUT_SUPPORTED_CAP_OFST 8 |
@@ -832,7 +834,7 @@ | |||
832 | #define MC_CMD_GET_PHY_CFG_OUT_REVISION_OFST 52 | 834 | #define MC_CMD_GET_PHY_CFG_OUT_REVISION_OFST 52 |
833 | #define MC_CMD_GET_PHY_CFG_OUT_REVISION_LEN 20 | 835 | #define MC_CMD_GET_PHY_CFG_OUT_REVISION_LEN 20 |
834 | 836 | ||
835 | /* MC_CMD_START_PHY_BIST: | 837 | /* MC_CMD_START_BIST: |
836 | * Start a BIST test on the PHY. | 838 | * Start a BIST test on the PHY. |
837 | * | 839 | * |
838 | * Locks required: PHY_LOCK if doing a PHY BIST | 840 | * Locks required: PHY_LOCK if doing a PHY BIST |
@@ -840,34 +842,71 @@ | |||
840 | */ | 842 | */ |
841 | #define MC_CMD_START_BIST 0x25 | 843 | #define MC_CMD_START_BIST 0x25 |
842 | #define MC_CMD_START_BIST_IN_LEN 4 | 844 | #define MC_CMD_START_BIST_IN_LEN 4 |
843 | #define MC_CMD_START_BIST_TYPE_OFST 0 | 845 | #define MC_CMD_START_BIST_IN_TYPE_OFST 0 |
846 | #define MC_CMD_START_BIST_OUT_LEN 0 | ||
844 | 847 | ||
845 | /* Run the PHY's short BIST */ | 848 | /* Run the PHY's short cable BIST */ |
846 | #define MC_CMD_PHY_BIST_SHORT 1 | 849 | #define MC_CMD_PHY_BIST_CABLE_SHORT 1 |
847 | /* Run the PHY's long BIST */ | 850 | /* Run the PHY's long cable BIST */ |
848 | #define MC_CMD_PHY_BIST_LONG 2 | 851 | #define MC_CMD_PHY_BIST_CABLE_LONG 2 |
849 | /* Run BIST on the currently selected BPX Serdes (XAUI or XFI) */ | 852 | /* Run BIST on the currently selected BPX Serdes (XAUI or XFI) */ |
850 | #define MC_CMD_BPX_SERDES_BIST 3 | 853 | #define MC_CMD_BPX_SERDES_BIST 3 |
854 | /* Run the MC loopback tests */ | ||
855 | #define MC_CMD_MC_LOOPBACK_BIST 4 | ||
856 | /* Run the PHY's standard BIST */ | ||
857 | #define MC_CMD_PHY_BIST 5 | ||
851 | 858 | ||
852 | /* MC_CMD_POLL_PHY_BIST: (variadic output) | 859 | /* MC_CMD_POLL_PHY_BIST: (variadic output) |
853 | * Poll for BIST completion | 860 | * Poll for BIST completion |
854 | * | 861 | * |
855 | * Returns a single status code, and a binary blob of phy-specific | 862 | * Returns a single status code, and optionally some PHY specific |
856 | * bist output. If the driver can't succesfully parse the BIST output, | 863 | * bist output. The driver should only consume the BIST output |
857 | * it should still respect the Pass/Fail in OUT.RESULT. | 864 | * after validating OUTLEN and PHY_CFG.PHY_TYPE. |
858 | * | 865 | * |
859 | * Locks required: PHY_LOCK if doing a PHY BIST | 866 | * If a driver can't succesfully parse the BIST output, it should |
867 | * still respect the pass/Fail in OUT.RESULT | ||
868 | * | ||
869 | * Locks required: PHY_LOCK if doing a PHY BIST | ||
860 | * Return code: 0, EACCES (if PHY_LOCK is not held) | 870 | * Return code: 0, EACCES (if PHY_LOCK is not held) |
861 | */ | 871 | */ |
862 | #define MC_CMD_POLL_BIST 0x26 | 872 | #define MC_CMD_POLL_BIST 0x26 |
863 | #define MC_CMD_POLL_BIST_IN_LEN 0 | 873 | #define MC_CMD_POLL_BIST_IN_LEN 0 |
864 | #define MC_CMD_POLL_BIST_OUT_LEN UNKNOWN | 874 | #define MC_CMD_POLL_BIST_OUT_LEN UNKNOWN |
875 | #define MC_CMD_POLL_BIST_OUT_SFT9001_LEN 40 | ||
876 | #define MC_CMD_POLL_BIST_OUT_MRSFP_LEN 8 | ||
865 | #define MC_CMD_POLL_BIST_OUT_RESULT_OFST 0 | 877 | #define MC_CMD_POLL_BIST_OUT_RESULT_OFST 0 |
866 | #define MC_CMD_POLL_BIST_RUNNING 1 | 878 | #define MC_CMD_POLL_BIST_RUNNING 1 |
867 | #define MC_CMD_POLL_BIST_PASSED 2 | 879 | #define MC_CMD_POLL_BIST_PASSED 2 |
868 | #define MC_CMD_POLL_BIST_FAILED 3 | 880 | #define MC_CMD_POLL_BIST_FAILED 3 |
869 | #define MC_CMD_POLL_BIST_TIMEOUT 4 | 881 | #define MC_CMD_POLL_BIST_TIMEOUT 4 |
882 | /* Generic: */ | ||
870 | #define MC_CMD_POLL_BIST_OUT_PRIVATE_OFST 4 | 883 | #define MC_CMD_POLL_BIST_OUT_PRIVATE_OFST 4 |
884 | /* SFT9001-specific: */ | ||
885 | /* (offset 4 unused?) */ | ||
886 | #define MC_CMD_POLL_BIST_OUT_SFT9001_CABLE_LENGTH_A_OFST 8 | ||
887 | #define MC_CMD_POLL_BIST_OUT_SFT9001_CABLE_LENGTH_B_OFST 12 | ||
888 | #define MC_CMD_POLL_BIST_OUT_SFT9001_CABLE_LENGTH_C_OFST 16 | ||
889 | #define MC_CMD_POLL_BIST_OUT_SFT9001_CABLE_LENGTH_D_OFST 20 | ||
890 | #define MC_CMD_POLL_BIST_OUT_SFT9001_CABLE_STATUS_A_OFST 24 | ||
891 | #define MC_CMD_POLL_BIST_OUT_SFT9001_CABLE_STATUS_B_OFST 28 | ||
892 | #define MC_CMD_POLL_BIST_OUT_SFT9001_CABLE_STATUS_C_OFST 32 | ||
893 | #define MC_CMD_POLL_BIST_OUT_SFT9001_CABLE_STATUS_D_OFST 36 | ||
894 | #define MC_CMD_POLL_BIST_SFT9001_PAIR_OK 1 | ||
895 | #define MC_CMD_POLL_BIST_SFT9001_PAIR_OPEN 2 | ||
896 | #define MC_CMD_POLL_BIST_SFT9001_INTRA_PAIR_SHORT 3 | ||
897 | #define MC_CMD_POLL_BIST_SFT9001_INTER_PAIR_SHORT 4 | ||
898 | #define MC_CMD_POLL_BIST_SFT9001_PAIR_BUSY 9 | ||
899 | /* mrsfp "PHY" driver: */ | ||
900 | #define MC_CMD_POLL_BIST_OUT_MRSFP_TEST_OFST 4 | ||
901 | #define MC_CMD_POLL_BIST_MRSFP_TEST_COMPLETE 0 | ||
902 | #define MC_CMD_POLL_BIST_MRSFP_TEST_BUS_SWITCH_OFF_I2C_WRITE 1 | ||
903 | #define MC_CMD_POLL_BIST_MRSFP_TEST_BUS_SWITCH_OFF_I2C_NO_ACCESS_IO_EXP 2 | ||
904 | #define MC_CMD_POLL_BIST_MRSFP_TEST_BUS_SWITCH_OFF_I2C_NO_ACCESS_MODULE 3 | ||
905 | #define MC_CMD_POLL_BIST_MRSFP_TEST_IO_EXP_I2C_CONFIGURE 4 | ||
906 | #define MC_CMD_POLL_BIST_MRSFP_TEST_BUS_SWITCH_I2C_NO_CROSSTALK 5 | ||
907 | #define MC_CMD_POLL_BIST_MRSFP_TEST_MODULE_PRESENCE 6 | ||
908 | #define MC_CMD_POLL_BIST_MRSFP_TEST_MODULE_ID_I2C_ACCESS 7 | ||
909 | #define MC_CMD_POLL_BIST_MRSFP_TEST_MODULE_ID_SANE_VALUE 8 | ||
871 | 910 | ||
872 | /* MC_CMD_PHY_SPI: (variadic in, variadic out) | 911 | /* MC_CMD_PHY_SPI: (variadic in, variadic out) |
873 | * Read/Write/Erase the PHY SPI device | 912 | * Read/Write/Erase the PHY SPI device |
@@ -1206,6 +1245,13 @@ | |||
1206 | #define MC_CMD_WOL_FILTER_SET_IN_BITMAP_LAYER4_OFST \ | 1245 | #define MC_CMD_WOL_FILTER_SET_IN_BITMAP_LAYER4_OFST \ |
1207 | (MC_CMD_WOL_FILTER_SET_IN_DATA_OFST + 178) | 1246 | (MC_CMD_WOL_FILTER_SET_IN_DATA_OFST + 178) |
1208 | 1247 | ||
1248 | #define MC_CMD_WOL_FILTER_SET_IN_LINK_MASK_OFST \ | ||
1249 | MC_CMD_WOL_FILTER_SET_IN_DATA_OFST | ||
1250 | #define MC_CMD_WOL_FILTER_SET_IN_LINK_UP_LBN 0 | ||
1251 | #define MC_CMD_WOL_FILTER_SET_IN_LINK_UP_WIDTH 1 | ||
1252 | #define MC_CMD_WOL_FILTER_SET_IN_LINK_DOWN_LBN 1 | ||
1253 | #define MC_CMD_WOL_FILTER_SET_IN_LINK_DOWN_WIDTH 1 | ||
1254 | |||
1209 | #define MC_CMD_WOL_FILTER_SET_OUT_LEN 4 | 1255 | #define MC_CMD_WOL_FILTER_SET_OUT_LEN 4 |
1210 | #define MC_CMD_WOL_FILTER_SET_OUT_FILTER_ID_OFST 0 | 1256 | #define MC_CMD_WOL_FILTER_SET_OUT_FILTER_ID_OFST 0 |
1211 | 1257 | ||
@@ -1216,7 +1262,8 @@ | |||
1216 | #define MC_CMD_WOL_TYPE_IPV4_SYN 0x3 | 1262 | #define MC_CMD_WOL_TYPE_IPV4_SYN 0x3 |
1217 | #define MC_CMD_WOL_TYPE_IPV6_SYN 0x4 | 1263 | #define MC_CMD_WOL_TYPE_IPV6_SYN 0x4 |
1218 | #define MC_CMD_WOL_TYPE_BITMAP 0x5 | 1264 | #define MC_CMD_WOL_TYPE_BITMAP 0x5 |
1219 | #define MC_CMD_WOL_TYPE_MAX 0x6 | 1265 | #define MC_CMD_WOL_TYPE_LINK 0x6 |
1266 | #define MC_CMD_WOL_TYPE_MAX 0x7 | ||
1220 | 1267 | ||
1221 | #define MC_CMD_FILTER_MODE_SIMPLE 0x0 | 1268 | #define MC_CMD_FILTER_MODE_SIMPLE 0x0 |
1222 | #define MC_CMD_FILTER_MODE_STRUCTURED 0xffffffff | 1269 | #define MC_CMD_FILTER_MODE_STRUCTURED 0xffffffff |
@@ -1357,14 +1404,24 @@ | |||
1357 | * Returns: 0, EINVAL (bad type/offset/length), EACCES (if PHY_LOCK required and not held) | 1404 | * Returns: 0, EINVAL (bad type/offset/length), EACCES (if PHY_LOCK required and not held) |
1358 | */ | 1405 | */ |
1359 | #define MC_CMD_NVRAM_UPDATE_FINISH 0x3c | 1406 | #define MC_CMD_NVRAM_UPDATE_FINISH 0x3c |
1360 | #define MC_CMD_NVRAM_UPDATE_FINISH_IN_LEN 4 | 1407 | #define MC_CMD_NVRAM_UPDATE_FINISH_IN_LEN 8 |
1361 | #define MC_CMD_NVRAM_UPDATE_FINISH_IN_TYPE_OFST 0 | 1408 | #define MC_CMD_NVRAM_UPDATE_FINISH_IN_TYPE_OFST 0 |
1409 | #define MC_CMD_NVRAM_UPDATE_FINISH_IN_REBOOT_OFST 4 | ||
1362 | #define MC_CMD_NVRAM_UPDATE_FINISH_OUT_LEN 0 | 1410 | #define MC_CMD_NVRAM_UPDATE_FINISH_OUT_LEN 0 |
1363 | 1411 | ||
1364 | /* MC_CMD_REBOOT: | 1412 | /* MC_CMD_REBOOT: |
1365 | * Reboot the MC. The AFTER_ASSERTION flag is intended to be used | 1413 | * Reboot the MC. |
1366 | * when the driver notices an assertion failure, to allow two ports to | 1414 | * |
1367 | * both recover (semi-)gracefully. | 1415 | * The AFTER_ASSERTION flag is intended to be used when the driver notices |
1416 | * an assertion failure (at which point it is expected to perform a complete | ||
1417 | * tear down and reinitialise), to allow both ports to reset the MC once | ||
1418 | * in an atomic fashion. | ||
1419 | * | ||
1420 | * Production mc firmwares are generally compiled with REBOOT_ON_ASSERT=1, | ||
1421 | * which means that they will automatically reboot out of the assertion | ||
1422 | * handler, so this is in practise an optional operation. It is still | ||
1423 | * recommended that drivers execute this to support custom firmwares | ||
1424 | * with REBOOT_ON_ASSERT=0. | ||
1368 | * | 1425 | * |
1369 | * Locks required: NONE | 1426 | * Locks required: NONE |
1370 | * Returns: Nothing. You get back a response with ERR=1, DATALEN=0 | 1427 | * Returns: Nothing. You get back a response with ERR=1, DATALEN=0 |
@@ -1469,11 +1526,10 @@ | |||
1469 | ((_ofst) + 6) | 1526 | ((_ofst) + 6) |
1470 | 1527 | ||
1471 | /* MC_CMD_READ_SENSORS | 1528 | /* MC_CMD_READ_SENSORS |
1472 | * Returns the current (value, state) for each sensor | 1529 | * Returns the current reading from each sensor |
1473 | * | 1530 | * |
1474 | * Returns the current (value, state) [each 16bit] of each sensor supported by | 1531 | * Returns a sparse array of sensor readings (indexed by the sensor |
1475 | * this board, by DMA'ing a sparse array (indexed by the sensor type) into host | 1532 | * type) into host memory. Each array element is a dword. |
1476 | * memory. | ||
1477 | * | 1533 | * |
1478 | * The MC will send a SENSOREVT event every time any sensor changes state. The | 1534 | * The MC will send a SENSOREVT event every time any sensor changes state. The |
1479 | * driver is responsible for ensuring that it doesn't miss any events. The board | 1535 | * driver is responsible for ensuring that it doesn't miss any events. The board |
@@ -1486,6 +1542,12 @@ | |||
1486 | #define MC_CMD_READ_SENSORS_IN_DMA_ADDR_HI_OFST 4 | 1542 | #define MC_CMD_READ_SENSORS_IN_DMA_ADDR_HI_OFST 4 |
1487 | #define MC_CMD_READ_SENSORS_OUT_LEN 0 | 1543 | #define MC_CMD_READ_SENSORS_OUT_LEN 0 |
1488 | 1544 | ||
1545 | /* Sensor reading fields */ | ||
1546 | #define MC_CMD_READ_SENSOR_VALUE_LBN 0 | ||
1547 | #define MC_CMD_READ_SENSOR_VALUE_WIDTH 16 | ||
1548 | #define MC_CMD_READ_SENSOR_STATE_LBN 16 | ||
1549 | #define MC_CMD_READ_SENSOR_STATE_WIDTH 8 | ||
1550 | |||
1489 | 1551 | ||
1490 | /* MC_CMD_GET_PHY_STATE: | 1552 | /* MC_CMD_GET_PHY_STATE: |
1491 | * Report current state of PHY. A "zombie" PHY is a PHY that has failed to | 1553 | * Report current state of PHY. A "zombie" PHY is a PHY that has failed to |
@@ -1577,4 +1639,98 @@ | |||
1577 | #define MC_CMD_MAC_RESET_RESTORE_IN_LEN 0 | 1639 | #define MC_CMD_MAC_RESET_RESTORE_IN_LEN 0 |
1578 | #define MC_CMD_MAC_RESET_RESTORE_OUT_LEN 0 | 1640 | #define MC_CMD_MAC_RESET_RESTORE_OUT_LEN 0 |
1579 | 1641 | ||
1642 | |||
1643 | /* MC_CMD_TEST_ASSERT: | ||
1644 | * Deliberately trigger an assert-detonation in the firmware for testing | ||
1645 | * purposes (i.e. to allow tests that the driver copes gracefully). | ||
1646 | * | ||
1647 | * Locks required: None | ||
1648 | * Returns: 0 | ||
1649 | */ | ||
1650 | |||
1651 | #define MC_CMD_TESTASSERT 0x49 | ||
1652 | #define MC_CMD_TESTASSERT_IN_LEN 0 | ||
1653 | #define MC_CMD_TESTASSERT_OUT_LEN 0 | ||
1654 | |||
1655 | /* MC_CMD_WORKAROUND 0x4a | ||
1656 | * | ||
1657 | * Enable/Disable a given workaround. The mcfw will return EINVAL if it | ||
1658 | * doesn't understand the given workaround number - which should not | ||
1659 | * be treated as a hard error by client code. | ||
1660 | * | ||
1661 | * This op does not imply any semantics about each workaround, that's between | ||
1662 | * the driver and the mcfw on a per-workaround basis. | ||
1663 | * | ||
1664 | * Locks required: None | ||
1665 | * Returns: 0, EINVAL | ||
1666 | */ | ||
1667 | #define MC_CMD_WORKAROUND 0x4a | ||
1668 | #define MC_CMD_WORKAROUND_IN_LEN 8 | ||
1669 | #define MC_CMD_WORKAROUND_IN_TYPE_OFST 0 | ||
1670 | #define MC_CMD_WORKAROUND_BUG17230 1 | ||
1671 | #define MC_CMD_WORKAROUND_IN_ENABLED_OFST 4 | ||
1672 | #define MC_CMD_WORKAROUND_OUT_LEN 0 | ||
1673 | |||
1674 | /* MC_CMD_GET_PHY_MEDIA_INFO: | ||
1675 | * Read media-specific data from PHY (e.g. SFP/SFP+ module ID information for | ||
1676 | * SFP+ PHYs). | ||
1677 | * | ||
1678 | * The "media type" can be found via GET_PHY_CFG (GET_PHY_CFG_OUT_MEDIA_TYPE); | ||
1679 | * the valid "page number" input values, and the output data, are interpreted | ||
1680 | * on a per-type basis. | ||
1681 | * | ||
1682 | * For SFP+: PAGE=0 or 1 returns a 128-byte block read from module I2C address | ||
1683 | * 0xA0 offset 0 or 0x80. | ||
1684 | * Anything else: currently undefined. | ||
1685 | * | ||
1686 | * Locks required: None | ||
1687 | * Return code: 0 | ||
1688 | */ | ||
1689 | #define MC_CMD_GET_PHY_MEDIA_INFO 0x4b | ||
1690 | #define MC_CMD_GET_PHY_MEDIA_INFO_IN_LEN 4 | ||
1691 | #define MC_CMD_GET_PHY_MEDIA_INFO_IN_PAGE_OFST 0 | ||
1692 | #define MC_CMD_GET_PHY_MEDIA_INFO_OUT_LEN(_num_bytes) (4 + (_num_bytes)) | ||
1693 | #define MC_CMD_GET_PHY_MEDIA_INFO_OUT_DATALEN_OFST 0 | ||
1694 | #define MC_CMD_GET_PHY_MEDIA_INFO_OUT_DATA_OFST 4 | ||
1695 | |||
1696 | /* MC_CMD_NVRAM_TEST: | ||
1697 | * Test a particular NVRAM partition for valid contents (where "valid" | ||
1698 | * depends on the type of partition). | ||
1699 | * | ||
1700 | * Locks required: None | ||
1701 | * Return code: 0 | ||
1702 | */ | ||
1703 | #define MC_CMD_NVRAM_TEST 0x4c | ||
1704 | #define MC_CMD_NVRAM_TEST_IN_LEN 4 | ||
1705 | #define MC_CMD_NVRAM_TEST_IN_TYPE_OFST 0 | ||
1706 | #define MC_CMD_NVRAM_TEST_OUT_LEN 4 | ||
1707 | #define MC_CMD_NVRAM_TEST_OUT_RESULT_OFST 0 | ||
1708 | #define MC_CMD_NVRAM_TEST_PASS 0 | ||
1709 | #define MC_CMD_NVRAM_TEST_FAIL 1 | ||
1710 | #define MC_CMD_NVRAM_TEST_NOTSUPP 2 | ||
1711 | |||
1712 | /* MC_CMD_MRSFP_TWEAK: (debug) | ||
1713 | * Read status and/or set parameters for the "mrsfp" driver in mr_rusty builds. | ||
1714 | * I2C I/O expander bits are always read; if equaliser parameters are supplied, | ||
1715 | * they are configured first. | ||
1716 | * | ||
1717 | * Locks required: None | ||
1718 | * Return code: 0, EINVAL | ||
1719 | */ | ||
1720 | #define MC_CMD_MRSFP_TWEAK 0x4d | ||
1721 | #define MC_CMD_MRSFP_TWEAK_IN_LEN_READ_ONLY 0 | ||
1722 | #define MC_CMD_MRSFP_TWEAK_IN_LEN_EQ_CONFIG 16 | ||
1723 | #define MC_CMD_MRSFP_TWEAK_IN_TXEQ_LEVEL_OFST 0 /* 0-6 low->high de-emph. */ | ||
1724 | #define MC_CMD_MRSFP_TWEAK_IN_TXEQ_DT_CFG_OFST 4 /* 0-8 low->high ref.V */ | ||
1725 | #define MC_CMD_MRSFP_TWEAK_IN_RXEQ_BOOST_OFST 8 /* 0-8 low->high boost */ | ||
1726 | #define MC_CMD_MRSFP_TWEAK_IN_RXEQ_DT_CFG_OFST 12 /* 0-8 low->high ref.V */ | ||
1727 | #define MC_CMD_MRSFP_TWEAK_OUT_LEN 12 | ||
1728 | #define MC_CMD_MRSFP_TWEAK_OUT_IOEXP_INPUTS_OFST 0 /* input bits */ | ||
1729 | #define MC_CMD_MRSFP_TWEAK_OUT_IOEXP_OUTPUTS_OFST 4 /* output bits */ | ||
1730 | #define MC_CMD_MRSFP_TWEAK_OUT_IOEXP_DIRECTION_OFST 8 /* dirs: 0=out, 1=in */ | ||
1731 | |||
1732 | /* Do NOT add new commands beyond 0x4f as part of 3.0 : 0x50 - 0x7f will be | ||
1733 | * used for post-3.0 extensions. If you run out of space, look for gaps or | ||
1734 | * commands that are unused in the existing range. */ | ||
1735 | |||
1580 | #endif /* MCDI_PCOL_H */ | 1736 | #endif /* MCDI_PCOL_H */ |