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authorBen Hutchings <bhutchings@solarflare.com>2010-06-23 07:30:07 -0400
committerDavid S. Miller <davem@davemloft.net>2010-06-25 01:13:22 -0400
commit62776d034cc40c49bafdb3551a6ba35f78e3f08d (patch)
tree1cd2132940ced266ad53619a0c947e153cc83a5e /drivers/net/sfc/siena.c
parent0c605a2061670412d3b5580c92f1e161b1a693d2 (diff)
sfc: Implement message level control
Replace EFX_ERR() with netif_err(), EFX_INFO() with netif_info(), EFX_LOG() with netif_dbg() and EFX_TRACE() and EFX_REGDUMP() with netif_vdbg(). Replace EFX_ERR_RL(), EFX_INFO_RL() and EFX_LOG_RL() using explicit calls to net_ratelimit(). Implement the ethtool operations to get and set message level flags, and add a 'debug' module parameter for the initial value. Signed-off-by: Ben Hutchings <bhutchings@solarflare.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/sfc/siena.c')
-rw-r--r--drivers/net/sfc/siena.c42
1 files changed, 25 insertions, 17 deletions
diff --git a/drivers/net/sfc/siena.c b/drivers/net/sfc/siena.c
index f2b1e6180753..59d1dc6db1c6 100644
--- a/drivers/net/sfc/siena.c
+++ b/drivers/net/sfc/siena.c
@@ -118,10 +118,11 @@ static int siena_probe_port(struct efx_nic *efx)
118 MC_CMD_MAC_NSTATS * sizeof(u64)); 118 MC_CMD_MAC_NSTATS * sizeof(u64));
119 if (rc) 119 if (rc)
120 return rc; 120 return rc;
121 EFX_LOG(efx, "stats buffer at %llx (virt %p phys %llx)\n", 121 netif_dbg(efx, probe, efx->net_dev,
122 (u64)efx->stats_buffer.dma_addr, 122 "stats buffer at %llx (virt %p phys %llx)\n",
123 efx->stats_buffer.addr, 123 (u64)efx->stats_buffer.dma_addr,
124 (u64)virt_to_phys(efx->stats_buffer.addr)); 124 efx->stats_buffer.addr,
125 (u64)virt_to_phys(efx->stats_buffer.addr));
125 126
126 efx_mcdi_mac_stats(efx, efx->stats_buffer.dma_addr, 0, 0, 1); 127 efx_mcdi_mac_stats(efx, efx->stats_buffer.dma_addr, 0, 0, 1);
127 128
@@ -216,7 +217,8 @@ static int siena_probe_nic(struct efx_nic *efx)
216 efx->nic_data = nic_data; 217 efx->nic_data = nic_data;
217 218
218 if (efx_nic_fpga_ver(efx) != 0) { 219 if (efx_nic_fpga_ver(efx) != 0) {
219 EFX_ERR(efx, "Siena FPGA not supported\n"); 220 netif_err(efx, probe, efx->net_dev,
221 "Siena FPGA not supported\n");
220 rc = -ENODEV; 222 rc = -ENODEV;
221 goto fail1; 223 goto fail1;
222 } 224 }
@@ -233,8 +235,8 @@ static int siena_probe_nic(struct efx_nic *efx)
233 235
234 rc = efx_mcdi_fwver(efx, &nic_data->fw_version, &nic_data->fw_build); 236 rc = efx_mcdi_fwver(efx, &nic_data->fw_version, &nic_data->fw_build);
235 if (rc) { 237 if (rc) {
236 EFX_ERR(efx, "Failed to read MCPU firmware version - " 238 netif_err(efx, probe, efx->net_dev,
237 "rc %d\n", rc); 239 "Failed to read MCPU firmware version - rc %d\n", rc);
238 goto fail1; /* MCPU absent? */ 240 goto fail1; /* MCPU absent? */
239 } 241 }
240 242
@@ -242,17 +244,19 @@ static int siena_probe_nic(struct efx_nic *efx)
242 * filter settings. We must do this before we reset the NIC */ 244 * filter settings. We must do this before we reset the NIC */
243 rc = efx_mcdi_drv_attach(efx, true, &already_attached); 245 rc = efx_mcdi_drv_attach(efx, true, &already_attached);
244 if (rc) { 246 if (rc) {
245 EFX_ERR(efx, "Unable to register driver with MCPU\n"); 247 netif_err(efx, probe, efx->net_dev,
248 "Unable to register driver with MCPU\n");
246 goto fail2; 249 goto fail2;
247 } 250 }
248 if (already_attached) 251 if (already_attached)
249 /* Not a fatal error */ 252 /* Not a fatal error */
250 EFX_ERR(efx, "Host already registered with MCPU\n"); 253 netif_err(efx, probe, efx->net_dev,
254 "Host already registered with MCPU\n");
251 255
252 /* Now we can reset the NIC */ 256 /* Now we can reset the NIC */
253 rc = siena_reset_hw(efx, RESET_TYPE_ALL); 257 rc = siena_reset_hw(efx, RESET_TYPE_ALL);
254 if (rc) { 258 if (rc) {
255 EFX_ERR(efx, "failed to reset NIC\n"); 259 netif_err(efx, probe, efx->net_dev, "failed to reset NIC\n");
256 goto fail3; 260 goto fail3;
257 } 261 }
258 262
@@ -264,15 +268,17 @@ static int siena_probe_nic(struct efx_nic *efx)
264 goto fail4; 268 goto fail4;
265 BUG_ON(efx->irq_status.dma_addr & 0x0f); 269 BUG_ON(efx->irq_status.dma_addr & 0x0f);
266 270
267 EFX_LOG(efx, "INT_KER at %llx (virt %p phys %llx)\n", 271 netif_dbg(efx, probe, efx->net_dev,
268 (unsigned long long)efx->irq_status.dma_addr, 272 "INT_KER at %llx (virt %p phys %llx)\n",
269 efx->irq_status.addr, 273 (unsigned long long)efx->irq_status.dma_addr,
270 (unsigned long long)virt_to_phys(efx->irq_status.addr)); 274 efx->irq_status.addr,
275 (unsigned long long)virt_to_phys(efx->irq_status.addr));
271 276
272 /* Read in the non-volatile configuration */ 277 /* Read in the non-volatile configuration */
273 rc = siena_probe_nvconfig(efx); 278 rc = siena_probe_nvconfig(efx);
274 if (rc == -EINVAL) { 279 if (rc == -EINVAL) {
275 EFX_ERR(efx, "NVRAM is invalid therefore using defaults\n"); 280 netif_err(efx, probe, efx->net_dev,
281 "NVRAM is invalid therefore using defaults\n");
276 efx->phy_type = PHY_TYPE_NONE; 282 efx->phy_type = PHY_TYPE_NONE;
277 efx->mdio.prtad = MDIO_PRTAD_NONE; 283 efx->mdio.prtad = MDIO_PRTAD_NONE;
278 } else if (rc) { 284 } else if (rc) {
@@ -344,7 +350,8 @@ static int siena_init_nic(struct efx_nic *efx)
344 350
345 if (efx_nic_rx_xoff_thresh >= 0 || efx_nic_rx_xon_thresh >= 0) 351 if (efx_nic_rx_xoff_thresh >= 0 || efx_nic_rx_xon_thresh >= 0)
346 /* No MCDI operation has been defined to set thresholds */ 352 /* No MCDI operation has been defined to set thresholds */
347 EFX_ERR(efx, "ignoring RX flow control thresholds\n"); 353 netif_err(efx, hw, efx->net_dev,
354 "ignoring RX flow control thresholds\n");
348 355
349 /* Enable event logging */ 356 /* Enable event logging */
350 rc = efx_mcdi_log_ctrl(efx, true, false, 0); 357 rc = efx_mcdi_log_ctrl(efx, true, false, 0);
@@ -565,7 +572,8 @@ static int siena_set_wol(struct efx_nic *efx, u32 type)
565 572
566 return 0; 573 return 0;
567 fail: 574 fail:
568 EFX_ERR(efx, "%s failed: type=%d rc=%d\n", __func__, type, rc); 575 netif_err(efx, hw, efx->net_dev, "%s failed: type=%d rc=%d\n",
576 __func__, type, rc);
569 return rc; 577 return rc;
570} 578}
571 579