diff options
author | David S. Miller <davem@davemloft.net> | 2009-01-30 17:31:07 -0500 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2009-01-30 17:31:07 -0500 |
commit | 05bee4737774881e027bfd9a8b5c40a7d68f6325 (patch) | |
tree | 5fd32eb8fe345d2d30e85910beac241a4439e8cd /drivers/net/sfc/sfe4001.c | |
parent | 80595d59ba9917227856e663da249c2276a8628d (diff) | |
parent | 905db44087855e3c1709f538ecdc22fd149cadd8 (diff) |
Merge branch 'master' of master.kernel.org:/pub/scm/linux/kernel/git/davem/net-2.6
Conflicts:
drivers/net/e1000/e1000_main.c
Diffstat (limited to 'drivers/net/sfc/sfe4001.c')
-rw-r--r-- | drivers/net/sfc/sfe4001.c | 42 |
1 files changed, 33 insertions, 9 deletions
diff --git a/drivers/net/sfc/sfe4001.c b/drivers/net/sfc/sfe4001.c index d21d014bf0c1..c0e906831623 100644 --- a/drivers/net/sfc/sfe4001.c +++ b/drivers/net/sfc/sfe4001.c | |||
@@ -187,19 +187,22 @@ static int sfn4111t_reset(struct efx_nic *efx) | |||
187 | { | 187 | { |
188 | efx_oword_t reg; | 188 | efx_oword_t reg; |
189 | 189 | ||
190 | /* GPIO pins are also used for I2C, so block that temporarily */ | 190 | /* GPIO 3 and the GPIO register are shared with I2C, so block that */ |
191 | mutex_lock(&efx->i2c_adap.bus_lock); | 191 | mutex_lock(&efx->i2c_adap.bus_lock); |
192 | 192 | ||
193 | /* Pull RST_N (GPIO 2) low then let it up again, setting the | ||
194 | * FLASH_CFG_1 strap (GPIO 3) appropriately. Only change the | ||
195 | * output enables; the output levels should always be 0 (low) | ||
196 | * and we rely on external pull-ups. */ | ||
193 | falcon_read(efx, ®, GPIO_CTL_REG_KER); | 197 | falcon_read(efx, ®, GPIO_CTL_REG_KER); |
194 | EFX_SET_OWORD_FIELD(reg, GPIO2_OEN, true); | 198 | EFX_SET_OWORD_FIELD(reg, GPIO2_OEN, true); |
195 | EFX_SET_OWORD_FIELD(reg, GPIO2_OUT, false); | ||
196 | falcon_write(efx, ®, GPIO_CTL_REG_KER); | 199 | falcon_write(efx, ®, GPIO_CTL_REG_KER); |
197 | msleep(1000); | 200 | msleep(1000); |
198 | EFX_SET_OWORD_FIELD(reg, GPIO2_OUT, true); | 201 | EFX_SET_OWORD_FIELD(reg, GPIO2_OEN, false); |
199 | EFX_SET_OWORD_FIELD(reg, GPIO3_OEN, true); | 202 | EFX_SET_OWORD_FIELD(reg, GPIO3_OEN, |
200 | EFX_SET_OWORD_FIELD(reg, GPIO3_OUT, | 203 | !!(efx->phy_mode & PHY_MODE_SPECIAL)); |
201 | !(efx->phy_mode & PHY_MODE_SPECIAL)); | ||
202 | falcon_write(efx, ®, GPIO_CTL_REG_KER); | 204 | falcon_write(efx, ®, GPIO_CTL_REG_KER); |
205 | msleep(1); | ||
203 | 206 | ||
204 | mutex_unlock(&efx->i2c_adap.bus_lock); | 207 | mutex_unlock(&efx->i2c_adap.bus_lock); |
205 | 208 | ||
@@ -233,12 +236,18 @@ static ssize_t set_phy_flash_cfg(struct device *dev, | |||
233 | } else if (efx->state != STATE_RUNNING || netif_running(efx->net_dev)) { | 236 | } else if (efx->state != STATE_RUNNING || netif_running(efx->net_dev)) { |
234 | err = -EBUSY; | 237 | err = -EBUSY; |
235 | } else { | 238 | } else { |
239 | /* Reset the PHY, reconfigure the MAC and enable/disable | ||
240 | * MAC stats accordingly. */ | ||
236 | efx->phy_mode = new_mode; | 241 | efx->phy_mode = new_mode; |
242 | if (new_mode & PHY_MODE_SPECIAL) | ||
243 | efx_stats_disable(efx); | ||
237 | if (efx->board_info.type == EFX_BOARD_SFE4001) | 244 | if (efx->board_info.type == EFX_BOARD_SFE4001) |
238 | err = sfe4001_poweron(efx); | 245 | err = sfe4001_poweron(efx); |
239 | else | 246 | else |
240 | err = sfn4111t_reset(efx); | 247 | err = sfn4111t_reset(efx); |
241 | efx_reconfigure_port(efx); | 248 | efx_reconfigure_port(efx); |
249 | if (!(new_mode & PHY_MODE_SPECIAL)) | ||
250 | efx_stats_enable(efx); | ||
242 | } | 251 | } |
243 | rtnl_unlock(); | 252 | rtnl_unlock(); |
244 | 253 | ||
@@ -327,6 +336,11 @@ int sfe4001_init(struct efx_nic *efx) | |||
327 | efx->board_info.monitor = sfe4001_check_hw; | 336 | efx->board_info.monitor = sfe4001_check_hw; |
328 | efx->board_info.fini = sfe4001_fini; | 337 | efx->board_info.fini = sfe4001_fini; |
329 | 338 | ||
339 | if (efx->phy_mode & PHY_MODE_SPECIAL) { | ||
340 | /* PHY won't generate a 156.25 MHz clock and MAC stats fetch | ||
341 | * will fail. */ | ||
342 | efx_stats_disable(efx); | ||
343 | } | ||
330 | rc = sfe4001_poweron(efx); | 344 | rc = sfe4001_poweron(efx); |
331 | if (rc) | 345 | if (rc) |
332 | goto fail_ioexp; | 346 | goto fail_ioexp; |
@@ -373,17 +387,25 @@ static void sfn4111t_fini(struct efx_nic *efx) | |||
373 | i2c_unregister_device(efx->board_info.hwmon_client); | 387 | i2c_unregister_device(efx->board_info.hwmon_client); |
374 | } | 388 | } |
375 | 389 | ||
376 | static struct i2c_board_info sfn4111t_hwmon_info = { | 390 | static struct i2c_board_info sfn4111t_a0_hwmon_info = { |
377 | I2C_BOARD_INFO("max6647", 0x4e), | 391 | I2C_BOARD_INFO("max6647", 0x4e), |
378 | .irq = -1, | 392 | .irq = -1, |
379 | }; | 393 | }; |
380 | 394 | ||
395 | static struct i2c_board_info sfn4111t_r5_hwmon_info = { | ||
396 | I2C_BOARD_INFO("max6646", 0x4d), | ||
397 | .irq = -1, | ||
398 | }; | ||
399 | |||
381 | int sfn4111t_init(struct efx_nic *efx) | 400 | int sfn4111t_init(struct efx_nic *efx) |
382 | { | 401 | { |
383 | int rc; | 402 | int rc; |
384 | 403 | ||
385 | efx->board_info.hwmon_client = | 404 | efx->board_info.hwmon_client = |
386 | i2c_new_device(&efx->i2c_adap, &sfn4111t_hwmon_info); | 405 | i2c_new_device(&efx->i2c_adap, |
406 | (efx->board_info.minor < 5) ? | ||
407 | &sfn4111t_a0_hwmon_info : | ||
408 | &sfn4111t_r5_hwmon_info); | ||
387 | if (!efx->board_info.hwmon_client) | 409 | if (!efx->board_info.hwmon_client) |
388 | return -EIO; | 410 | return -EIO; |
389 | 411 | ||
@@ -395,8 +417,10 @@ int sfn4111t_init(struct efx_nic *efx) | |||
395 | if (rc) | 417 | if (rc) |
396 | goto fail_hwmon; | 418 | goto fail_hwmon; |
397 | 419 | ||
398 | if (efx->phy_mode & PHY_MODE_SPECIAL) | 420 | if (efx->phy_mode & PHY_MODE_SPECIAL) { |
421 | efx_stats_disable(efx); | ||
399 | sfn4111t_reset(efx); | 422 | sfn4111t_reset(efx); |
423 | } | ||
400 | 424 | ||
401 | return 0; | 425 | return 0; |
402 | 426 | ||