diff options
author | Ben Hutchings <bhutchings@solarflare.com> | 2010-04-28 05:30:43 -0400 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2010-04-28 15:44:44 -0400 |
commit | a4900ac9f7d10ad062e54dd03125e3619e0ac17a (patch) | |
tree | 32a6f316ccbda7994d5c52197d8a2b5ebb60d6da /drivers/net/sfc/nic.c | |
parent | 5298c37f4d1f0360082be9d9e3a236b9cc114a03 (diff) |
sfc: Create multiple TX queues
Create a core TX queue and 2 hardware TX queues for each channel.
If separate_tx_channels is set, create equal numbers of RX and TX
channels instead.
Rewrite the channel and queue iteration macros accordingly.
Eliminate efx_channel::used_flags as redundant.
Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/sfc/nic.c')
-rw-r--r-- | drivers/net/sfc/nic.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/drivers/net/sfc/nic.c b/drivers/net/sfc/nic.c index f3226bbf9831..5d3aaec58556 100644 --- a/drivers/net/sfc/nic.c +++ b/drivers/net/sfc/nic.c | |||
@@ -418,7 +418,7 @@ void efx_nic_init_tx(struct efx_tx_queue *tx_queue) | |||
418 | FRF_BZ_TX_NON_IP_DROP_DIS, 1); | 418 | FRF_BZ_TX_NON_IP_DROP_DIS, 1); |
419 | 419 | ||
420 | if (efx_nic_rev(efx) >= EFX_REV_FALCON_B0) { | 420 | if (efx_nic_rev(efx) >= EFX_REV_FALCON_B0) { |
421 | int csum = tx_queue->queue == EFX_TX_QUEUE_OFFLOAD_CSUM; | 421 | int csum = tx_queue->queue & EFX_TXQ_TYPE_OFFLOAD; |
422 | EFX_SET_OWORD_FIELD(tx_desc_ptr, FRF_BZ_TX_IP_CHKSM_DIS, !csum); | 422 | EFX_SET_OWORD_FIELD(tx_desc_ptr, FRF_BZ_TX_IP_CHKSM_DIS, !csum); |
423 | EFX_SET_OWORD_FIELD(tx_desc_ptr, FRF_BZ_TX_TCP_CHKSM_DIS, | 423 | EFX_SET_OWORD_FIELD(tx_desc_ptr, FRF_BZ_TX_TCP_CHKSM_DIS, |
424 | !csum); | 424 | !csum); |
@@ -431,10 +431,10 @@ void efx_nic_init_tx(struct efx_tx_queue *tx_queue) | |||
431 | efx_oword_t reg; | 431 | efx_oword_t reg; |
432 | 432 | ||
433 | /* Only 128 bits in this register */ | 433 | /* Only 128 bits in this register */ |
434 | BUILD_BUG_ON(EFX_TX_QUEUE_COUNT >= 128); | 434 | BUILD_BUG_ON(EFX_MAX_TX_QUEUES > 128); |
435 | 435 | ||
436 | efx_reado(efx, ®, FR_AA_TX_CHKSM_CFG); | 436 | efx_reado(efx, ®, FR_AA_TX_CHKSM_CFG); |
437 | if (tx_queue->queue == EFX_TX_QUEUE_OFFLOAD_CSUM) | 437 | if (tx_queue->queue & EFX_TXQ_TYPE_OFFLOAD) |
438 | clear_bit_le(tx_queue->queue, (void *)®); | 438 | clear_bit_le(tx_queue->queue, (void *)®); |
439 | else | 439 | else |
440 | set_bit_le(tx_queue->queue, (void *)®); | 440 | set_bit_le(tx_queue->queue, (void *)®); |
@@ -1132,7 +1132,7 @@ static void efx_poll_flush_events(struct efx_nic *efx) | |||
1132 | ev_sub_code == FSE_AZ_TX_DESCQ_FLS_DONE_EV) { | 1132 | ev_sub_code == FSE_AZ_TX_DESCQ_FLS_DONE_EV) { |
1133 | ev_queue = EFX_QWORD_FIELD(*event, | 1133 | ev_queue = EFX_QWORD_FIELD(*event, |
1134 | FSF_AZ_DRIVER_EV_SUBDATA); | 1134 | FSF_AZ_DRIVER_EV_SUBDATA); |
1135 | if (ev_queue < EFX_TX_QUEUE_COUNT) { | 1135 | if (ev_queue < EFX_TXQ_TYPES * efx->n_tx_channels) { |
1136 | tx_queue = efx->tx_queue + ev_queue; | 1136 | tx_queue = efx->tx_queue + ev_queue; |
1137 | tx_queue->flushed = FLUSH_DONE; | 1137 | tx_queue->flushed = FLUSH_DONE; |
1138 | } | 1138 | } |
@@ -1142,7 +1142,7 @@ static void efx_poll_flush_events(struct efx_nic *efx) | |||
1142 | *event, FSF_AZ_DRIVER_EV_RX_DESCQ_ID); | 1142 | *event, FSF_AZ_DRIVER_EV_RX_DESCQ_ID); |
1143 | ev_failed = EFX_QWORD_FIELD( | 1143 | ev_failed = EFX_QWORD_FIELD( |
1144 | *event, FSF_AZ_DRIVER_EV_RX_FLUSH_FAIL); | 1144 | *event, FSF_AZ_DRIVER_EV_RX_FLUSH_FAIL); |
1145 | if (ev_queue < efx->n_rx_queues) { | 1145 | if (ev_queue < efx->n_rx_channels) { |
1146 | rx_queue = efx->rx_queue + ev_queue; | 1146 | rx_queue = efx->rx_queue + ev_queue; |
1147 | rx_queue->flushed = | 1147 | rx_queue->flushed = |
1148 | ev_failed ? FLUSH_FAILED : FLUSH_DONE; | 1148 | ev_failed ? FLUSH_FAILED : FLUSH_DONE; |
@@ -1441,7 +1441,7 @@ static void efx_setup_rss_indir_table(struct efx_nic *efx) | |||
1441 | offset < FR_BZ_RX_INDIRECTION_TBL + 0x800; | 1441 | offset < FR_BZ_RX_INDIRECTION_TBL + 0x800; |
1442 | offset += 0x10) { | 1442 | offset += 0x10) { |
1443 | EFX_POPULATE_DWORD_1(dword, FRF_BZ_IT_QUEUE, | 1443 | EFX_POPULATE_DWORD_1(dword, FRF_BZ_IT_QUEUE, |
1444 | i % efx->n_rx_queues); | 1444 | i % efx->n_rx_channels); |
1445 | efx_writed(efx, &dword, offset); | 1445 | efx_writed(efx, &dword, offset); |
1446 | i++; | 1446 | i++; |
1447 | } | 1447 | } |