diff options
author | Ben Hutchings <bhutchings@solarflare.com> | 2009-11-28 00:36:29 -0500 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2009-11-29 03:01:21 -0500 |
commit | c1ac403bfa240617da2bce861ea5c3a907a65612 (patch) | |
tree | 340772ce3f0ca211ad93973cabd70bb08ca38932 /drivers/net/sfc/falcon.c | |
parent | 0228f5cdb03f6656247cf2876f9f4f8fc213ffd6 (diff) |
sfc: Clean up RX event handling
Add 'likely' hint to test of rx_checksum_enabled.
Don't count IP fragments; the IP stack can do that.
Do count non-matching multicast packets.
Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/sfc/falcon.c')
-rw-r--r-- | drivers/net/sfc/falcon.c | 11 |
1 files changed, 5 insertions, 6 deletions
diff --git a/drivers/net/sfc/falcon.c b/drivers/net/sfc/falcon.c index 539d0223b434..2f219ce61392 100644 --- a/drivers/net/sfc/falcon.c +++ b/drivers/net/sfc/falcon.c | |||
@@ -734,7 +734,7 @@ static void falcon_handle_rx_not_ok(struct efx_rx_queue *rx_queue, | |||
734 | bool rx_ev_tcp_udp_chksum_err, rx_ev_eth_crc_err; | 734 | bool rx_ev_tcp_udp_chksum_err, rx_ev_eth_crc_err; |
735 | bool rx_ev_frm_trunc, rx_ev_drib_nib, rx_ev_tobe_disc; | 735 | bool rx_ev_frm_trunc, rx_ev_drib_nib, rx_ev_tobe_disc; |
736 | bool rx_ev_other_err, rx_ev_pause_frm; | 736 | bool rx_ev_other_err, rx_ev_pause_frm; |
737 | bool rx_ev_ip_frag_err, rx_ev_hdr_type, rx_ev_mcast_pkt; | 737 | bool rx_ev_hdr_type, rx_ev_mcast_pkt; |
738 | unsigned rx_ev_pkt_type; | 738 | unsigned rx_ev_pkt_type; |
739 | 739 | ||
740 | rx_ev_hdr_type = EFX_QWORD_FIELD(*event, FSF_AZ_RX_EV_HDR_TYPE); | 740 | rx_ev_hdr_type = EFX_QWORD_FIELD(*event, FSF_AZ_RX_EV_HDR_TYPE); |
@@ -743,7 +743,6 @@ static void falcon_handle_rx_not_ok(struct efx_rx_queue *rx_queue, | |||
743 | rx_ev_pkt_type = EFX_QWORD_FIELD(*event, FSF_AZ_RX_EV_PKT_TYPE); | 743 | rx_ev_pkt_type = EFX_QWORD_FIELD(*event, FSF_AZ_RX_EV_PKT_TYPE); |
744 | rx_ev_buf_owner_id_err = EFX_QWORD_FIELD(*event, | 744 | rx_ev_buf_owner_id_err = EFX_QWORD_FIELD(*event, |
745 | FSF_AZ_RX_EV_BUF_OWNER_ID_ERR); | 745 | FSF_AZ_RX_EV_BUF_OWNER_ID_ERR); |
746 | rx_ev_ip_frag_err = EFX_QWORD_FIELD(*event, FSF_AZ_RX_EV_IP_FRAG_ERR); | ||
747 | rx_ev_ip_hdr_chksum_err = EFX_QWORD_FIELD(*event, | 746 | rx_ev_ip_hdr_chksum_err = EFX_QWORD_FIELD(*event, |
748 | FSF_AZ_RX_EV_IP_HDR_CHKSUM_ERR); | 747 | FSF_AZ_RX_EV_IP_HDR_CHKSUM_ERR); |
749 | rx_ev_tcp_udp_chksum_err = EFX_QWORD_FIELD(*event, | 748 | rx_ev_tcp_udp_chksum_err = EFX_QWORD_FIELD(*event, |
@@ -771,8 +770,6 @@ static void falcon_handle_rx_not_ok(struct efx_rx_queue *rx_queue, | |||
771 | else if (rx_ev_tcp_udp_chksum_err) | 770 | else if (rx_ev_tcp_udp_chksum_err) |
772 | ++rx_queue->channel->n_rx_tcp_udp_chksum_err; | 771 | ++rx_queue->channel->n_rx_tcp_udp_chksum_err; |
773 | } | 772 | } |
774 | if (rx_ev_ip_frag_err) | ||
775 | ++rx_queue->channel->n_rx_ip_frag_err; | ||
776 | 773 | ||
777 | /* The frame must be discarded if any of these are true. */ | 774 | /* The frame must be discarded if any of these are true. */ |
778 | *discard = (rx_ev_eth_crc_err | rx_ev_frm_trunc | rx_ev_drib_nib | | 775 | *discard = (rx_ev_eth_crc_err | rx_ev_frm_trunc | rx_ev_drib_nib | |
@@ -855,7 +852,7 @@ static void falcon_handle_rx_event(struct efx_channel *channel, | |||
855 | * UDP/IPv4, then we can rely on the hardware checksum. | 852 | * UDP/IPv4, then we can rely on the hardware checksum. |
856 | */ | 853 | */ |
857 | checksummed = | 854 | checksummed = |
858 | efx->rx_checksum_enabled && | 855 | likely(efx->rx_checksum_enabled) && |
859 | (rx_ev_hdr_type == FSE_AB_RX_EV_HDR_TYPE_IPV4_TCP || | 856 | (rx_ev_hdr_type == FSE_AB_RX_EV_HDR_TYPE_IPV4_TCP || |
860 | rx_ev_hdr_type == FSE_AB_RX_EV_HDR_TYPE_IPV4_UDP); | 857 | rx_ev_hdr_type == FSE_AB_RX_EV_HDR_TYPE_IPV4_UDP); |
861 | } else { | 858 | } else { |
@@ -870,8 +867,10 @@ static void falcon_handle_rx_event(struct efx_channel *channel, | |||
870 | unsigned int rx_ev_mcast_hash_match = | 867 | unsigned int rx_ev_mcast_hash_match = |
871 | EFX_QWORD_FIELD(*event, FSF_AZ_RX_EV_MCAST_HASH_MATCH); | 868 | EFX_QWORD_FIELD(*event, FSF_AZ_RX_EV_MCAST_HASH_MATCH); |
872 | 869 | ||
873 | if (unlikely(!rx_ev_mcast_hash_match)) | 870 | if (unlikely(!rx_ev_mcast_hash_match)) { |
871 | ++channel->n_rx_mcast_mismatch; | ||
874 | discard = true; | 872 | discard = true; |
873 | } | ||
875 | } | 874 | } |
876 | 875 | ||
877 | channel->irq_mod_score += 2; | 876 | channel->irq_mod_score += 2; |