diff options
author | Ben Hutchings <bhutchings@solarflare.com> | 2008-09-01 07:46:50 -0400 |
---|---|---|
committer | Jeff Garzik <jgarzik@redhat.com> | 2008-09-03 09:53:45 -0400 |
commit | dc8cfa55da8c21e0b3290c29677a9d05c0a3e595 (patch) | |
tree | a4c8bedad12a15d1e7c9fcfc99f873280ca644b4 /drivers/net/sfc/falcon.c | |
parent | cc12dac2e512c2b6185ed91899e09e9910630315 (diff) |
sfc: Use explicit bool for boolean variables, parameters and return values
Replace (cond ? 1 : 0) with cond or !!cond as appropriate, and
(cond ? 0 : 1) with !cond.
Remove some redundant boolean temporaries.
Rename one field that looks like a flag but isn't.
Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
Diffstat (limited to 'drivers/net/sfc/falcon.c')
-rw-r--r-- | drivers/net/sfc/falcon.c | 50 |
1 files changed, 26 insertions, 24 deletions
diff --git a/drivers/net/sfc/falcon.c b/drivers/net/sfc/falcon.c index 8ee63da25e6c..fb069712222f 100644 --- a/drivers/net/sfc/falcon.c +++ b/drivers/net/sfc/falcon.c | |||
@@ -539,7 +539,7 @@ static int falcon_flush_tx_queue(struct efx_tx_queue *tx_queue) | |||
539 | 539 | ||
540 | if (EFX_WORKAROUND_11557(efx)) { | 540 | if (EFX_WORKAROUND_11557(efx)) { |
541 | efx_oword_t reg; | 541 | efx_oword_t reg; |
542 | int enabled; | 542 | bool enabled; |
543 | 543 | ||
544 | falcon_read_table(efx, ®, efx->type->txd_ptr_tbl_base, | 544 | falcon_read_table(efx, ®, efx->type->txd_ptr_tbl_base, |
545 | tx_queue->queue); | 545 | tx_queue->queue); |
@@ -644,8 +644,8 @@ int falcon_init_rx(struct efx_rx_queue *rx_queue) | |||
644 | efx_oword_t rx_desc_ptr; | 644 | efx_oword_t rx_desc_ptr; |
645 | struct efx_nic *efx = rx_queue->efx; | 645 | struct efx_nic *efx = rx_queue->efx; |
646 | int rc; | 646 | int rc; |
647 | int is_b0 = falcon_rev(efx) >= FALCON_REV_B0; | 647 | bool is_b0 = falcon_rev(efx) >= FALCON_REV_B0; |
648 | int iscsi_digest_en = is_b0; | 648 | bool iscsi_digest_en = is_b0; |
649 | 649 | ||
650 | EFX_LOG(efx, "RX queue %d ring in special buffers %d-%d\n", | 650 | EFX_LOG(efx, "RX queue %d ring in special buffers %d-%d\n", |
651 | rx_queue->queue, rx_queue->rxd.index, | 651 | rx_queue->queue, rx_queue->rxd.index, |
@@ -695,7 +695,8 @@ static int falcon_flush_rx_queue(struct efx_rx_queue *rx_queue) | |||
695 | read_ptr = channel->eventq_read_ptr; | 695 | read_ptr = channel->eventq_read_ptr; |
696 | for (i = 0; i < FALCON_EVQ_SIZE; ++i) { | 696 | for (i = 0; i < FALCON_EVQ_SIZE; ++i) { |
697 | efx_qword_t *event = falcon_event(channel, read_ptr); | 697 | efx_qword_t *event = falcon_event(channel, read_ptr); |
698 | int ev_code, ev_sub_code, ev_queue, ev_failed; | 698 | int ev_code, ev_sub_code, ev_queue; |
699 | bool ev_failed; | ||
699 | if (!falcon_event_present(event)) | 700 | if (!falcon_event_present(event)) |
700 | break; | 701 | break; |
701 | 702 | ||
@@ -722,7 +723,7 @@ static int falcon_flush_rx_queue(struct efx_rx_queue *rx_queue) | |||
722 | 723 | ||
723 | if (EFX_WORKAROUND_11557(efx)) { | 724 | if (EFX_WORKAROUND_11557(efx)) { |
724 | efx_oword_t reg; | 725 | efx_oword_t reg; |
725 | int enabled; | 726 | bool enabled; |
726 | 727 | ||
727 | falcon_read_table(efx, ®, efx->type->rxd_ptr_tbl_base, | 728 | falcon_read_table(efx, ®, efx->type->rxd_ptr_tbl_base, |
728 | rx_queue->queue); | 729 | rx_queue->queue); |
@@ -851,15 +852,16 @@ static inline void falcon_handle_tx_event(struct efx_channel *channel, | |||
851 | /* Detect errors included in the rx_evt_pkt_ok bit. */ | 852 | /* Detect errors included in the rx_evt_pkt_ok bit. */ |
852 | static void falcon_handle_rx_not_ok(struct efx_rx_queue *rx_queue, | 853 | static void falcon_handle_rx_not_ok(struct efx_rx_queue *rx_queue, |
853 | const efx_qword_t *event, | 854 | const efx_qword_t *event, |
854 | unsigned *rx_ev_pkt_ok, | 855 | bool *rx_ev_pkt_ok, |
855 | int *discard) | 856 | bool *discard) |
856 | { | 857 | { |
857 | struct efx_nic *efx = rx_queue->efx; | 858 | struct efx_nic *efx = rx_queue->efx; |
858 | unsigned rx_ev_buf_owner_id_err, rx_ev_ip_hdr_chksum_err; | 859 | bool rx_ev_buf_owner_id_err, rx_ev_ip_hdr_chksum_err; |
859 | unsigned rx_ev_tcp_udp_chksum_err, rx_ev_eth_crc_err; | 860 | bool rx_ev_tcp_udp_chksum_err, rx_ev_eth_crc_err; |
860 | unsigned rx_ev_frm_trunc, rx_ev_drib_nib, rx_ev_tobe_disc; | 861 | bool rx_ev_frm_trunc, rx_ev_drib_nib, rx_ev_tobe_disc; |
861 | unsigned rx_ev_pkt_type, rx_ev_other_err, rx_ev_pause_frm; | 862 | bool rx_ev_other_err, rx_ev_pause_frm; |
862 | unsigned rx_ev_ip_frag_err, rx_ev_hdr_type, rx_ev_mcast_pkt; | 863 | bool rx_ev_ip_frag_err, rx_ev_hdr_type, rx_ev_mcast_pkt; |
864 | unsigned rx_ev_pkt_type; | ||
863 | 865 | ||
864 | rx_ev_hdr_type = EFX_QWORD_FIELD(*event, RX_EV_HDR_TYPE); | 866 | rx_ev_hdr_type = EFX_QWORD_FIELD(*event, RX_EV_HDR_TYPE); |
865 | rx_ev_mcast_pkt = EFX_QWORD_FIELD(*event, RX_EV_MCAST_PKT); | 867 | rx_ev_mcast_pkt = EFX_QWORD_FIELD(*event, RX_EV_MCAST_PKT); |
@@ -954,9 +956,9 @@ static inline int falcon_handle_rx_event(struct efx_channel *channel, | |||
954 | const efx_qword_t *event) | 956 | const efx_qword_t *event) |
955 | { | 957 | { |
956 | unsigned int rx_ev_q_label, rx_ev_desc_ptr, rx_ev_byte_cnt; | 958 | unsigned int rx_ev_q_label, rx_ev_desc_ptr, rx_ev_byte_cnt; |
957 | unsigned int rx_ev_pkt_ok, rx_ev_hdr_type, rx_ev_mcast_pkt; | 959 | unsigned int rx_ev_hdr_type, rx_ev_mcast_pkt; |
958 | unsigned expected_ptr; | 960 | unsigned expected_ptr; |
959 | int discard = 0, checksummed; | 961 | bool rx_ev_pkt_ok, discard = false, checksummed; |
960 | struct efx_rx_queue *rx_queue; | 962 | struct efx_rx_queue *rx_queue; |
961 | struct efx_nic *efx = channel->efx; | 963 | struct efx_nic *efx = channel->efx; |
962 | 964 | ||
@@ -985,7 +987,7 @@ static inline int falcon_handle_rx_event(struct efx_channel *channel, | |||
985 | } else { | 987 | } else { |
986 | falcon_handle_rx_not_ok(rx_queue, event, &rx_ev_pkt_ok, | 988 | falcon_handle_rx_not_ok(rx_queue, event, &rx_ev_pkt_ok, |
987 | &discard); | 989 | &discard); |
988 | checksummed = 0; | 990 | checksummed = false; |
989 | } | 991 | } |
990 | 992 | ||
991 | /* Detect multicast packets that didn't match the filter */ | 993 | /* Detect multicast packets that didn't match the filter */ |
@@ -995,7 +997,7 @@ static inline int falcon_handle_rx_event(struct efx_channel *channel, | |||
995 | EFX_QWORD_FIELD(*event, RX_EV_MCAST_HASH_MATCH); | 997 | EFX_QWORD_FIELD(*event, RX_EV_MCAST_HASH_MATCH); |
996 | 998 | ||
997 | if (unlikely(!rx_ev_mcast_hash_match)) | 999 | if (unlikely(!rx_ev_mcast_hash_match)) |
998 | discard = 1; | 1000 | discard = true; |
999 | } | 1001 | } |
1000 | 1002 | ||
1001 | /* Handle received packet */ | 1003 | /* Handle received packet */ |
@@ -1010,23 +1012,23 @@ static void falcon_handle_global_event(struct efx_channel *channel, | |||
1010 | efx_qword_t *event) | 1012 | efx_qword_t *event) |
1011 | { | 1013 | { |
1012 | struct efx_nic *efx = channel->efx; | 1014 | struct efx_nic *efx = channel->efx; |
1013 | int is_phy_event = 0, handled = 0; | 1015 | bool is_phy_event = false, handled = false; |
1014 | 1016 | ||
1015 | /* Check for interrupt on either port. Some boards have a | 1017 | /* Check for interrupt on either port. Some boards have a |
1016 | * single PHY wired to the interrupt line for port 1. */ | 1018 | * single PHY wired to the interrupt line for port 1. */ |
1017 | if (EFX_QWORD_FIELD(*event, G_PHY0_INTR) || | 1019 | if (EFX_QWORD_FIELD(*event, G_PHY0_INTR) || |
1018 | EFX_QWORD_FIELD(*event, G_PHY1_INTR) || | 1020 | EFX_QWORD_FIELD(*event, G_PHY1_INTR) || |
1019 | EFX_QWORD_FIELD(*event, XG_PHY_INTR)) | 1021 | EFX_QWORD_FIELD(*event, XG_PHY_INTR)) |
1020 | is_phy_event = 1; | 1022 | is_phy_event = true; |
1021 | 1023 | ||
1022 | if ((falcon_rev(efx) >= FALCON_REV_B0) && | 1024 | if ((falcon_rev(efx) >= FALCON_REV_B0) && |
1023 | EFX_OWORD_FIELD(*event, XG_MNT_INTR_B0)) | 1025 | EFX_OWORD_FIELD(*event, XG_MNT_INTR_B0)) |
1024 | is_phy_event = 1; | 1026 | is_phy_event = true; |
1025 | 1027 | ||
1026 | if (is_phy_event) { | 1028 | if (is_phy_event) { |
1027 | efx->phy_op->clear_interrupt(efx); | 1029 | efx->phy_op->clear_interrupt(efx); |
1028 | queue_work(efx->workqueue, &efx->reconfigure_work); | 1030 | queue_work(efx->workqueue, &efx->reconfigure_work); |
1029 | handled = 1; | 1031 | handled = true; |
1030 | } | 1032 | } |
1031 | 1033 | ||
1032 | if (EFX_QWORD_FIELD_VER(efx, *event, RX_RECOVERY)) { | 1034 | if (EFX_QWORD_FIELD_VER(efx, *event, RX_RECOVERY)) { |
@@ -1036,7 +1038,7 @@ static void falcon_handle_global_event(struct efx_channel *channel, | |||
1036 | atomic_inc(&efx->rx_reset); | 1038 | atomic_inc(&efx->rx_reset); |
1037 | efx_schedule_reset(efx, EFX_WORKAROUND_6555(efx) ? | 1039 | efx_schedule_reset(efx, EFX_WORKAROUND_6555(efx) ? |
1038 | RESET_TYPE_RX_RECOVERY : RESET_TYPE_DISABLE); | 1040 | RESET_TYPE_RX_RECOVERY : RESET_TYPE_DISABLE); |
1039 | handled = 1; | 1041 | handled = true; |
1040 | } | 1042 | } |
1041 | 1043 | ||
1042 | if (!handled) | 1044 | if (!handled) |
@@ -1756,7 +1758,7 @@ void falcon_reconfigure_mac_wrapper(struct efx_nic *efx) | |||
1756 | { | 1758 | { |
1757 | efx_oword_t reg; | 1759 | efx_oword_t reg; |
1758 | int link_speed; | 1760 | int link_speed; |
1759 | unsigned int tx_fc; | 1761 | bool tx_fc; |
1760 | 1762 | ||
1761 | if (efx->link_options & GM_LPA_10000) | 1763 | if (efx->link_options & GM_LPA_10000) |
1762 | link_speed = 0x3; | 1764 | link_speed = 0x3; |
@@ -1791,7 +1793,7 @@ void falcon_reconfigure_mac_wrapper(struct efx_nic *efx) | |||
1791 | /* Transmission of pause frames when RX crosses the threshold is | 1793 | /* Transmission of pause frames when RX crosses the threshold is |
1792 | * covered by RX_XOFF_MAC_EN and XM_TX_CFG_REG:XM_FCNTL. | 1794 | * covered by RX_XOFF_MAC_EN and XM_TX_CFG_REG:XM_FCNTL. |
1793 | * Action on receipt of pause frames is controller by XM_DIS_FCNTL */ | 1795 | * Action on receipt of pause frames is controller by XM_DIS_FCNTL */ |
1794 | tx_fc = (efx->flow_control & EFX_FC_TX) ? 1 : 0; | 1796 | tx_fc = !!(efx->flow_control & EFX_FC_TX); |
1795 | falcon_read(efx, ®, RX_CFG_REG_KER); | 1797 | falcon_read(efx, ®, RX_CFG_REG_KER); |
1796 | EFX_SET_OWORD_FIELD_VER(efx, reg, RX_XOFF_MAC_EN, tx_fc); | 1798 | EFX_SET_OWORD_FIELD_VER(efx, reg, RX_XOFF_MAC_EN, tx_fc); |
1797 | 1799 | ||
@@ -2064,7 +2066,7 @@ int falcon_probe_port(struct efx_nic *efx) | |||
2064 | return rc; | 2066 | return rc; |
2065 | 2067 | ||
2066 | /* Set up GMII structure for PHY */ | 2068 | /* Set up GMII structure for PHY */ |
2067 | efx->mii.supports_gmii = 1; | 2069 | efx->mii.supports_gmii = true; |
2068 | falcon_init_mdio(&efx->mii); | 2070 | falcon_init_mdio(&efx->mii); |
2069 | 2071 | ||
2070 | /* Hardware flow ctrl. FalconA RX FIFO too small for pause generation */ | 2072 | /* Hardware flow ctrl. FalconA RX FIFO too small for pause generation */ |