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authorBen Hutchings <bhutchings@solarflare.com>2009-11-29 10:08:21 -0500
committerDavid S. Miller <davem@davemloft.net>2009-11-29 20:23:52 -0500
commit5784946068f81c5f1cce2906a7655652e34f44f3 (patch)
tree76fd9e21bc8765b8306621f2ace6a65fad99fed7 /drivers/net/sfc/falcon.c
parent0ccfe64d3f177a61a071b7a6fa363f0a292158c4 (diff)
sfc: Fold falcon_probe_nic_variant() into falcon_probe_nic()
falcon_probe_nic_variant() does a lot less than it used to, and a lot less than it claims to. Fold the remainder into its caller. Signed-off-by: Ben Hutchings <bhutchings@solarflare.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/sfc/falcon.c')
-rw-r--r--drivers/net/sfc/falcon.c64
1 files changed, 24 insertions, 40 deletions
diff --git a/drivers/net/sfc/falcon.c b/drivers/net/sfc/falcon.c
index 2e4c71114630..63e6734d8341 100644
--- a/drivers/net/sfc/falcon.c
+++ b/drivers/net/sfc/falcon.c
@@ -2806,40 +2806,6 @@ u32 efx_nic_fpga_ver(struct efx_nic *efx)
2806 return EFX_OWORD_FIELD(altera_build, FRF_AZ_ALTERA_BUILD_VER); 2806 return EFX_OWORD_FIELD(altera_build, FRF_AZ_ALTERA_BUILD_VER);
2807} 2807}
2808 2808
2809/* Probe the NIC variant (revision, ASIC vs FPGA, function count, port
2810 * count, port speed). Set workaround and feature flags accordingly.
2811 */
2812static int falcon_probe_nic_variant(struct efx_nic *efx)
2813{
2814 efx_oword_t nic_stat;
2815
2816 if (efx_nic_fpga_ver(efx) != 0) {
2817 EFX_ERR(efx, "Falcon FPGA not supported\n");
2818 return -ENODEV;
2819 }
2820
2821 efx_reado(efx, &nic_stat, FR_AB_NIC_STAT);
2822
2823 if (efx_nic_rev(efx) <= EFX_REV_FALCON_A1) {
2824 u8 pci_rev = efx->pci_dev->revision;
2825
2826 if ((pci_rev == 0xff) || (pci_rev == 0)) {
2827 EFX_ERR(efx, "Falcon rev A0 not supported\n");
2828 return -ENODEV;
2829 }
2830 if (EFX_OWORD_FIELD(nic_stat, FRF_AB_STRAP_10G) == 0) {
2831 EFX_ERR(efx, "Falcon rev A1 1G not supported\n");
2832 return -ENODEV;
2833 }
2834 if (EFX_OWORD_FIELD(nic_stat, FRF_AA_STRAP_PCIE) == 0) {
2835 EFX_ERR(efx, "Falcon rev A1 PCI-X not supported\n");
2836 return -ENODEV;
2837 }
2838 }
2839
2840 return 0;
2841}
2842
2843/* Probe all SPI devices on the NIC */ 2809/* Probe all SPI devices on the NIC */
2844static void falcon_probe_spi_devices(struct efx_nic *efx) 2810static void falcon_probe_spi_devices(struct efx_nic *efx)
2845{ 2811{
@@ -2891,15 +2857,33 @@ static int falcon_probe_nic(struct efx_nic *efx)
2891 return -ENOMEM; 2857 return -ENOMEM;
2892 efx->nic_data = nic_data; 2858 efx->nic_data = nic_data;
2893 2859
2894 /* Determine number of ports etc. */ 2860 rc = -ENODEV;
2895 rc = falcon_probe_nic_variant(efx); 2861
2896 if (rc) 2862 if (efx_nic_fpga_ver(efx) != 0) {
2863 EFX_ERR(efx, "Falcon FPGA not supported\n");
2897 goto fail1; 2864 goto fail1;
2865 }
2866
2867 if (efx_nic_rev(efx) <= EFX_REV_FALCON_A1) {
2868 efx_oword_t nic_stat;
2869 struct pci_dev *dev;
2870 u8 pci_rev = efx->pci_dev->revision;
2898 2871
2899 /* Probe secondary function if expected */ 2872 if ((pci_rev == 0xff) || (pci_rev == 0)) {
2900 if (efx_nic_is_dual_func(efx)) { 2873 EFX_ERR(efx, "Falcon rev A0 not supported\n");
2901 struct pci_dev *dev = pci_dev_get(efx->pci_dev); 2874 goto fail1;
2875 }
2876 efx_reado(efx, &nic_stat, FR_AB_NIC_STAT);
2877 if (EFX_OWORD_FIELD(nic_stat, FRF_AB_STRAP_10G) == 0) {
2878 EFX_ERR(efx, "Falcon rev A1 1G not supported\n");
2879 goto fail1;
2880 }
2881 if (EFX_OWORD_FIELD(nic_stat, FRF_AA_STRAP_PCIE) == 0) {
2882 EFX_ERR(efx, "Falcon rev A1 PCI-X not supported\n");
2883 goto fail1;
2884 }
2902 2885
2886 dev = pci_dev_get(efx->pci_dev);
2903 while ((dev = pci_get_device(EFX_VENDID_SFC, FALCON_A_S_DEVID, 2887 while ((dev = pci_get_device(EFX_VENDID_SFC, FALCON_A_S_DEVID,
2904 dev))) { 2888 dev))) {
2905 if (dev->bus == efx->pci_dev->bus && 2889 if (dev->bus == efx->pci_dev->bus &&