diff options
author | Ralf Baechle <ralf@linux-mips.org> | 2007-01-31 14:09:29 -0500 |
---|---|---|
committer | Jeff Garzik <jeff@garzik.org> | 2007-02-05 16:58:52 -0500 |
commit | 1ee6dd770b2302e32fdae489f4fc58c374399da4 (patch) | |
tree | 214cab7727878b153ac0532d653667408fb9d744 /drivers/net/s2io.h | |
parent | a113ae066de6fc7ed33a6f420ea7dd2716a1920a (diff) |
s2io: De-typedef driver.
Removed namespace collisions due to usage of nic_t as per Ralf's patch
Signed-off-by: Sivakumar Subramani <sivakumar.subramani@neterion.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Diffstat (limited to 'drivers/net/s2io.h')
-rw-r--r-- | drivers/net/s2io.h | 202 |
1 files changed, 104 insertions, 98 deletions
diff --git a/drivers/net/s2io.h b/drivers/net/s2io.h index 8114f4b80e8a..a5e1a513deb5 100644 --- a/drivers/net/s2io.h +++ b/drivers/net/s2io.h | |||
@@ -39,7 +39,7 @@ | |||
39 | #define MAX_FLICKER_TIME 60000 /* 60 Secs */ | 39 | #define MAX_FLICKER_TIME 60000 /* 60 Secs */ |
40 | 40 | ||
41 | /* Maximum outstanding splits to be configured into xena. */ | 41 | /* Maximum outstanding splits to be configured into xena. */ |
42 | typedef enum xena_max_outstanding_splits { | 42 | enum { |
43 | XENA_ONE_SPLIT_TRANSACTION = 0, | 43 | XENA_ONE_SPLIT_TRANSACTION = 0, |
44 | XENA_TWO_SPLIT_TRANSACTION = 1, | 44 | XENA_TWO_SPLIT_TRANSACTION = 1, |
45 | XENA_THREE_SPLIT_TRANSACTION = 2, | 45 | XENA_THREE_SPLIT_TRANSACTION = 2, |
@@ -48,7 +48,7 @@ typedef enum xena_max_outstanding_splits { | |||
48 | XENA_TWELVE_SPLIT_TRANSACTION = 5, | 48 | XENA_TWELVE_SPLIT_TRANSACTION = 5, |
49 | XENA_SIXTEEN_SPLIT_TRANSACTION = 6, | 49 | XENA_SIXTEEN_SPLIT_TRANSACTION = 6, |
50 | XENA_THIRTYTWO_SPLIT_TRANSACTION = 7 | 50 | XENA_THIRTYTWO_SPLIT_TRANSACTION = 7 |
51 | } xena_max_outstanding_splits; | 51 | }; |
52 | #define XENA_MAX_OUTSTANDING_SPLITS(n) (n << 4) | 52 | #define XENA_MAX_OUTSTANDING_SPLITS(n) (n << 4) |
53 | 53 | ||
54 | /* OS concerned variables and constants */ | 54 | /* OS concerned variables and constants */ |
@@ -79,7 +79,7 @@ static int debug_level = ERR_DBG; | |||
79 | #define S2IO_JUMBO_SIZE 9600 | 79 | #define S2IO_JUMBO_SIZE 9600 |
80 | 80 | ||
81 | /* Driver statistics maintained by driver */ | 81 | /* Driver statistics maintained by driver */ |
82 | typedef struct { | 82 | struct swStat { |
83 | unsigned long long single_ecc_errs; | 83 | unsigned long long single_ecc_errs; |
84 | unsigned long long double_ecc_errs; | 84 | unsigned long long double_ecc_errs; |
85 | unsigned long long parity_err_cnt; | 85 | unsigned long long parity_err_cnt; |
@@ -94,10 +94,10 @@ typedef struct { | |||
94 | unsigned long long flush_max_pkts; | 94 | unsigned long long flush_max_pkts; |
95 | unsigned long long sum_avg_pkts_aggregated; | 95 | unsigned long long sum_avg_pkts_aggregated; |
96 | unsigned long long num_aggregations; | 96 | unsigned long long num_aggregations; |
97 | } swStat_t; | 97 | }; |
98 | 98 | ||
99 | /* Xpak releated alarm and warnings */ | 99 | /* Xpak releated alarm and warnings */ |
100 | typedef struct { | 100 | struct xpakStat { |
101 | u64 alarm_transceiver_temp_high; | 101 | u64 alarm_transceiver_temp_high; |
102 | u64 alarm_transceiver_temp_low; | 102 | u64 alarm_transceiver_temp_low; |
103 | u64 alarm_laser_bias_current_high; | 103 | u64 alarm_laser_bias_current_high; |
@@ -112,11 +112,11 @@ typedef struct { | |||
112 | u64 warn_laser_output_power_low; | 112 | u64 warn_laser_output_power_low; |
113 | u64 xpak_regs_stat; | 113 | u64 xpak_regs_stat; |
114 | u32 xpak_timer_count; | 114 | u32 xpak_timer_count; |
115 | } xpakStat_t; | 115 | }; |
116 | 116 | ||
117 | 117 | ||
118 | /* The statistics block of Xena */ | 118 | /* The statistics block of Xena */ |
119 | typedef struct stat_block { | 119 | struct stat_block { |
120 | /* Tx MAC statistics counters. */ | 120 | /* Tx MAC statistics counters. */ |
121 | __le32 tmac_data_octets; | 121 | __le32 tmac_data_octets; |
122 | __le32 tmac_frms; | 122 | __le32 tmac_frms; |
@@ -292,9 +292,9 @@ typedef struct stat_block { | |||
292 | __le32 reserved_14; | 292 | __le32 reserved_14; |
293 | __le32 link_fault_cnt; | 293 | __le32 link_fault_cnt; |
294 | u8 buffer[20]; | 294 | u8 buffer[20]; |
295 | swStat_t sw_stat; | 295 | struct swStat sw_stat; |
296 | xpakStat_t xpak_stat; | 296 | struct xpakStat xpak_stat; |
297 | } StatInfo_t; | 297 | }; |
298 | 298 | ||
299 | /* | 299 | /* |
300 | * Structures representing different init time configuration | 300 | * Structures representing different init time configuration |
@@ -317,7 +317,7 @@ static int fifo_map[][MAX_TX_FIFOS] = { | |||
317 | }; | 317 | }; |
318 | 318 | ||
319 | /* Maintains Per FIFO related information. */ | 319 | /* Maintains Per FIFO related information. */ |
320 | typedef struct tx_fifo_config { | 320 | struct tx_fifo_config { |
321 | #define MAX_AVAILABLE_TXDS 8192 | 321 | #define MAX_AVAILABLE_TXDS 8192 |
322 | u32 fifo_len; /* specifies len of FIFO upto 8192, ie no of TxDLs */ | 322 | u32 fifo_len; /* specifies len of FIFO upto 8192, ie no of TxDLs */ |
323 | /* Priority definition */ | 323 | /* Priority definition */ |
@@ -334,11 +334,11 @@ typedef struct tx_fifo_config { | |||
334 | u8 f_no_snoop; | 334 | u8 f_no_snoop; |
335 | #define NO_SNOOP_TXD 0x01 | 335 | #define NO_SNOOP_TXD 0x01 |
336 | #define NO_SNOOP_TXD_BUFFER 0x02 | 336 | #define NO_SNOOP_TXD_BUFFER 0x02 |
337 | } tx_fifo_config_t; | 337 | }; |
338 | 338 | ||
339 | 339 | ||
340 | /* Maintains per Ring related information */ | 340 | /* Maintains per Ring related information */ |
341 | typedef struct rx_ring_config { | 341 | struct rx_ring_config { |
342 | u32 num_rxd; /*No of RxDs per Rx Ring */ | 342 | u32 num_rxd; /*No of RxDs per Rx Ring */ |
343 | #define RX_RING_PRI_0 0 /* highest */ | 343 | #define RX_RING_PRI_0 0 /* highest */ |
344 | #define RX_RING_PRI_1 1 | 344 | #define RX_RING_PRI_1 1 |
@@ -359,7 +359,7 @@ typedef struct rx_ring_config { | |||
359 | u8 f_no_snoop; | 359 | u8 f_no_snoop; |
360 | #define NO_SNOOP_RXD 0x01 | 360 | #define NO_SNOOP_RXD 0x01 |
361 | #define NO_SNOOP_RXD_BUFFER 0x02 | 361 | #define NO_SNOOP_RXD_BUFFER 0x02 |
362 | } rx_ring_config_t; | 362 | }; |
363 | 363 | ||
364 | /* This structure provides contains values of the tunable parameters | 364 | /* This structure provides contains values of the tunable parameters |
365 | * of the H/W | 365 | * of the H/W |
@@ -369,7 +369,7 @@ struct config_param { | |||
369 | u32 tx_fifo_num; /*Number of Tx FIFOs */ | 369 | u32 tx_fifo_num; /*Number of Tx FIFOs */ |
370 | 370 | ||
371 | u8 fifo_mapping[MAX_TX_FIFOS]; | 371 | u8 fifo_mapping[MAX_TX_FIFOS]; |
372 | tx_fifo_config_t tx_cfg[MAX_TX_FIFOS]; /*Per-Tx FIFO config */ | 372 | struct tx_fifo_config tx_cfg[MAX_TX_FIFOS]; /*Per-Tx FIFO config */ |
373 | u32 max_txds; /*Max no. of Tx buffer descriptor per TxDL */ | 373 | u32 max_txds; /*Max no. of Tx buffer descriptor per TxDL */ |
374 | u64 tx_intr_type; | 374 | u64 tx_intr_type; |
375 | /* Specifies if Tx Intr is UTILZ or PER_LIST type. */ | 375 | /* Specifies if Tx Intr is UTILZ or PER_LIST type. */ |
@@ -378,7 +378,7 @@ struct config_param { | |||
378 | u32 rx_ring_num; /*Number of receive rings */ | 378 | u32 rx_ring_num; /*Number of receive rings */ |
379 | #define MAX_RX_BLOCKS_PER_RING 150 | 379 | #define MAX_RX_BLOCKS_PER_RING 150 |
380 | 380 | ||
381 | rx_ring_config_t rx_cfg[MAX_RX_RINGS]; /*Per-Rx Ring config */ | 381 | struct rx_ring_config rx_cfg[MAX_RX_RINGS]; /*Per-Rx Ring config */ |
382 | u8 bimodal; /*Flag for setting bimodal interrupts*/ | 382 | u8 bimodal; /*Flag for setting bimodal interrupts*/ |
383 | 383 | ||
384 | #define HEADER_ETHERNET_II_802_3_SIZE 14 | 384 | #define HEADER_ETHERNET_II_802_3_SIZE 14 |
@@ -397,14 +397,14 @@ struct config_param { | |||
397 | }; | 397 | }; |
398 | 398 | ||
399 | /* Structure representing MAC Addrs */ | 399 | /* Structure representing MAC Addrs */ |
400 | typedef struct mac_addr { | 400 | struct mac_addr { |
401 | u8 mac_addr[ETH_ALEN]; | 401 | u8 mac_addr[ETH_ALEN]; |
402 | } macaddr_t; | 402 | }; |
403 | 403 | ||
404 | /* Structure that represent every FIFO element in the BAR1 | 404 | /* Structure that represent every FIFO element in the BAR1 |
405 | * Address location. | 405 | * Address location. |
406 | */ | 406 | */ |
407 | typedef struct _TxFIFO_element { | 407 | struct TxFIFO_element { |
408 | u64 TxDL_Pointer; | 408 | u64 TxDL_Pointer; |
409 | 409 | ||
410 | u64 List_Control; | 410 | u64 List_Control; |
@@ -415,10 +415,10 @@ typedef struct _TxFIFO_element { | |||
415 | #define TX_FIFO_SPECIAL_FUNC BIT(23) | 415 | #define TX_FIFO_SPECIAL_FUNC BIT(23) |
416 | #define TX_FIFO_DS_NO_SNOOP BIT(31) | 416 | #define TX_FIFO_DS_NO_SNOOP BIT(31) |
417 | #define TX_FIFO_BUFF_NO_SNOOP BIT(30) | 417 | #define TX_FIFO_BUFF_NO_SNOOP BIT(30) |
418 | } TxFIFO_element_t; | 418 | }; |
419 | 419 | ||
420 | /* Tx descriptor structure */ | 420 | /* Tx descriptor structure */ |
421 | typedef struct _TxD { | 421 | struct TxD { |
422 | u64 Control_1; | 422 | u64 Control_1; |
423 | /* bit mask */ | 423 | /* bit mask */ |
424 | #define TXD_LIST_OWN_XENA BIT(7) | 424 | #define TXD_LIST_OWN_XENA BIT(7) |
@@ -449,16 +449,16 @@ typedef struct _TxD { | |||
449 | 449 | ||
450 | u64 Buffer_Pointer; | 450 | u64 Buffer_Pointer; |
451 | u64 Host_Control; /* reserved for host */ | 451 | u64 Host_Control; /* reserved for host */ |
452 | } TxD_t; | 452 | }; |
453 | 453 | ||
454 | /* Structure to hold the phy and virt addr of every TxDL. */ | 454 | /* Structure to hold the phy and virt addr of every TxDL. */ |
455 | typedef struct list_info_hold { | 455 | struct list_info_hold { |
456 | dma_addr_t list_phy_addr; | 456 | dma_addr_t list_phy_addr; |
457 | void *list_virt_addr; | 457 | void *list_virt_addr; |
458 | } list_info_hold_t; | 458 | }; |
459 | 459 | ||
460 | /* Rx descriptor structure for 1 buffer mode */ | 460 | /* Rx descriptor structure for 1 buffer mode */ |
461 | typedef struct _RxD_t { | 461 | struct RxD_t { |
462 | u64 Host_Control; /* reserved for host */ | 462 | u64 Host_Control; /* reserved for host */ |
463 | u64 Control_1; | 463 | u64 Control_1; |
464 | #define RXD_OWN_XENA BIT(7) | 464 | #define RXD_OWN_XENA BIT(7) |
@@ -483,21 +483,21 @@ typedef struct _RxD_t { | |||
483 | #define SET_NUM_TAG(val) vBIT(val,16,32) | 483 | #define SET_NUM_TAG(val) vBIT(val,16,32) |
484 | 484 | ||
485 | 485 | ||
486 | } RxD_t; | 486 | }; |
487 | /* Rx descriptor structure for 1 buffer mode */ | 487 | /* Rx descriptor structure for 1 buffer mode */ |
488 | typedef struct _RxD1_t { | 488 | struct RxD1 { |
489 | struct _RxD_t h; | 489 | struct RxD_t h; |
490 | 490 | ||
491 | #define MASK_BUFFER0_SIZE_1 vBIT(0x3FFF,2,14) | 491 | #define MASK_BUFFER0_SIZE_1 vBIT(0x3FFF,2,14) |
492 | #define SET_BUFFER0_SIZE_1(val) vBIT(val,2,14) | 492 | #define SET_BUFFER0_SIZE_1(val) vBIT(val,2,14) |
493 | #define RXD_GET_BUFFER0_SIZE_1(_Control_2) \ | 493 | #define RXD_GET_BUFFER0_SIZE_1(_Control_2) \ |
494 | (u16)((_Control_2 & MASK_BUFFER0_SIZE_1) >> 48) | 494 | (u16)((_Control_2 & MASK_BUFFER0_SIZE_1) >> 48) |
495 | u64 Buffer0_ptr; | 495 | u64 Buffer0_ptr; |
496 | } RxD1_t; | 496 | }; |
497 | /* Rx descriptor structure for 3 or 2 buffer mode */ | 497 | /* Rx descriptor structure for 3 or 2 buffer mode */ |
498 | 498 | ||
499 | typedef struct _RxD3_t { | 499 | struct RxD3 { |
500 | struct _RxD_t h; | 500 | struct RxD_t h; |
501 | 501 | ||
502 | #define MASK_BUFFER0_SIZE_3 vBIT(0xFF,2,14) | 502 | #define MASK_BUFFER0_SIZE_3 vBIT(0xFF,2,14) |
503 | #define MASK_BUFFER1_SIZE_3 vBIT(0xFFFF,16,16) | 503 | #define MASK_BUFFER1_SIZE_3 vBIT(0xFFFF,16,16) |
@@ -517,15 +517,15 @@ typedef struct _RxD3_t { | |||
517 | u64 Buffer0_ptr; | 517 | u64 Buffer0_ptr; |
518 | u64 Buffer1_ptr; | 518 | u64 Buffer1_ptr; |
519 | u64 Buffer2_ptr; | 519 | u64 Buffer2_ptr; |
520 | } RxD3_t; | 520 | }; |
521 | 521 | ||
522 | 522 | ||
523 | /* Structure that represents the Rx descriptor block which contains | 523 | /* Structure that represents the Rx descriptor block which contains |
524 | * 128 Rx descriptors. | 524 | * 128 Rx descriptors. |
525 | */ | 525 | */ |
526 | typedef struct _RxD_block { | 526 | struct RxD_block { |
527 | #define MAX_RXDS_PER_BLOCK_1 127 | 527 | #define MAX_RXDS_PER_BLOCK_1 127 |
528 | RxD1_t rxd[MAX_RXDS_PER_BLOCK_1]; | 528 | struct RxD1 rxd[MAX_RXDS_PER_BLOCK_1]; |
529 | 529 | ||
530 | u64 reserved_0; | 530 | u64 reserved_0; |
531 | #define END_OF_BLOCK 0xFEFFFFFFFFFFFFFFULL | 531 | #define END_OF_BLOCK 0xFEFFFFFFFFFFFFFFULL |
@@ -535,7 +535,7 @@ typedef struct _RxD_block { | |||
535 | u64 pNext_RxD_Blk_physical; /* Buff0_ptr.In a 32 bit arch | 535 | u64 pNext_RxD_Blk_physical; /* Buff0_ptr.In a 32 bit arch |
536 | * the upper 32 bits should | 536 | * the upper 32 bits should |
537 | * be 0 */ | 537 | * be 0 */ |
538 | } RxD_block_t; | 538 | }; |
539 | 539 | ||
540 | #define SIZE_OF_BLOCK 4096 | 540 | #define SIZE_OF_BLOCK 4096 |
541 | 541 | ||
@@ -545,12 +545,12 @@ typedef struct _RxD_block { | |||
545 | 545 | ||
546 | /* Structure to hold virtual addresses of Buf0 and Buf1 in | 546 | /* Structure to hold virtual addresses of Buf0 and Buf1 in |
547 | * 2buf mode. */ | 547 | * 2buf mode. */ |
548 | typedef struct bufAdd { | 548 | struct buffAdd { |
549 | void *ba_0_org; | 549 | void *ba_0_org; |
550 | void *ba_1_org; | 550 | void *ba_1_org; |
551 | void *ba_0; | 551 | void *ba_0; |
552 | void *ba_1; | 552 | void *ba_1; |
553 | } buffAdd_t; | 553 | }; |
554 | 554 | ||
555 | /* Structure which stores all the MAC control parameters */ | 555 | /* Structure which stores all the MAC control parameters */ |
556 | 556 | ||
@@ -558,43 +558,46 @@ typedef struct bufAdd { | |||
558 | * from which the Rx Interrupt processor can start picking | 558 | * from which the Rx Interrupt processor can start picking |
559 | * up the RxDs for processing. | 559 | * up the RxDs for processing. |
560 | */ | 560 | */ |
561 | typedef struct _rx_curr_get_info_t { | 561 | struct rx_curr_get_info { |
562 | u32 block_index; | 562 | u32 block_index; |
563 | u32 offset; | 563 | u32 offset; |
564 | u32 ring_len; | 564 | u32 ring_len; |
565 | } rx_curr_get_info_t; | 565 | }; |
566 | 566 | ||
567 | typedef rx_curr_get_info_t rx_curr_put_info_t; | 567 | struct rx_curr_put_info { |
568 | u32 block_index; | ||
569 | u32 offset; | ||
570 | u32 ring_len; | ||
571 | }; | ||
568 | 572 | ||
569 | /* This structure stores the offset of the TxDl in the FIFO | 573 | /* This structure stores the offset of the TxDl in the FIFO |
570 | * from which the Tx Interrupt processor can start picking | 574 | * from which the Tx Interrupt processor can start picking |
571 | * up the TxDLs for send complete interrupt processing. | 575 | * up the TxDLs for send complete interrupt processing. |
572 | */ | 576 | */ |
573 | typedef struct { | 577 | struct tx_curr_get_info { |
574 | u32 offset; | 578 | u32 offset; |
575 | u32 fifo_len; | 579 | u32 fifo_len; |
576 | } tx_curr_get_info_t; | 580 | }; |
577 | |||
578 | typedef tx_curr_get_info_t tx_curr_put_info_t; | ||
579 | 581 | ||
582 | struct tx_curr_put_info { | ||
583 | u32 offset; | ||
584 | u32 fifo_len; | ||
585 | }; | ||
580 | 586 | ||
581 | typedef struct rxd_info { | 587 | struct rxd_info { |
582 | void *virt_addr; | 588 | void *virt_addr; |
583 | dma_addr_t dma_addr; | 589 | dma_addr_t dma_addr; |
584 | }rxd_info_t; | 590 | }; |
585 | 591 | ||
586 | /* Structure that holds the Phy and virt addresses of the Blocks */ | 592 | /* Structure that holds the Phy and virt addresses of the Blocks */ |
587 | typedef struct rx_block_info { | 593 | struct rx_block_info { |
588 | void *block_virt_addr; | 594 | void *block_virt_addr; |
589 | dma_addr_t block_dma_addr; | 595 | dma_addr_t block_dma_addr; |
590 | rxd_info_t *rxds; | 596 | struct rxd_info *rxds; |
591 | } rx_block_info_t; | 597 | }; |
592 | |||
593 | /* pre declaration of the nic structure */ | ||
594 | typedef struct s2io_nic nic_t; | ||
595 | 598 | ||
596 | /* Ring specific structure */ | 599 | /* Ring specific structure */ |
597 | typedef struct ring_info { | 600 | struct ring_info { |
598 | /* The ring number */ | 601 | /* The ring number */ |
599 | int ring_no; | 602 | int ring_no; |
600 | 603 | ||
@@ -602,7 +605,7 @@ typedef struct ring_info { | |||
602 | * Place holders for the virtual and physical addresses of | 605 | * Place holders for the virtual and physical addresses of |
603 | * all the Rx Blocks | 606 | * all the Rx Blocks |
604 | */ | 607 | */ |
605 | rx_block_info_t rx_blocks[MAX_RX_BLOCKS_PER_RING]; | 608 | struct rx_block_info rx_blocks[MAX_RX_BLOCKS_PER_RING]; |
606 | int block_count; | 609 | int block_count; |
607 | int pkt_cnt; | 610 | int pkt_cnt; |
608 | 611 | ||
@@ -610,24 +613,24 @@ typedef struct ring_info { | |||
610 | * Put pointer info which indictes which RxD has to be replenished | 613 | * Put pointer info which indictes which RxD has to be replenished |
611 | * with a new buffer. | 614 | * with a new buffer. |
612 | */ | 615 | */ |
613 | rx_curr_put_info_t rx_curr_put_info; | 616 | struct rx_curr_put_info rx_curr_put_info; |
614 | 617 | ||
615 | /* | 618 | /* |
616 | * Get pointer info which indictes which is the last RxD that was | 619 | * Get pointer info which indictes which is the last RxD that was |
617 | * processed by the driver. | 620 | * processed by the driver. |
618 | */ | 621 | */ |
619 | rx_curr_get_info_t rx_curr_get_info; | 622 | struct rx_curr_get_info rx_curr_get_info; |
620 | 623 | ||
621 | /* Index to the absolute position of the put pointer of Rx ring */ | 624 | /* Index to the absolute position of the put pointer of Rx ring */ |
622 | int put_pos; | 625 | int put_pos; |
623 | 626 | ||
624 | /* Buffer Address store. */ | 627 | /* Buffer Address store. */ |
625 | buffAdd_t **ba; | 628 | struct buffAdd **ba; |
626 | nic_t *nic; | 629 | struct s2io_nic *nic; |
627 | } ring_info_t; | 630 | }; |
628 | 631 | ||
629 | /* Fifo specific structure */ | 632 | /* Fifo specific structure */ |
630 | typedef struct fifo_info { | 633 | struct fifo_info { |
631 | /* FIFO number */ | 634 | /* FIFO number */ |
632 | int fifo_no; | 635 | int fifo_no; |
633 | 636 | ||
@@ -635,40 +638,40 @@ typedef struct fifo_info { | |||
635 | int max_txds; | 638 | int max_txds; |
636 | 639 | ||
637 | /* Place holder of all the TX List's Phy and Virt addresses. */ | 640 | /* Place holder of all the TX List's Phy and Virt addresses. */ |
638 | list_info_hold_t *list_info; | 641 | struct list_info_hold *list_info; |
639 | 642 | ||
640 | /* | 643 | /* |
641 | * Current offset within the tx FIFO where driver would write | 644 | * Current offset within the tx FIFO where driver would write |
642 | * new Tx frame | 645 | * new Tx frame |
643 | */ | 646 | */ |
644 | tx_curr_put_info_t tx_curr_put_info; | 647 | struct tx_curr_put_info tx_curr_put_info; |
645 | 648 | ||
646 | /* | 649 | /* |
647 | * Current offset within tx FIFO from where the driver would start freeing | 650 | * Current offset within tx FIFO from where the driver would start freeing |
648 | * the buffers | 651 | * the buffers |
649 | */ | 652 | */ |
650 | tx_curr_get_info_t tx_curr_get_info; | 653 | struct tx_curr_get_info tx_curr_get_info; |
651 | 654 | ||
652 | nic_t *nic; | 655 | struct s2io_nic *nic; |
653 | }fifo_info_t; | 656 | }; |
654 | 657 | ||
655 | /* Information related to the Tx and Rx FIFOs and Rings of Xena | 658 | /* Information related to the Tx and Rx FIFOs and Rings of Xena |
656 | * is maintained in this structure. | 659 | * is maintained in this structure. |
657 | */ | 660 | */ |
658 | typedef struct mac_info { | 661 | struct mac_info { |
659 | /* tx side stuff */ | 662 | /* tx side stuff */ |
660 | /* logical pointer of start of each Tx FIFO */ | 663 | /* logical pointer of start of each Tx FIFO */ |
661 | TxFIFO_element_t __iomem *tx_FIFO_start[MAX_TX_FIFOS]; | 664 | struct TxFIFO_element __iomem *tx_FIFO_start[MAX_TX_FIFOS]; |
662 | 665 | ||
663 | /* Fifo specific structure */ | 666 | /* Fifo specific structure */ |
664 | fifo_info_t fifos[MAX_TX_FIFOS]; | 667 | struct fifo_info fifos[MAX_TX_FIFOS]; |
665 | 668 | ||
666 | /* Save virtual address of TxD page with zero DMA addr(if any) */ | 669 | /* Save virtual address of TxD page with zero DMA addr(if any) */ |
667 | void *zerodma_virt_addr; | 670 | void *zerodma_virt_addr; |
668 | 671 | ||
669 | /* rx side stuff */ | 672 | /* rx side stuff */ |
670 | /* Ring specific structure */ | 673 | /* Ring specific structure */ |
671 | ring_info_t rings[MAX_RX_RINGS]; | 674 | struct ring_info rings[MAX_RX_RINGS]; |
672 | 675 | ||
673 | u16 rmac_pause_time; | 676 | u16 rmac_pause_time; |
674 | u16 mc_pause_threshold_q0q3; | 677 | u16 mc_pause_threshold_q0q3; |
@@ -677,14 +680,14 @@ typedef struct mac_info { | |||
677 | void *stats_mem; /* orignal pointer to allocated mem */ | 680 | void *stats_mem; /* orignal pointer to allocated mem */ |
678 | dma_addr_t stats_mem_phy; /* Physical address of the stat block */ | 681 | dma_addr_t stats_mem_phy; /* Physical address of the stat block */ |
679 | u32 stats_mem_sz; | 682 | u32 stats_mem_sz; |
680 | StatInfo_t *stats_info; /* Logical address of the stat block */ | 683 | struct stat_block *stats_info; /* Logical address of the stat block */ |
681 | } mac_info_t; | 684 | }; |
682 | 685 | ||
683 | /* structure representing the user defined MAC addresses */ | 686 | /* structure representing the user defined MAC addresses */ |
684 | typedef struct { | 687 | struct usr_addr { |
685 | char addr[ETH_ALEN]; | 688 | char addr[ETH_ALEN]; |
686 | int usage_cnt; | 689 | int usage_cnt; |
687 | } usr_addr_t; | 690 | }; |
688 | 691 | ||
689 | /* Default Tunable parameters of the NIC. */ | 692 | /* Default Tunable parameters of the NIC. */ |
690 | #define DEFAULT_FIFO_0_LEN 4096 | 693 | #define DEFAULT_FIFO_0_LEN 4096 |
@@ -717,7 +720,7 @@ struct msix_info_st { | |||
717 | }; | 720 | }; |
718 | 721 | ||
719 | /* Data structure to represent a LRO session */ | 722 | /* Data structure to represent a LRO session */ |
720 | typedef struct lro { | 723 | struct lro { |
721 | struct sk_buff *parent; | 724 | struct sk_buff *parent; |
722 | struct sk_buff *last_frag; | 725 | struct sk_buff *last_frag; |
723 | u8 *l2h; | 726 | u8 *l2h; |
@@ -733,7 +736,7 @@ typedef struct lro { | |||
733 | u32 cur_tsval; | 736 | u32 cur_tsval; |
734 | u32 cur_tsecr; | 737 | u32 cur_tsecr; |
735 | u8 saw_ts; | 738 | u8 saw_ts; |
736 | }lro_t; | 739 | }; |
737 | 740 | ||
738 | /* Structure representing one instance of the NIC */ | 741 | /* Structure representing one instance of the NIC */ |
739 | struct s2io_nic { | 742 | struct s2io_nic { |
@@ -744,7 +747,7 @@ struct s2io_nic { | |||
744 | */ | 747 | */ |
745 | int pkts_to_process; | 748 | int pkts_to_process; |
746 | struct net_device *dev; | 749 | struct net_device *dev; |
747 | mac_info_t mac_control; | 750 | struct mac_info mac_control; |
748 | struct config_param config; | 751 | struct config_param config; |
749 | struct pci_dev *pdev; | 752 | struct pci_dev *pdev; |
750 | void __iomem *bar0; | 753 | void __iomem *bar0; |
@@ -752,8 +755,8 @@ struct s2io_nic { | |||
752 | #define MAX_MAC_SUPPORTED 16 | 755 | #define MAX_MAC_SUPPORTED 16 |
753 | #define MAX_SUPPORTED_MULTICASTS MAX_MAC_SUPPORTED | 756 | #define MAX_SUPPORTED_MULTICASTS MAX_MAC_SUPPORTED |
754 | 757 | ||
755 | macaddr_t def_mac_addr[MAX_MAC_SUPPORTED]; | 758 | struct mac_addr def_mac_addr[MAX_MAC_SUPPORTED]; |
756 | macaddr_t pre_mac_addr[MAX_MAC_SUPPORTED]; | 759 | struct mac_addr pre_mac_addr[MAX_MAC_SUPPORTED]; |
757 | 760 | ||
758 | struct net_device_stats stats; | 761 | struct net_device_stats stats; |
759 | int high_dma_flag; | 762 | int high_dma_flag; |
@@ -781,7 +784,7 @@ struct s2io_nic { | |||
781 | #define MAX_ADDRS_SUPPORTED 64 | 784 | #define MAX_ADDRS_SUPPORTED 64 |
782 | u16 usr_addr_count; | 785 | u16 usr_addr_count; |
783 | u16 mc_addr_count; | 786 | u16 mc_addr_count; |
784 | usr_addr_t usr_addrs[MAX_ADDRS_SUPPORTED]; | 787 | struct usr_addr usr_addrs[MAX_ADDRS_SUPPORTED]; |
785 | 788 | ||
786 | u16 m_cast_flg; | 789 | u16 m_cast_flg; |
787 | u16 all_multi_pos; | 790 | u16 all_multi_pos; |
@@ -837,7 +840,7 @@ struct s2io_nic { | |||
837 | u8 device_type; | 840 | u8 device_type; |
838 | 841 | ||
839 | #define MAX_LRO_SESSIONS 32 | 842 | #define MAX_LRO_SESSIONS 32 |
840 | lro_t lro0_n[MAX_LRO_SESSIONS]; | 843 | struct lro lro0_n[MAX_LRO_SESSIONS]; |
841 | unsigned long clubbed_frms_cnt; | 844 | unsigned long clubbed_frms_cnt; |
842 | unsigned long sending_both; | 845 | unsigned long sending_both; |
843 | u8 lro; | 846 | u8 lro; |
@@ -972,8 +975,8 @@ static void __devexit s2io_rem_nic(struct pci_dev *pdev); | |||
972 | static int init_shared_mem(struct s2io_nic *sp); | 975 | static int init_shared_mem(struct s2io_nic *sp); |
973 | static void free_shared_mem(struct s2io_nic *sp); | 976 | static void free_shared_mem(struct s2io_nic *sp); |
974 | static int init_nic(struct s2io_nic *nic); | 977 | static int init_nic(struct s2io_nic *nic); |
975 | static void rx_intr_handler(ring_info_t *ring_data); | 978 | static void rx_intr_handler(struct ring_info *ring_data); |
976 | static void tx_intr_handler(fifo_info_t *fifo_data); | 979 | static void tx_intr_handler(struct fifo_info *fifo_data); |
977 | static void alarm_intr_handler(struct s2io_nic *sp); | 980 | static void alarm_intr_handler(struct s2io_nic *sp); |
978 | 981 | ||
979 | static int s2io_starter(void); | 982 | static int s2io_starter(void); |
@@ -981,38 +984,41 @@ static void s2io_closer(void); | |||
981 | static void s2io_tx_watchdog(struct net_device *dev); | 984 | static void s2io_tx_watchdog(struct net_device *dev); |
982 | static void s2io_tasklet(unsigned long dev_addr); | 985 | static void s2io_tasklet(unsigned long dev_addr); |
983 | static void s2io_set_multicast(struct net_device *dev); | 986 | static void s2io_set_multicast(struct net_device *dev); |
984 | static int rx_osm_handler(ring_info_t *ring_data, RxD_t * rxdp); | 987 | static int rx_osm_handler(struct ring_info *ring_data, struct RxD_t * rxdp); |
985 | static void s2io_link(nic_t * sp, int link); | 988 | static void s2io_link(struct s2io_nic * sp, int link); |
986 | static void s2io_reset(nic_t * sp); | 989 | static void s2io_reset(struct s2io_nic * sp); |
987 | static int s2io_poll(struct net_device *dev, int *budget); | 990 | static int s2io_poll(struct net_device *dev, int *budget); |
988 | static void s2io_init_pci(nic_t * sp); | 991 | static void s2io_init_pci(struct s2io_nic * sp); |
989 | static int s2io_set_mac_addr(struct net_device *dev, u8 * addr); | 992 | static int s2io_set_mac_addr(struct net_device *dev, u8 * addr); |
990 | static void s2io_alarm_handle(unsigned long data); | 993 | static void s2io_alarm_handle(unsigned long data); |
991 | static int s2io_enable_msi(nic_t *nic); | 994 | static int s2io_enable_msi(struct s2io_nic *nic); |
992 | static irqreturn_t s2io_msi_handle(int irq, void *dev_id); | 995 | static irqreturn_t s2io_msi_handle(int irq, void *dev_id); |
993 | static irqreturn_t | 996 | static irqreturn_t |
994 | s2io_msix_ring_handle(int irq, void *dev_id); | 997 | s2io_msix_ring_handle(int irq, void *dev_id); |
995 | static irqreturn_t | 998 | static irqreturn_t |
996 | s2io_msix_fifo_handle(int irq, void *dev_id); | 999 | s2io_msix_fifo_handle(int irq, void *dev_id); |
997 | static irqreturn_t s2io_isr(int irq, void *dev_id); | 1000 | static irqreturn_t s2io_isr(int irq, void *dev_id); |
998 | static int verify_xena_quiescence(nic_t *sp); | 1001 | static int verify_xena_quiescence(struct s2io_nic *sp); |
999 | static const struct ethtool_ops netdev_ethtool_ops; | 1002 | static const struct ethtool_ops netdev_ethtool_ops; |
1000 | static void s2io_set_link(struct work_struct *work); | 1003 | static void s2io_set_link(struct work_struct *work); |
1001 | static int s2io_set_swapper(nic_t * sp); | 1004 | static int s2io_set_swapper(struct s2io_nic * sp); |
1002 | static void s2io_card_down(nic_t *nic); | 1005 | static void s2io_card_down(struct s2io_nic *nic); |
1003 | static int s2io_card_up(nic_t *nic); | 1006 | static int s2io_card_up(struct s2io_nic *nic); |
1004 | static int get_xena_rev_id(struct pci_dev *pdev); | 1007 | static int get_xena_rev_id(struct pci_dev *pdev); |
1005 | static int wait_for_cmd_complete(void *addr, u64 busy_bit); | 1008 | static int wait_for_cmd_complete(void *addr, u64 busy_bit); |
1006 | static int s2io_add_isr(nic_t * sp); | 1009 | static int s2io_add_isr(struct s2io_nic * sp); |
1007 | static void s2io_rem_isr(nic_t * sp); | 1010 | static void s2io_rem_isr(struct s2io_nic * sp); |
1008 | 1011 | ||
1009 | static void restore_xmsi_data(nic_t *nic); | 1012 | static void restore_xmsi_data(struct s2io_nic *nic); |
1010 | 1013 | ||
1011 | static int s2io_club_tcp_session(u8 *buffer, u8 **tcp, u32 *tcp_len, lro_t **lro, RxD_t *rxdp, nic_t *sp); | 1014 | static int |
1012 | static void clear_lro_session(lro_t *lro); | 1015 | s2io_club_tcp_session(u8 *buffer, u8 **tcp, u32 *tcp_len, struct lro **lro, |
1016 | struct RxD_t *rxdp, struct s2io_nic *sp); | ||
1017 | static void clear_lro_session(struct lro *lro); | ||
1013 | static void queue_rx_frame(struct sk_buff *skb); | 1018 | static void queue_rx_frame(struct sk_buff *skb); |
1014 | static void update_L3L4_header(nic_t *sp, lro_t *lro); | 1019 | static void update_L3L4_header(struct s2io_nic *sp, struct lro *lro); |
1015 | static void lro_append_pkt(nic_t *sp, lro_t *lro, struct sk_buff *skb, u32 tcp_len); | 1020 | static void lro_append_pkt(struct s2io_nic *sp, struct lro *lro, |
1021 | struct sk_buff *skb, u32 tcp_len); | ||
1016 | 1022 | ||
1017 | #define s2io_tcp_mss(skb) skb_shinfo(skb)->gso_size | 1023 | #define s2io_tcp_mss(skb) skb_shinfo(skb)->gso_size |
1018 | #define s2io_udp_mss(skb) skb_shinfo(skb)->gso_size | 1024 | #define s2io_udp_mss(skb) skb_shinfo(skb)->gso_size |