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authorAnanda Raju <Ananda.Raju@neterion.com>2006-04-21 19:20:22 -0400
committerJeff Garzik <jeff@garzik.org>2006-05-02 15:16:36 -0400
commitbd1034f035f3679fbc753a1368559c0b4b89f8f6 (patch)
treeb4c51f217c4067a0dfbebe20cc5a19dc7817cd3c /drivers/net/s2io-regs.h
parentc92ca04b2a21852fbc6842e8a7c6fff3ae255b30 (diff)
[PATCH] s2io: additional stats
Hi, This patch contains additional statistics counters added to s2io driver these statistics are very much usefull in debugging the driver. Signed-off-by: Ananda Raju <ananda.raju@neterion.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
Diffstat (limited to 'drivers/net/s2io-regs.h')
-rw-r--r--drivers/net/s2io-regs.h23
1 files changed, 22 insertions, 1 deletions
diff --git a/drivers/net/s2io-regs.h b/drivers/net/s2io-regs.h
index 542ae1574801..0ef525899566 100644
--- a/drivers/net/s2io-regs.h
+++ b/drivers/net/s2io-regs.h
@@ -167,6 +167,7 @@ typedef struct _XENA_dev_config {
167 u8 unused4[0x08]; 167 u8 unused4[0x08];
168 168
169 u64 gpio_int_reg; 169 u64 gpio_int_reg;
170#define GPIO_INT_REG_DP_ERR_INT BIT(0)
170#define GPIO_INT_REG_LINK_DOWN BIT(1) 171#define GPIO_INT_REG_LINK_DOWN BIT(1)
171#define GPIO_INT_REG_LINK_UP BIT(2) 172#define GPIO_INT_REG_LINK_UP BIT(2)
172 u64 gpio_int_mask; 173 u64 gpio_int_mask;
@@ -267,6 +268,21 @@ typedef struct _XENA_dev_config {
267 268
268 /* General Configuration */ 269 /* General Configuration */
269 u64 mdio_control; 270 u64 mdio_control;
271#define MDIO_MMD_INDX_ADDR(val) vBIT(val, 0, 16)
272#define MDIO_MMD_DEV_ADDR(val) vBIT(val, 19, 5)
273#define MDIO_MMD_PMA_DEV_ADDR 0x1
274#define MDIO_MMD_PMD_DEV_ADDR 0x1
275#define MDIO_MMD_WIS_DEV_ADDR 0x2
276#define MDIO_MMD_PCS_DEV_ADDR 0x3
277#define MDIO_MMD_PHYXS_DEV_ADDR 0x4
278#define MDIO_MMS_PRT_ADDR(val) vBIT(val, 27, 5)
279#define MDIO_CTRL_START_TRANS(val) vBIT(val, 56, 4)
280#define MDIO_OP(val) vBIT(val, 60, 2)
281#define MDIO_OP_ADDR_TRANS 0x0
282#define MDIO_OP_WRITE_TRANS 0x1
283#define MDIO_OP_READ_POST_INC_TRANS 0x2
284#define MDIO_OP_READ_TRANS 0x3
285#define MDIO_MDIO_DATA(val) vBIT(val, 32, 16)
270 286
271 u64 dtx_control; 287 u64 dtx_control;
272 288
@@ -546,7 +562,12 @@ typedef struct _XENA_dev_config {
546#define RX_PA_CFG_IGNORE_LLC_CTRL BIT(3) 562#define RX_PA_CFG_IGNORE_LLC_CTRL BIT(3)
547#define RX_PA_CFG_IGNORE_L2_ERR BIT(6) 563#define RX_PA_CFG_IGNORE_L2_ERR BIT(6)
548 564
549 u8 unused12[0x700 - 0x1D8]; 565 u64 unused_11_1;
566
567 u64 ring_bump_counter1;
568 u64 ring_bump_counter2;
569
570 u8 unused12[0x700 - 0x1F0];
550 571
551 u64 rxdma_debug_ctrl; 572 u64 rxdma_debug_ctrl;
552 573