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authorPekka Enberg <penberg@kernel.org>2011-03-11 11:10:45 -0500
committerPekka Enberg <penberg@kernel.org>2011-03-11 11:10:45 -0500
commitc9149556756d56c68451a4a8735c37e7062fd3d7 (patch)
treea2dae56b22adaa9a23c8f92f30c3b3ad3b610850 /drivers/net/r8169.c
parentd71f606f687ef9d0cdddfd3619ca7cb9a0b3fb63 (diff)
parent5bfe53a77e8a3ffce4a10003c75f464a138e272d (diff)
Merge branch 'slab/rcu' into slab/next
Conflicts: mm/slub.c
Diffstat (limited to 'drivers/net/r8169.c')
-rw-r--r--drivers/net/r8169.c91
1 files changed, 63 insertions, 28 deletions
diff --git a/drivers/net/r8169.c b/drivers/net/r8169.c
index bde7d61f1930..7ffdb80adf40 100644
--- a/drivers/net/r8169.c
+++ b/drivers/net/r8169.c
@@ -25,6 +25,7 @@
25#include <linux/dma-mapping.h> 25#include <linux/dma-mapping.h>
26#include <linux/pm_runtime.h> 26#include <linux/pm_runtime.h>
27#include <linux/firmware.h> 27#include <linux/firmware.h>
28#include <linux/pci-aspm.h>
28 29
29#include <asm/system.h> 30#include <asm/system.h>
30#include <asm/io.h> 31#include <asm/io.h>
@@ -617,8 +618,9 @@ static void ocp_write(struct rtl8169_private *tp, u8 mask, u16 reg, u32 data)
617 } 618 }
618} 619}
619 620
620static void rtl8168_oob_notify(void __iomem *ioaddr, u8 cmd) 621static void rtl8168_oob_notify(struct rtl8169_private *tp, u8 cmd)
621{ 622{
623 void __iomem *ioaddr = tp->mmio_addr;
622 int i; 624 int i;
623 625
624 RTL_W8(ERIDR, cmd); 626 RTL_W8(ERIDR, cmd);
@@ -630,7 +632,7 @@ static void rtl8168_oob_notify(void __iomem *ioaddr, u8 cmd)
630 break; 632 break;
631 } 633 }
632 634
633 ocp_write(ioaddr, 0x1, 0x30, 0x00000001); 635 ocp_write(tp, 0x1, 0x30, 0x00000001);
634} 636}
635 637
636#define OOB_CMD_RESET 0x00 638#define OOB_CMD_RESET 0x00
@@ -973,7 +975,8 @@ static void __rtl8169_check_link_status(struct net_device *dev,
973 if (pm) 975 if (pm)
974 pm_request_resume(&tp->pci_dev->dev); 976 pm_request_resume(&tp->pci_dev->dev);
975 netif_carrier_on(dev); 977 netif_carrier_on(dev);
976 netif_info(tp, ifup, dev, "link up\n"); 978 if (net_ratelimit())
979 netif_info(tp, ifup, dev, "link up\n");
977 } else { 980 } else {
978 netif_carrier_off(dev); 981 netif_carrier_off(dev);
979 netif_info(tp, ifdown, dev, "link down\n"); 982 netif_info(tp, ifdown, dev, "link down\n");
@@ -2867,8 +2870,11 @@ static void r8168_pll_power_down(struct rtl8169_private *tp)
2867{ 2870{
2868 void __iomem *ioaddr = tp->mmio_addr; 2871 void __iomem *ioaddr = tp->mmio_addr;
2869 2872
2870 if (tp->mac_version == RTL_GIGA_MAC_VER_27) 2873 if (((tp->mac_version == RTL_GIGA_MAC_VER_27) ||
2874 (tp->mac_version == RTL_GIGA_MAC_VER_28)) &&
2875 (ocp_read(tp, 0x0f, 0x0010) & 0x00008000)) {
2871 return; 2876 return;
2877 }
2872 2878
2873 if (((tp->mac_version == RTL_GIGA_MAC_VER_23) || 2879 if (((tp->mac_version == RTL_GIGA_MAC_VER_23) ||
2874 (tp->mac_version == RTL_GIGA_MAC_VER_24)) && 2880 (tp->mac_version == RTL_GIGA_MAC_VER_24)) &&
@@ -2890,6 +2896,8 @@ static void r8168_pll_power_down(struct rtl8169_private *tp)
2890 switch (tp->mac_version) { 2896 switch (tp->mac_version) {
2891 case RTL_GIGA_MAC_VER_25: 2897 case RTL_GIGA_MAC_VER_25:
2892 case RTL_GIGA_MAC_VER_26: 2898 case RTL_GIGA_MAC_VER_26:
2899 case RTL_GIGA_MAC_VER_27:
2900 case RTL_GIGA_MAC_VER_28:
2893 RTL_W8(PMCH, RTL_R8(PMCH) & ~0x80); 2901 RTL_W8(PMCH, RTL_R8(PMCH) & ~0x80);
2894 break; 2902 break;
2895 } 2903 }
@@ -2899,12 +2907,17 @@ static void r8168_pll_power_up(struct rtl8169_private *tp)
2899{ 2907{
2900 void __iomem *ioaddr = tp->mmio_addr; 2908 void __iomem *ioaddr = tp->mmio_addr;
2901 2909
2902 if (tp->mac_version == RTL_GIGA_MAC_VER_27) 2910 if (((tp->mac_version == RTL_GIGA_MAC_VER_27) ||
2911 (tp->mac_version == RTL_GIGA_MAC_VER_28)) &&
2912 (ocp_read(tp, 0x0f, 0x0010) & 0x00008000)) {
2903 return; 2913 return;
2914 }
2904 2915
2905 switch (tp->mac_version) { 2916 switch (tp->mac_version) {
2906 case RTL_GIGA_MAC_VER_25: 2917 case RTL_GIGA_MAC_VER_25:
2907 case RTL_GIGA_MAC_VER_26: 2918 case RTL_GIGA_MAC_VER_26:
2919 case RTL_GIGA_MAC_VER_27:
2920 case RTL_GIGA_MAC_VER_28:
2908 RTL_W8(PMCH, RTL_R8(PMCH) | 0x80); 2921 RTL_W8(PMCH, RTL_R8(PMCH) | 0x80);
2909 break; 2922 break;
2910 } 2923 }
@@ -3008,6 +3021,11 @@ rtl8169_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
3008 mii->reg_num_mask = 0x1f; 3021 mii->reg_num_mask = 0x1f;
3009 mii->supports_gmii = !!(cfg->features & RTL_FEATURE_GMII); 3022 mii->supports_gmii = !!(cfg->features & RTL_FEATURE_GMII);
3010 3023
3024 /* disable ASPM completely as that cause random device stop working
3025 * problems as well as full system hangs for some PCIe devices users */
3026 pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1 |
3027 PCIE_LINK_STATE_CLKPM);
3028
3011 /* enable device (incl. PCI PM wakeup and hotplug setup) */ 3029 /* enable device (incl. PCI PM wakeup and hotplug setup) */
3012 rc = pci_enable_device(pdev); 3030 rc = pci_enable_device(pdev);
3013 if (rc < 0) { 3031 if (rc < 0) {
@@ -3041,7 +3059,7 @@ rtl8169_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
3041 goto err_out_mwi_2; 3059 goto err_out_mwi_2;
3042 } 3060 }
3043 3061
3044 tp->cp_cmd = PCIMulRW | RxChkSum; 3062 tp->cp_cmd = RxChkSum;
3045 3063
3046 if ((sizeof(dma_addr_t) > 4) && 3064 if ((sizeof(dma_addr_t) > 4) &&
3047 !pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) && use_dac) { 3065 !pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) && use_dac) {
@@ -3189,6 +3207,8 @@ rtl8169_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
3189 if (pci_dev_run_wake(pdev)) 3207 if (pci_dev_run_wake(pdev))
3190 pm_runtime_put_noidle(&pdev->dev); 3208 pm_runtime_put_noidle(&pdev->dev);
3191 3209
3210 netif_carrier_off(dev);
3211
3192out: 3212out:
3193 return rc; 3213 return rc;
3194 3214
@@ -3315,7 +3335,8 @@ static void rtl8169_hw_reset(struct rtl8169_private *tp)
3315 /* Disable interrupts */ 3335 /* Disable interrupts */
3316 rtl8169_irq_mask_and_ack(ioaddr); 3336 rtl8169_irq_mask_and_ack(ioaddr);
3317 3337
3318 if (tp->mac_version == RTL_GIGA_MAC_VER_28) { 3338 if (tp->mac_version == RTL_GIGA_MAC_VER_27 ||
3339 tp->mac_version == RTL_GIGA_MAC_VER_28) {
3319 while (RTL_R8(TxPoll) & NPQ) 3340 while (RTL_R8(TxPoll) & NPQ)
3320 udelay(20); 3341 udelay(20);
3321 3342
@@ -3757,7 +3778,8 @@ static void rtl_hw_start_8168(struct net_device *dev)
3757 RTL_W16(IntrMitigate, 0x5151); 3778 RTL_W16(IntrMitigate, 0x5151);
3758 3779
3759 /* Work around for RxFIFO overflow. */ 3780 /* Work around for RxFIFO overflow. */
3760 if (tp->mac_version == RTL_GIGA_MAC_VER_11) { 3781 if (tp->mac_version == RTL_GIGA_MAC_VER_11 ||
3782 tp->mac_version == RTL_GIGA_MAC_VER_22) {
3761 tp->intr_event |= RxFIFOOver | PCSTimeout; 3783 tp->intr_event |= RxFIFOOver | PCSTimeout;
3762 tp->intr_event &= ~RxOverflow; 3784 tp->intr_event &= ~RxOverflow;
3763 } 3785 }
@@ -3843,8 +3865,7 @@ static void rtl_hw_start_8168(struct net_device *dev)
3843 Cxpl_dbg_sel | \ 3865 Cxpl_dbg_sel | \
3844 ASF | \ 3866 ASF | \
3845 PktCntrDisable | \ 3867 PktCntrDisable | \
3846 PCIDAC | \ 3868 Mac_dbgo_sel)
3847 PCIMulRW)
3848 3869
3849static void rtl_hw_start_8102e_1(void __iomem *ioaddr, struct pci_dev *pdev) 3870static void rtl_hw_start_8102e_1(void __iomem *ioaddr, struct pci_dev *pdev)
3850{ 3871{
@@ -3874,8 +3895,6 @@ static void rtl_hw_start_8102e_1(void __iomem *ioaddr, struct pci_dev *pdev)
3874 if ((cfg1 & LEDS0) && (cfg1 & LEDS1)) 3895 if ((cfg1 & LEDS0) && (cfg1 & LEDS1))
3875 RTL_W8(Config1, cfg1 & ~LEDS0); 3896 RTL_W8(Config1, cfg1 & ~LEDS0);
3876 3897
3877 RTL_W16(CPlusCmd, RTL_R16(CPlusCmd) & ~R810X_CPCMD_QUIRK_MASK);
3878
3879 rtl_ephy_init(ioaddr, e_info_8102e_1, ARRAY_SIZE(e_info_8102e_1)); 3898 rtl_ephy_init(ioaddr, e_info_8102e_1, ARRAY_SIZE(e_info_8102e_1));
3880} 3899}
3881 3900
@@ -3887,8 +3906,6 @@ static void rtl_hw_start_8102e_2(void __iomem *ioaddr, struct pci_dev *pdev)
3887 3906
3888 RTL_W8(Config1, MEMMAP | IOMAP | VPD | PMEnable); 3907 RTL_W8(Config1, MEMMAP | IOMAP | VPD | PMEnable);
3889 RTL_W8(Config3, RTL_R8(Config3) & ~Beacon_en); 3908 RTL_W8(Config3, RTL_R8(Config3) & ~Beacon_en);
3890
3891 RTL_W16(CPlusCmd, RTL_R16(CPlusCmd) & ~R810X_CPCMD_QUIRK_MASK);
3892} 3909}
3893 3910
3894static void rtl_hw_start_8102e_3(void __iomem *ioaddr, struct pci_dev *pdev) 3911static void rtl_hw_start_8102e_3(void __iomem *ioaddr, struct pci_dev *pdev)
@@ -3914,6 +3931,8 @@ static void rtl_hw_start_8101(struct net_device *dev)
3914 } 3931 }
3915 } 3932 }
3916 3933
3934 RTL_W8(Cfg9346, Cfg9346_Unlock);
3935
3917 switch (tp->mac_version) { 3936 switch (tp->mac_version) {
3918 case RTL_GIGA_MAC_VER_07: 3937 case RTL_GIGA_MAC_VER_07:
3919 rtl_hw_start_8102e_1(ioaddr, pdev); 3938 rtl_hw_start_8102e_1(ioaddr, pdev);
@@ -3928,14 +3947,13 @@ static void rtl_hw_start_8101(struct net_device *dev)
3928 break; 3947 break;
3929 } 3948 }
3930 3949
3931 RTL_W8(Cfg9346, Cfg9346_Unlock); 3950 RTL_W8(Cfg9346, Cfg9346_Lock);
3932 3951
3933 RTL_W8(MaxTxPacketSize, TxPacketMax); 3952 RTL_W8(MaxTxPacketSize, TxPacketMax);
3934 3953
3935 rtl_set_rx_max_size(ioaddr, rx_buf_sz); 3954 rtl_set_rx_max_size(ioaddr, rx_buf_sz);
3936 3955
3937 tp->cp_cmd |= rtl_rw_cpluscmd(ioaddr) | PCIMulRW; 3956 tp->cp_cmd &= ~R810X_CPCMD_QUIRK_MASK;
3938
3939 RTL_W16(CPlusCmd, tp->cp_cmd); 3957 RTL_W16(CPlusCmd, tp->cp_cmd);
3940 3958
3941 RTL_W16(IntrMitigate, 0x0000); 3959 RTL_W16(IntrMitigate, 0x0000);
@@ -3945,14 +3963,10 @@ static void rtl_hw_start_8101(struct net_device *dev)
3945 RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb); 3963 RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb);
3946 rtl_set_rx_tx_config_registers(tp); 3964 rtl_set_rx_tx_config_registers(tp);
3947 3965
3948 RTL_W8(Cfg9346, Cfg9346_Lock);
3949
3950 RTL_R8(IntrMask); 3966 RTL_R8(IntrMask);
3951 3967
3952 rtl_set_rx_mode(dev); 3968 rtl_set_rx_mode(dev);
3953 3969
3954 RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb);
3955
3956 RTL_W16(MultiIntr, RTL_R16(MultiIntr) & 0xf000); 3970 RTL_W16(MultiIntr, RTL_R16(MultiIntr) & 0xf000);
3957 3971
3958 RTL_W16(IntrMask, tp->intr_event); 3972 RTL_W16(IntrMask, tp->intr_event);
@@ -4639,12 +4653,33 @@ static irqreturn_t rtl8169_interrupt(int irq, void *dev_instance)
4639 break; 4653 break;
4640 } 4654 }
4641 4655
4642 /* Work around for rx fifo overflow */ 4656 if (unlikely(status & RxFIFOOver)) {
4643 if (unlikely(status & RxFIFOOver) && 4657 switch (tp->mac_version) {
4644 (tp->mac_version == RTL_GIGA_MAC_VER_11)) { 4658 /* Work around for rx fifo overflow */
4645 netif_stop_queue(dev); 4659 case RTL_GIGA_MAC_VER_11:
4646 rtl8169_tx_timeout(dev); 4660 case RTL_GIGA_MAC_VER_22:
4647 break; 4661 case RTL_GIGA_MAC_VER_26:
4662 netif_stop_queue(dev);
4663 rtl8169_tx_timeout(dev);
4664 goto done;
4665 /* Testers needed. */
4666 case RTL_GIGA_MAC_VER_17:
4667 case RTL_GIGA_MAC_VER_19:
4668 case RTL_GIGA_MAC_VER_20:
4669 case RTL_GIGA_MAC_VER_21:
4670 case RTL_GIGA_MAC_VER_23:
4671 case RTL_GIGA_MAC_VER_24:
4672 case RTL_GIGA_MAC_VER_27:
4673 case RTL_GIGA_MAC_VER_28:
4674 /* Experimental science. Pktgen proof. */
4675 case RTL_GIGA_MAC_VER_12:
4676 case RTL_GIGA_MAC_VER_25:
4677 if (status == RxFIFOOver)
4678 goto done;
4679 break;
4680 default:
4681 break;
4682 }
4648 } 4683 }
4649 4684
4650 if (unlikely(status & SYSErr)) { 4685 if (unlikely(status & SYSErr)) {
@@ -4680,7 +4715,7 @@ static irqreturn_t rtl8169_interrupt(int irq, void *dev_instance)
4680 (status & RxFIFOOver) ? (status | RxOverflow) : status); 4715 (status & RxFIFOOver) ? (status | RxOverflow) : status);
4681 status = RTL_R16(IntrStatus); 4716 status = RTL_R16(IntrStatus);
4682 } 4717 }
4683 4718done:
4684 return IRQ_RETVAL(handled); 4719 return IRQ_RETVAL(handled);
4685} 4720}
4686 4721