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authorFrancois Romieu <romieu@fr.zoreil.com>2008-06-28 07:16:02 -0400
committerFrancois Romieu <romieu@fr.zoreil.com>2008-10-10 17:08:47 -0400
commit197ff761dbf9fa5de9a4684a51ee5cb534cbb852 (patch)
tree145981cd64d4e935506112e9838fafaf268b3004 /drivers/net/r8169.c
parentb726e493e8dc13537d1d7f8cd66bcd28516606c3 (diff)
r8169: add a new 8168c flavor
Taken from Realtek's 8.006.00 r8168 driver. Signed-off-by: Francois Romieu <romieu@fr.zoreil.com> Cc: Edward Hsu <edward_hsu@realtek.com.tw>
Diffstat (limited to 'drivers/net/r8169.c')
-rw-r--r--drivers/net/r8169.c41
1 files changed, 39 insertions, 2 deletions
diff --git a/drivers/net/r8169.c b/drivers/net/r8169.c
index f0f842d7b941..9681aca75afe 100644
--- a/drivers/net/r8169.c
+++ b/drivers/net/r8169.c
@@ -109,7 +109,8 @@ enum mac_version {
109 RTL_GIGA_MAC_VER_17 = 0x10, // 8168Bf 109 RTL_GIGA_MAC_VER_17 = 0x10, // 8168Bf
110 RTL_GIGA_MAC_VER_18 = 0x12, // 8168CP 110 RTL_GIGA_MAC_VER_18 = 0x12, // 8168CP
111 RTL_GIGA_MAC_VER_19 = 0x13, // 8168C 111 RTL_GIGA_MAC_VER_19 = 0x13, // 8168C
112 RTL_GIGA_MAC_VER_20 = 0x14 // 8168C 112 RTL_GIGA_MAC_VER_20 = 0x14, // 8168C
113 RTL_GIGA_MAC_VER_21 = 0x15 // 8168C
113}; 114};
114 115
115#define _R(NAME,MAC,MASK) \ 116#define _R(NAME,MAC,MASK) \
@@ -139,7 +140,8 @@ static const struct {
139 _R("RTL8101e", RTL_GIGA_MAC_VER_16, 0xff7e1880), // PCI-E 140 _R("RTL8101e", RTL_GIGA_MAC_VER_16, 0xff7e1880), // PCI-E
140 _R("RTL8168cp/8111cp", RTL_GIGA_MAC_VER_18, 0xff7e1880), // PCI-E 141 _R("RTL8168cp/8111cp", RTL_GIGA_MAC_VER_18, 0xff7e1880), // PCI-E
141 _R("RTL8168c/8111c", RTL_GIGA_MAC_VER_19, 0xff7e1880), // PCI-E 142 _R("RTL8168c/8111c", RTL_GIGA_MAC_VER_19, 0xff7e1880), // PCI-E
142 _R("RTL8168c/8111c", RTL_GIGA_MAC_VER_20, 0xff7e1880) // PCI-E 143 _R("RTL8168c/8111c", RTL_GIGA_MAC_VER_20, 0xff7e1880), // PCI-E
144 _R("RTL8168c/8111c", RTL_GIGA_MAC_VER_21, 0xff7e1880) // PCI-E
143}; 145};
144#undef _R 146#undef _R
145 147
@@ -1220,6 +1222,7 @@ static void rtl8169_get_mac_version(struct rtl8169_private *tp,
1220 { 0x7c800000, 0x3c800000, RTL_GIGA_MAC_VER_18 }, 1222 { 0x7c800000, 0x3c800000, RTL_GIGA_MAC_VER_18 },
1221 { 0x7cf00000, 0x3c000000, RTL_GIGA_MAC_VER_19 }, 1223 { 0x7cf00000, 0x3c000000, RTL_GIGA_MAC_VER_19 },
1222 { 0x7cf00000, 0x3c200000, RTL_GIGA_MAC_VER_20 }, 1224 { 0x7cf00000, 0x3c200000, RTL_GIGA_MAC_VER_20 },
1225 { 0x7cf00000, 0x3c300000, RTL_GIGA_MAC_VER_21 },
1223 { 0x7c800000, 0x3c000000, RTL_GIGA_MAC_VER_20 }, 1226 { 0x7c800000, 0x3c000000, RTL_GIGA_MAC_VER_20 },
1224 1227
1225 /* 8168B family. */ 1228 /* 8168B family. */
@@ -1444,6 +1447,28 @@ static void rtl8168c_2_hw_phy_config(void __iomem *ioaddr)
1444 mdio_write(ioaddr, 0x1f, 0x0000); 1447 mdio_write(ioaddr, 0x1f, 0x0000);
1445} 1448}
1446 1449
1450static void rtl8168c_3_hw_phy_config(void __iomem *ioaddr)
1451{
1452 struct phy_reg phy_reg_init[] = {
1453 { 0x1f, 0x0001 },
1454 { 0x12, 0x2300 },
1455 { 0x1d, 0x3d98 },
1456 { 0x1f, 0x0002 },
1457 { 0x0c, 0x7eb8 },
1458 { 0x06, 0x5461 },
1459 { 0x1f, 0x0003 },
1460 { 0x16, 0x0f0a },
1461 { 0x1f, 0x0000 }
1462 };
1463
1464 rtl_phy_write(ioaddr, phy_reg_init, ARRAY_SIZE(phy_reg_init));
1465
1466 mdio_patch(ioaddr, 0x16, 1 << 0);
1467 mdio_patch(ioaddr, 0x14, 1 << 5);
1468 mdio_patch(ioaddr, 0x0d, 1 << 5);
1469 mdio_write(ioaddr, 0x1f, 0x0000);
1470}
1471
1447static void rtl8102e_hw_phy_config(void __iomem *ioaddr) 1472static void rtl8102e_hw_phy_config(void __iomem *ioaddr)
1448{ 1473{
1449 struct phy_reg phy_reg_init[] = { 1474 struct phy_reg phy_reg_init[] = {
@@ -1500,6 +1525,9 @@ static void rtl_hw_phy_config(struct net_device *dev)
1500 case RTL_GIGA_MAC_VER_20: 1525 case RTL_GIGA_MAC_VER_20:
1501 rtl8168c_2_hw_phy_config(ioaddr); 1526 rtl8168c_2_hw_phy_config(ioaddr);
1502 break; 1527 break;
1528 case RTL_GIGA_MAC_VER_21:
1529 rtl8168c_3_hw_phy_config(ioaddr);
1530 break;
1503 default: 1531 default:
1504 break; 1532 break;
1505 } 1533 }
@@ -2490,6 +2518,11 @@ static void rtl_hw_start_8168c_2(void __iomem *ioaddr, struct pci_dev *pdev)
2490 __rtl_hw_start_8168cp(ioaddr, pdev); 2518 __rtl_hw_start_8168cp(ioaddr, pdev);
2491} 2519}
2492 2520
2521static void rtl_hw_start_8168c_3(void __iomem *ioaddr, struct pci_dev *pdev)
2522{
2523 rtl_hw_start_8168c_2(ioaddr, pdev);
2524}
2525
2493static void rtl_hw_start_8168(struct net_device *dev) 2526static void rtl_hw_start_8168(struct net_device *dev)
2494{ 2527{
2495 struct rtl8169_private *tp = netdev_priv(dev); 2528 struct rtl8169_private *tp = netdev_priv(dev);
@@ -2545,6 +2578,10 @@ static void rtl_hw_start_8168(struct net_device *dev)
2545 rtl_hw_start_8168c_2(ioaddr, pdev); 2578 rtl_hw_start_8168c_2(ioaddr, pdev);
2546 break; 2579 break;
2547 2580
2581 case RTL_GIGA_MAC_VER_21:
2582 rtl_hw_start_8168c_3(ioaddr, pdev);
2583 break;
2584
2548 default: 2585 default:
2549 printk(KERN_ERR PFX "%s: unknown chipset (mac_version = %d).\n", 2586 printk(KERN_ERR PFX "%s: unknown chipset (mac_version = %d).\n",
2550 dev->name, tp->mac_version); 2587 dev->name, tp->mac_version);