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authorfrançois romieu <romieu@fr.zoreil.com>2011-01-03 10:08:29 -0500
committerDavid S. Miller <davem@davemloft.net>2011-01-04 12:48:34 -0500
commit650e8d5d1fdd5e55869136e2df54287a4432d87f (patch)
treeba1d609d37884248d0ce9487f316f8cb4f735633 /drivers/net/r8169.c
parentb646d90053f887c1bc243191e693a9b02d09f2c2 (diff)
r8169: rtl_csi_access_enable rename.
Newer 8168 needs a slightly different rtl_csi_access_enable. This patch separates some noise from the real thing. No functional change. Signed-off-by: Francois Romieu <romieu@fr.zoreil.com> Cc: Hayes <hayeswang@realtek.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/r8169.c')
-rw-r--r--drivers/net/r8169.c27
1 files changed, 16 insertions, 11 deletions
diff --git a/drivers/net/r8169.c b/drivers/net/r8169.c
index a73dd287fdba..a468ee98ab9e 100644
--- a/drivers/net/r8169.c
+++ b/drivers/net/r8169.c
@@ -3310,12 +3310,17 @@ static void rtl_tx_performance_tweak(struct pci_dev *pdev, u16 force)
3310 } 3310 }
3311} 3311}
3312 3312
3313static void rtl_csi_access_enable(void __iomem *ioaddr) 3313static void rtl_csi_access_enable(void __iomem *ioaddr, u32 bits)
3314{ 3314{
3315 u32 csi; 3315 u32 csi;
3316 3316
3317 csi = rtl_csi_read(ioaddr, 0x070c) & 0x00ffffff; 3317 csi = rtl_csi_read(ioaddr, 0x070c) & 0x00ffffff;
3318 rtl_csi_write(ioaddr, 0x070c, csi | 0x27000000); 3318 rtl_csi_write(ioaddr, 0x070c, csi | bits);
3319}
3320
3321static void rtl_csi_access_enable_2(void __iomem *ioaddr)
3322{
3323 rtl_csi_access_enable(ioaddr, 0x27000000);
3319} 3324}
3320 3325
3321struct ephy_info { 3326struct ephy_info {
@@ -3403,7 +3408,7 @@ static void rtl_hw_start_8168cp_1(void __iomem *ioaddr, struct pci_dev *pdev)
3403 { 0x07, 0, 0x2000 } 3408 { 0x07, 0, 0x2000 }
3404 }; 3409 };
3405 3410
3406 rtl_csi_access_enable(ioaddr); 3411 rtl_csi_access_enable_2(ioaddr);
3407 3412
3408 rtl_ephy_init(ioaddr, e_info_8168cp, ARRAY_SIZE(e_info_8168cp)); 3413 rtl_ephy_init(ioaddr, e_info_8168cp, ARRAY_SIZE(e_info_8168cp));
3409 3414
@@ -3412,7 +3417,7 @@ static void rtl_hw_start_8168cp_1(void __iomem *ioaddr, struct pci_dev *pdev)
3412 3417
3413static void rtl_hw_start_8168cp_2(void __iomem *ioaddr, struct pci_dev *pdev) 3418static void rtl_hw_start_8168cp_2(void __iomem *ioaddr, struct pci_dev *pdev)
3414{ 3419{
3415 rtl_csi_access_enable(ioaddr); 3420 rtl_csi_access_enable_2(ioaddr);
3416 3421
3417 RTL_W8(Config3, RTL_R8(Config3) & ~Beacon_en); 3422 RTL_W8(Config3, RTL_R8(Config3) & ~Beacon_en);
3418 3423
@@ -3423,7 +3428,7 @@ static void rtl_hw_start_8168cp_2(void __iomem *ioaddr, struct pci_dev *pdev)
3423 3428
3424static void rtl_hw_start_8168cp_3(void __iomem *ioaddr, struct pci_dev *pdev) 3429static void rtl_hw_start_8168cp_3(void __iomem *ioaddr, struct pci_dev *pdev)
3425{ 3430{
3426 rtl_csi_access_enable(ioaddr); 3431 rtl_csi_access_enable_2(ioaddr);
3427 3432
3428 RTL_W8(Config3, RTL_R8(Config3) & ~Beacon_en); 3433 RTL_W8(Config3, RTL_R8(Config3) & ~Beacon_en);
3429 3434
@@ -3445,7 +3450,7 @@ static void rtl_hw_start_8168c_1(void __iomem *ioaddr, struct pci_dev *pdev)
3445 { 0x06, 0x0080, 0x0000 } 3450 { 0x06, 0x0080, 0x0000 }
3446 }; 3451 };
3447 3452
3448 rtl_csi_access_enable(ioaddr); 3453 rtl_csi_access_enable_2(ioaddr);
3449 3454
3450 RTL_W8(DBG_REG, 0x06 | FIX_NAK_1 | FIX_NAK_2); 3455 RTL_W8(DBG_REG, 0x06 | FIX_NAK_1 | FIX_NAK_2);
3451 3456
@@ -3461,7 +3466,7 @@ static void rtl_hw_start_8168c_2(void __iomem *ioaddr, struct pci_dev *pdev)
3461 { 0x03, 0x0400, 0x0220 } 3466 { 0x03, 0x0400, 0x0220 }
3462 }; 3467 };
3463 3468
3464 rtl_csi_access_enable(ioaddr); 3469 rtl_csi_access_enable_2(ioaddr);
3465 3470
3466 rtl_ephy_init(ioaddr, e_info_8168c_2, ARRAY_SIZE(e_info_8168c_2)); 3471 rtl_ephy_init(ioaddr, e_info_8168c_2, ARRAY_SIZE(e_info_8168c_2));
3467 3472
@@ -3475,14 +3480,14 @@ static void rtl_hw_start_8168c_3(void __iomem *ioaddr, struct pci_dev *pdev)
3475 3480
3476static void rtl_hw_start_8168c_4(void __iomem *ioaddr, struct pci_dev *pdev) 3481static void rtl_hw_start_8168c_4(void __iomem *ioaddr, struct pci_dev *pdev)
3477{ 3482{
3478 rtl_csi_access_enable(ioaddr); 3483 rtl_csi_access_enable_2(ioaddr);
3479 3484
3480 __rtl_hw_start_8168cp(ioaddr, pdev); 3485 __rtl_hw_start_8168cp(ioaddr, pdev);
3481} 3486}
3482 3487
3483static void rtl_hw_start_8168d(void __iomem *ioaddr, struct pci_dev *pdev) 3488static void rtl_hw_start_8168d(void __iomem *ioaddr, struct pci_dev *pdev)
3484{ 3489{
3485 rtl_csi_access_enable(ioaddr); 3490 rtl_csi_access_enable_2(ioaddr);
3486 3491
3487 rtl_disable_clock_request(pdev); 3492 rtl_disable_clock_request(pdev);
3488 3493
@@ -3611,7 +3616,7 @@ static void rtl_hw_start_8102e_1(void __iomem *ioaddr, struct pci_dev *pdev)
3611 }; 3616 };
3612 u8 cfg1; 3617 u8 cfg1;
3613 3618
3614 rtl_csi_access_enable(ioaddr); 3619 rtl_csi_access_enable_2(ioaddr);
3615 3620
3616 RTL_W8(DBG_REG, FIX_NAK_1); 3621 RTL_W8(DBG_REG, FIX_NAK_1);
3617 3622
@@ -3632,7 +3637,7 @@ static void rtl_hw_start_8102e_1(void __iomem *ioaddr, struct pci_dev *pdev)
3632 3637
3633static void rtl_hw_start_8102e_2(void __iomem *ioaddr, struct pci_dev *pdev) 3638static void rtl_hw_start_8102e_2(void __iomem *ioaddr, struct pci_dev *pdev)
3634{ 3639{
3635 rtl_csi_access_enable(ioaddr); 3640 rtl_csi_access_enable_2(ioaddr);
3636 3641
3637 rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT); 3642 rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT);
3638 3643