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authorFrancois Romieu <romieu@fr.zoreil.com>2008-05-30 10:11:48 -0400
committerFrancois Romieu <romieu@fr.zoreil.com>2008-10-10 17:08:25 -0400
commit236b8082aa239e91c3cd9cb466d0527a735e54db (patch)
treec2ecaeea9942f7bdf8c59cff50962cce1caf0dcd /drivers/net/r8169.c
parentf50d4275422415cfb2a5b94bad3b2b229d0ec1aa (diff)
r8169: new phy init parameters for the 8168b
The new parameters are synced with Realtek's driver version 8.006.00. Signed-off-by: Francois Romieu <romieu@fr.zoreil.com> Cc: Edward Hsu <edward_hsu@realtek.com.tw>
Diffstat (limited to 'drivers/net/r8169.c')
-rw-r--r--drivers/net/r8169.c33
1 files changed, 33 insertions, 0 deletions
diff --git a/drivers/net/r8169.c b/drivers/net/r8169.c
index 62e111591567..8086bacabcf3 100644
--- a/drivers/net/r8169.c
+++ b/drivers/net/r8169.c
@@ -1350,6 +1350,30 @@ static void rtl8169sb_hw_phy_config(void __iomem *ioaddr)
1350 rtl_phy_write(ioaddr, phy_reg_init, ARRAY_SIZE(phy_reg_init)); 1350 rtl_phy_write(ioaddr, phy_reg_init, ARRAY_SIZE(phy_reg_init));
1351} 1351}
1352 1352
1353static void rtl8168bb_hw_phy_config(void __iomem *ioaddr)
1354{
1355 struct phy_reg phy_reg_init[] = {
1356 { 0x10, 0xf41b },
1357 { 0x1f, 0x0000 }
1358 };
1359
1360 mdio_write(ioaddr, 0x1f, 0x0001);
1361 mdio_patch(ioaddr, 0x16, 1 << 0);
1362
1363 rtl_phy_write(ioaddr, phy_reg_init, ARRAY_SIZE(phy_reg_init));
1364}
1365
1366static void rtl8168bef_hw_phy_config(void __iomem *ioaddr)
1367{
1368 struct phy_reg phy_reg_init[] = {
1369 { 0x1f, 0x0001 },
1370 { 0x10, 0xf41b },
1371 { 0x1f, 0x0000 }
1372 };
1373
1374 rtl_phy_write(ioaddr, phy_reg_init, ARRAY_SIZE(phy_reg_init));
1375}
1376
1353static void rtl8168cp_hw_phy_config(void __iomem *ioaddr) 1377static void rtl8168cp_hw_phy_config(void __iomem *ioaddr)
1354{ 1378{
1355 struct phy_reg phy_reg_init[] = { 1379 struct phy_reg phy_reg_init[] = {
@@ -1458,6 +1482,15 @@ static void rtl_hw_phy_config(struct net_device *dev)
1458 case RTL_GIGA_MAC_VER_09: 1482 case RTL_GIGA_MAC_VER_09:
1459 rtl8102e_hw_phy_config(ioaddr); 1483 rtl8102e_hw_phy_config(ioaddr);
1460 break; 1484 break;
1485 case RTL_GIGA_MAC_VER_11:
1486 rtl8168bb_hw_phy_config(ioaddr);
1487 break;
1488 case RTL_GIGA_MAC_VER_12:
1489 rtl8168bef_hw_phy_config(ioaddr);
1490 break;
1491 case RTL_GIGA_MAC_VER_17:
1492 rtl8168bef_hw_phy_config(ioaddr);
1493 break;
1461 case RTL_GIGA_MAC_VER_18: 1494 case RTL_GIGA_MAC_VER_18:
1462 rtl8168cp_hw_phy_config(ioaddr); 1495 rtl8168cp_hw_phy_config(ioaddr);
1463 break; 1496 break;