diff options
author | Francois Romieu <romieu@fr.zoreil.com> | 2008-07-20 12:53:20 -0400 |
---|---|---|
committer | Francois Romieu <romieu@fr.zoreil.com> | 2008-10-10 17:09:04 -0400 |
commit | 7f3e3d3a69da262016db6eec803881603c61ddf6 (patch) | |
tree | 16dbf354bd763500bb8b73caba724ba30e7c8279 /drivers/net/r8169.c | |
parent | ef808d502cc3b18b2d823bbe8c03c0b8ea0df1b5 (diff) |
r8169: support additional 8168cp chipset
Taken from Realtek's 8.007.00 r8168 driver.
Signed-off-by: Francois Romieu <romieu@fr.zoreil.com>
Fixed-by: Ivan Vecera <ivecera@redhat.com>
Cc: Edward Hsu <edward_hsu@realtek.com.tw>
Diffstat (limited to 'drivers/net/r8169.c')
-rw-r--r-- | drivers/net/r8169.c | 30 |
1 files changed, 27 insertions, 3 deletions
diff --git a/drivers/net/r8169.c b/drivers/net/r8169.c index 4edc6b0d2b9a..96b9b0bb4705 100644 --- a/drivers/net/r8169.c +++ b/drivers/net/r8169.c | |||
@@ -112,7 +112,8 @@ enum mac_version { | |||
112 | RTL_GIGA_MAC_VER_20 = 0x14, // 8168C | 112 | RTL_GIGA_MAC_VER_20 = 0x14, // 8168C |
113 | RTL_GIGA_MAC_VER_21 = 0x15, // 8168C | 113 | RTL_GIGA_MAC_VER_21 = 0x15, // 8168C |
114 | RTL_GIGA_MAC_VER_22 = 0x16, // 8168C | 114 | RTL_GIGA_MAC_VER_22 = 0x16, // 8168C |
115 | RTL_GIGA_MAC_VER_23 = 0x17 // 8168CP | 115 | RTL_GIGA_MAC_VER_23 = 0x17, // 8168CP |
116 | RTL_GIGA_MAC_VER_24 = 0x18 // 8168CP | ||
116 | }; | 117 | }; |
117 | 118 | ||
118 | #define _R(NAME,MAC,MASK) \ | 119 | #define _R(NAME,MAC,MASK) \ |
@@ -145,7 +146,8 @@ static const struct { | |||
145 | _R("RTL8168c/8111c", RTL_GIGA_MAC_VER_20, 0xff7e1880), // PCI-E | 146 | _R("RTL8168c/8111c", RTL_GIGA_MAC_VER_20, 0xff7e1880), // PCI-E |
146 | _R("RTL8168c/8111c", RTL_GIGA_MAC_VER_21, 0xff7e1880), // PCI-E | 147 | _R("RTL8168c/8111c", RTL_GIGA_MAC_VER_21, 0xff7e1880), // PCI-E |
147 | _R("RTL8168c/8111c", RTL_GIGA_MAC_VER_22, 0xff7e1880), // PCI-E | 148 | _R("RTL8168c/8111c", RTL_GIGA_MAC_VER_22, 0xff7e1880), // PCI-E |
148 | _R("RTL8168cp/8111cp", RTL_GIGA_MAC_VER_23, 0xff7e1880) // PCI-E | 149 | _R("RTL8168cp/8111cp", RTL_GIGA_MAC_VER_23, 0xff7e1880), // PCI-E |
150 | _R("RTL8168cp/8111cp", RTL_GIGA_MAC_VER_24, 0xff7e1880) // PCI-E | ||
149 | }; | 151 | }; |
150 | #undef _R | 152 | #undef _R |
151 | 153 | ||
@@ -1223,9 +1225,10 @@ static void rtl8169_get_mac_version(struct rtl8169_private *tp, | |||
1223 | int mac_version; | 1225 | int mac_version; |
1224 | } mac_info[] = { | 1226 | } mac_info[] = { |
1225 | /* 8168C family. */ | 1227 | /* 8168C family. */ |
1228 | { 0x7cf00000, 0x3ca00000, RTL_GIGA_MAC_VER_24 }, | ||
1226 | { 0x7cf00000, 0x3c900000, RTL_GIGA_MAC_VER_23 }, | 1229 | { 0x7cf00000, 0x3c900000, RTL_GIGA_MAC_VER_23 }, |
1227 | { 0x7cf00000, 0x3c800000, RTL_GIGA_MAC_VER_18 }, | 1230 | { 0x7cf00000, 0x3c800000, RTL_GIGA_MAC_VER_18 }, |
1228 | { 0x7c800000, 0x3c800000, RTL_GIGA_MAC_VER_23 }, | 1231 | { 0x7c800000, 0x3c800000, RTL_GIGA_MAC_VER_24 }, |
1229 | { 0x7cf00000, 0x3c000000, RTL_GIGA_MAC_VER_19 }, | 1232 | { 0x7cf00000, 0x3c000000, RTL_GIGA_MAC_VER_19 }, |
1230 | { 0x7cf00000, 0x3c200000, RTL_GIGA_MAC_VER_20 }, | 1233 | { 0x7cf00000, 0x3c200000, RTL_GIGA_MAC_VER_20 }, |
1231 | { 0x7cf00000, 0x3c300000, RTL_GIGA_MAC_VER_21 }, | 1234 | { 0x7cf00000, 0x3c300000, RTL_GIGA_MAC_VER_21 }, |
@@ -1559,6 +1562,7 @@ static void rtl_hw_phy_config(struct net_device *dev) | |||
1559 | rtl8168c_4_hw_phy_config(ioaddr); | 1562 | rtl8168c_4_hw_phy_config(ioaddr); |
1560 | break; | 1563 | break; |
1561 | case RTL_GIGA_MAC_VER_23: | 1564 | case RTL_GIGA_MAC_VER_23: |
1565 | case RTL_GIGA_MAC_VER_24: | ||
1562 | rtl8168cp_2_hw_phy_config(ioaddr); | 1566 | rtl8168cp_2_hw_phy_config(ioaddr); |
1563 | break; | 1567 | break; |
1564 | 1568 | ||
@@ -2532,6 +2536,22 @@ static void rtl_hw_start_8168cp_2(void __iomem *ioaddr, struct pci_dev *pdev) | |||
2532 | RTL_W16(CPlusCmd, RTL_R16(CPlusCmd) & ~R8168_CPCMD_QUIRK_MASK); | 2536 | RTL_W16(CPlusCmd, RTL_R16(CPlusCmd) & ~R8168_CPCMD_QUIRK_MASK); |
2533 | } | 2537 | } |
2534 | 2538 | ||
2539 | static void rtl_hw_start_8168cp_3(void __iomem *ioaddr, struct pci_dev *pdev) | ||
2540 | { | ||
2541 | rtl_csi_access_enable(ioaddr); | ||
2542 | |||
2543 | RTL_W8(Config3, RTL_R8(Config3) & ~Beacon_en); | ||
2544 | |||
2545 | /* Magic. */ | ||
2546 | RTL_W8(DBG_REG, 0x20); | ||
2547 | |||
2548 | RTL_W8(EarlyTxThres, EarlyTxThld); | ||
2549 | |||
2550 | rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT); | ||
2551 | |||
2552 | RTL_W16(CPlusCmd, RTL_R16(CPlusCmd) & ~R8168_CPCMD_QUIRK_MASK); | ||
2553 | } | ||
2554 | |||
2535 | static void rtl_hw_start_8168c_1(void __iomem *ioaddr, struct pci_dev *pdev) | 2555 | static void rtl_hw_start_8168c_1(void __iomem *ioaddr, struct pci_dev *pdev) |
2536 | { | 2556 | { |
2537 | static struct ephy_info e_info_8168c_1[] = { | 2557 | static struct ephy_info e_info_8168c_1[] = { |
@@ -2642,6 +2662,10 @@ static void rtl_hw_start_8168(struct net_device *dev) | |||
2642 | rtl_hw_start_8168cp_2(ioaddr, pdev); | 2662 | rtl_hw_start_8168cp_2(ioaddr, pdev); |
2643 | break; | 2663 | break; |
2644 | 2664 | ||
2665 | case RTL_GIGA_MAC_VER_24: | ||
2666 | rtl_hw_start_8168cp_3(ioaddr, pdev); | ||
2667 | break; | ||
2668 | |||
2645 | default: | 2669 | default: |
2646 | printk(KERN_ERR PFX "%s: unknown chipset (mac_version = %d).\n", | 2670 | printk(KERN_ERR PFX "%s: unknown chipset (mac_version = %d).\n", |
2647 | dev->name, tp->mac_version); | 2671 | dev->name, tp->mac_version); |