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authorRon Mercer <ron.mercer@qlogic.com>2009-01-04 20:08:29 -0500
committerDavid S. Miller <davem@davemloft.net>2009-01-04 20:08:29 -0500
commit939678f81a55c839ae58c9cc3d4ec6d0f60e7dc7 (patch)
treefde4257e76a04d1978624a2da35c46dcdf2ecb9f /drivers/net/qlge/qlge_main.c
parent459caf5a99cd066598192a86f8f63d73f0b423a6 (diff)
qlge: bugfix: Fix register access error checking.
Some indexed registers do not have error bits. In these cases a value of zero should be used for error checking. Signed-off-by: Ron Mercer <ron.mercer@qlogic.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/qlge/qlge_main.c')
-rw-r--r--drivers/net/qlge/qlge_main.c24
1 files changed, 12 insertions, 12 deletions
diff --git a/drivers/net/qlge/qlge_main.c b/drivers/net/qlge/qlge_main.c
index ffa210074424..837be72efb02 100644
--- a/drivers/net/qlge/qlge_main.c
+++ b/drivers/net/qlge/qlge_main.c
@@ -257,7 +257,7 @@ int ql_get_mac_addr_reg(struct ql_adapter *qdev, u32 type, u16 index,
257 { 257 {
258 status = 258 status =
259 ql_wait_reg_rdy(qdev, 259 ql_wait_reg_rdy(qdev,
260 MAC_ADDR_IDX, MAC_ADDR_MW, MAC_ADDR_E); 260 MAC_ADDR_IDX, MAC_ADDR_MW, 0);
261 if (status) 261 if (status)
262 goto exit; 262 goto exit;
263 ql_write32(qdev, MAC_ADDR_IDX, (offset++) | /* offset */ 263 ql_write32(qdev, MAC_ADDR_IDX, (offset++) | /* offset */
@@ -265,13 +265,13 @@ int ql_get_mac_addr_reg(struct ql_adapter *qdev, u32 type, u16 index,
265 MAC_ADDR_ADR | MAC_ADDR_RS | type); /* type */ 265 MAC_ADDR_ADR | MAC_ADDR_RS | type); /* type */
266 status = 266 status =
267 ql_wait_reg_rdy(qdev, 267 ql_wait_reg_rdy(qdev,
268 MAC_ADDR_IDX, MAC_ADDR_MR, MAC_ADDR_E); 268 MAC_ADDR_IDX, MAC_ADDR_MR, 0);
269 if (status) 269 if (status)
270 goto exit; 270 goto exit;
271 *value++ = ql_read32(qdev, MAC_ADDR_DATA); 271 *value++ = ql_read32(qdev, MAC_ADDR_DATA);
272 status = 272 status =
273 ql_wait_reg_rdy(qdev, 273 ql_wait_reg_rdy(qdev,
274 MAC_ADDR_IDX, MAC_ADDR_MW, MAC_ADDR_E); 274 MAC_ADDR_IDX, MAC_ADDR_MW, 0);
275 if (status) 275 if (status)
276 goto exit; 276 goto exit;
277 ql_write32(qdev, MAC_ADDR_IDX, (offset++) | /* offset */ 277 ql_write32(qdev, MAC_ADDR_IDX, (offset++) | /* offset */
@@ -279,14 +279,14 @@ int ql_get_mac_addr_reg(struct ql_adapter *qdev, u32 type, u16 index,
279 MAC_ADDR_ADR | MAC_ADDR_RS | type); /* type */ 279 MAC_ADDR_ADR | MAC_ADDR_RS | type); /* type */
280 status = 280 status =
281 ql_wait_reg_rdy(qdev, 281 ql_wait_reg_rdy(qdev,
282 MAC_ADDR_IDX, MAC_ADDR_MR, MAC_ADDR_E); 282 MAC_ADDR_IDX, MAC_ADDR_MR, 0);
283 if (status) 283 if (status)
284 goto exit; 284 goto exit;
285 *value++ = ql_read32(qdev, MAC_ADDR_DATA); 285 *value++ = ql_read32(qdev, MAC_ADDR_DATA);
286 if (type == MAC_ADDR_TYPE_CAM_MAC) { 286 if (type == MAC_ADDR_TYPE_CAM_MAC) {
287 status = 287 status =
288 ql_wait_reg_rdy(qdev, 288 ql_wait_reg_rdy(qdev,
289 MAC_ADDR_IDX, MAC_ADDR_MW, MAC_ADDR_E); 289 MAC_ADDR_IDX, MAC_ADDR_MW, 0);
290 if (status) 290 if (status)
291 goto exit; 291 goto exit;
292 ql_write32(qdev, MAC_ADDR_IDX, (offset++) | /* offset */ 292 ql_write32(qdev, MAC_ADDR_IDX, (offset++) | /* offset */
@@ -294,7 +294,7 @@ int ql_get_mac_addr_reg(struct ql_adapter *qdev, u32 type, u16 index,
294 MAC_ADDR_ADR | MAC_ADDR_RS | type); /* type */ 294 MAC_ADDR_ADR | MAC_ADDR_RS | type); /* type */
295 status = 295 status =
296 ql_wait_reg_rdy(qdev, MAC_ADDR_IDX, 296 ql_wait_reg_rdy(qdev, MAC_ADDR_IDX,
297 MAC_ADDR_MR, MAC_ADDR_E); 297 MAC_ADDR_MR, 0);
298 if (status) 298 if (status)
299 goto exit; 299 goto exit;
300 *value++ = ql_read32(qdev, MAC_ADDR_DATA); 300 *value++ = ql_read32(qdev, MAC_ADDR_DATA);
@@ -344,7 +344,7 @@ static int ql_set_mac_addr_reg(struct ql_adapter *qdev, u8 *addr, u32 type,
344 344
345 status = 345 status =
346 ql_wait_reg_rdy(qdev, 346 ql_wait_reg_rdy(qdev,
347 MAC_ADDR_IDX, MAC_ADDR_MW, MAC_ADDR_E); 347 MAC_ADDR_IDX, MAC_ADDR_MW, 0);
348 if (status) 348 if (status)
349 goto exit; 349 goto exit;
350 ql_write32(qdev, MAC_ADDR_IDX, (offset++) | /* offset */ 350 ql_write32(qdev, MAC_ADDR_IDX, (offset++) | /* offset */
@@ -353,7 +353,7 @@ static int ql_set_mac_addr_reg(struct ql_adapter *qdev, u8 *addr, u32 type,
353 ql_write32(qdev, MAC_ADDR_DATA, lower); 353 ql_write32(qdev, MAC_ADDR_DATA, lower);
354 status = 354 status =
355 ql_wait_reg_rdy(qdev, 355 ql_wait_reg_rdy(qdev,
356 MAC_ADDR_IDX, MAC_ADDR_MW, MAC_ADDR_E); 356 MAC_ADDR_IDX, MAC_ADDR_MW, 0);
357 if (status) 357 if (status)
358 goto exit; 358 goto exit;
359 ql_write32(qdev, MAC_ADDR_IDX, (offset++) | /* offset */ 359 ql_write32(qdev, MAC_ADDR_IDX, (offset++) | /* offset */
@@ -362,7 +362,7 @@ static int ql_set_mac_addr_reg(struct ql_adapter *qdev, u8 *addr, u32 type,
362 ql_write32(qdev, MAC_ADDR_DATA, upper); 362 ql_write32(qdev, MAC_ADDR_DATA, upper);
363 status = 363 status =
364 ql_wait_reg_rdy(qdev, 364 ql_wait_reg_rdy(qdev,
365 MAC_ADDR_IDX, MAC_ADDR_MW, MAC_ADDR_E); 365 MAC_ADDR_IDX, MAC_ADDR_MW, 0);
366 if (status) 366 if (status)
367 goto exit; 367 goto exit;
368 ql_write32(qdev, MAC_ADDR_IDX, (offset) | /* offset */ 368 ql_write32(qdev, MAC_ADDR_IDX, (offset) | /* offset */
@@ -400,7 +400,7 @@ static int ql_set_mac_addr_reg(struct ql_adapter *qdev, u8 *addr, u32 type,
400 400
401 status = 401 status =
402 ql_wait_reg_rdy(qdev, 402 ql_wait_reg_rdy(qdev,
403 MAC_ADDR_IDX, MAC_ADDR_MW, MAC_ADDR_E); 403 MAC_ADDR_IDX, MAC_ADDR_MW, 0);
404 if (status) 404 if (status)
405 goto exit; 405 goto exit;
406 ql_write32(qdev, MAC_ADDR_IDX, offset | /* offset */ 406 ql_write32(qdev, MAC_ADDR_IDX, offset | /* offset */
@@ -431,13 +431,13 @@ int ql_get_routing_reg(struct ql_adapter *qdev, u32 index, u32 *value)
431 if (status) 431 if (status)
432 goto exit; 432 goto exit;
433 433
434 status = ql_wait_reg_rdy(qdev, RT_IDX, RT_IDX_MW, RT_IDX_E); 434 status = ql_wait_reg_rdy(qdev, RT_IDX, RT_IDX_MW, 0);
435 if (status) 435 if (status)
436 goto exit; 436 goto exit;
437 437
438 ql_write32(qdev, RT_IDX, 438 ql_write32(qdev, RT_IDX,
439 RT_IDX_TYPE_NICQ | RT_IDX_RS | (index << RT_IDX_IDX_SHIFT)); 439 RT_IDX_TYPE_NICQ | RT_IDX_RS | (index << RT_IDX_IDX_SHIFT));
440 status = ql_wait_reg_rdy(qdev, RT_IDX, RT_IDX_MR, RT_IDX_E); 440 status = ql_wait_reg_rdy(qdev, RT_IDX, RT_IDX_MR, 0);
441 if (status) 441 if (status)
442 goto exit; 442 goto exit;
443 *value = ql_read32(qdev, RT_DATA); 443 *value = ql_read32(qdev, RT_DATA);
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-26 17:19:50 -0500