diff options
author | Ron Mercer <ron.mercer@qlogic.com> | 2009-01-09 06:31:49 -0500 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2009-01-11 03:07:34 -0500 |
commit | ba7cd3ba97f81564be3e4a4ee8ee17726aa853d7 (patch) | |
tree | 30640bced4bf5bf4642e4cfe6a9146a0173bde5d /drivers/net/qlge/qlge.h | |
parent | f1405d32e392f2f5f80f4687fe186305de300bf6 (diff) |
qlge: Get rid of volatile usage for shadow register.
Putting back ql_read_sh_reg() function and using rmb() instead of
volatile.
Signed-off-by: Ron Mercer <ron.mercer@qlogic.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/qlge/qlge.h')
-rw-r--r-- | drivers/net/qlge/qlge.h | 22 |
1 files changed, 20 insertions, 2 deletions
diff --git a/drivers/net/qlge/qlge.h b/drivers/net/qlge/qlge.h index 459663a4023d..4cb3647bb1b0 100644 --- a/drivers/net/qlge/qlge.h +++ b/drivers/net/qlge/qlge.h | |||
@@ -1145,7 +1145,7 @@ struct tx_ring { | |||
1145 | struct wqicb wqicb; /* structure used to inform chip of new queue */ | 1145 | struct wqicb wqicb; /* structure used to inform chip of new queue */ |
1146 | void *wq_base; /* pci_alloc:virtual addr for tx */ | 1146 | void *wq_base; /* pci_alloc:virtual addr for tx */ |
1147 | dma_addr_t wq_base_dma; /* pci_alloc:dma addr for tx */ | 1147 | dma_addr_t wq_base_dma; /* pci_alloc:dma addr for tx */ |
1148 | u32 *cnsmr_idx_sh_reg; /* shadow copy of consumer idx */ | 1148 | __le32 *cnsmr_idx_sh_reg; /* shadow copy of consumer idx */ |
1149 | dma_addr_t cnsmr_idx_sh_reg_dma; /* dma-shadow copy of consumer */ | 1149 | dma_addr_t cnsmr_idx_sh_reg_dma; /* dma-shadow copy of consumer */ |
1150 | u32 wq_size; /* size in bytes of queue area */ | 1150 | u32 wq_size; /* size in bytes of queue area */ |
1151 | u32 wq_len; /* number of entries in queue */ | 1151 | u32 wq_len; /* number of entries in queue */ |
@@ -1181,7 +1181,7 @@ struct rx_ring { | |||
1181 | u32 cq_size; | 1181 | u32 cq_size; |
1182 | u32 cq_len; | 1182 | u32 cq_len; |
1183 | u16 cq_id; | 1183 | u16 cq_id; |
1184 | volatile __le32 *prod_idx_sh_reg; /* Shadowed producer register. */ | 1184 | __le32 *prod_idx_sh_reg; /* Shadowed producer register. */ |
1185 | dma_addr_t prod_idx_sh_reg_dma; | 1185 | dma_addr_t prod_idx_sh_reg_dma; |
1186 | void __iomem *cnsmr_idx_db_reg; /* PCI doorbell mem area + 0 */ | 1186 | void __iomem *cnsmr_idx_db_reg; /* PCI doorbell mem area + 0 */ |
1187 | u32 cnsmr_idx; /* current sw idx */ | 1187 | u32 cnsmr_idx; /* current sw idx */ |
@@ -1459,6 +1459,24 @@ static inline void ql_write_db_reg(u32 val, void __iomem *addr) | |||
1459 | mmiowb(); | 1459 | mmiowb(); |
1460 | } | 1460 | } |
1461 | 1461 | ||
1462 | /* | ||
1463 | * Shadow Registers: | ||
1464 | * Outbound queues have a consumer index that is maintained by the chip. | ||
1465 | * Inbound queues have a producer index that is maintained by the chip. | ||
1466 | * For lower overhead, these registers are "shadowed" to host memory | ||
1467 | * which allows the device driver to track the queue progress without | ||
1468 | * PCI reads. When an entry is placed on an inbound queue, the chip will | ||
1469 | * update the relevant index register and then copy the value to the | ||
1470 | * shadow register in host memory. | ||
1471 | */ | ||
1472 | static inline u32 ql_read_sh_reg(__le32 *addr) | ||
1473 | { | ||
1474 | u32 reg; | ||
1475 | reg = le32_to_cpu(*addr); | ||
1476 | rmb(); | ||
1477 | return reg; | ||
1478 | } | ||
1479 | |||
1462 | extern char qlge_driver_name[]; | 1480 | extern char qlge_driver_name[]; |
1463 | extern const char qlge_driver_version[]; | 1481 | extern const char qlge_driver_version[]; |
1464 | extern const struct ethtool_ops qlge_ethtool_ops; | 1482 | extern const struct ethtool_ops qlge_ethtool_ops; |