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authorRon Mercer <ron.mercer@qlogic.com>2009-10-18 23:32:19 -0400
committerDavid S. Miller <davem@davemloft.net>2009-10-20 02:22:49 -0400
commit7c734359d3504c869132166d159c7f0649f0ab34 (patch)
tree0293966a9c0be905d6e0f1a063fc74d8f1d627f3 /drivers/net/qlge/qlge.h
parenteb2ff967a587a4a784fd2390f38e324a5bec01ec (diff)
qlge: Size RX buffers based on MTU.
Change RX large buffer size based on MTU. If pages are larger than the MTU the page is divided up into multiple chunks and passed to the hardware. When pages are smaller than MTU each RX buffer can contain be comprised of up to 2 pages. Signed-off-by: Ron Mercer <ron.mercer@qlogic.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/qlge/qlge.h')
-rw-r--r--drivers/net/qlge/qlge.h15
1 files changed, 13 insertions, 2 deletions
diff --git a/drivers/net/qlge/qlge.h b/drivers/net/qlge/qlge.h
index 421471790601..bc7a2e43c62e 100644
--- a/drivers/net/qlge/qlge.h
+++ b/drivers/net/qlge/qlge.h
@@ -56,7 +56,8 @@
56 MAX_DB_PAGES_PER_BQ(NUM_LARGE_BUFFERS) * sizeof(u64)) 56 MAX_DB_PAGES_PER_BQ(NUM_LARGE_BUFFERS) * sizeof(u64))
57#define SMALL_BUFFER_SIZE 512 57#define SMALL_BUFFER_SIZE 512
58#define SMALL_BUF_MAP_SIZE (SMALL_BUFFER_SIZE / 2) 58#define SMALL_BUF_MAP_SIZE (SMALL_BUFFER_SIZE / 2)
59#define LARGE_BUFFER_SIZE PAGE_SIZE 59#define LARGE_BUFFER_MAX_SIZE 8192
60#define LARGE_BUFFER_MIN_SIZE 2048
60#define MAX_SPLIT_SIZE 1023 61#define MAX_SPLIT_SIZE 1023
61#define QLGE_SB_PAD 32 62#define QLGE_SB_PAD 32
62 63
@@ -1201,9 +1202,17 @@ struct tx_ring_desc {
1201 struct tx_ring_desc *next; 1202 struct tx_ring_desc *next;
1202}; 1203};
1203 1204
1205struct page_chunk {
1206 struct page *page; /* master page */
1207 char *va; /* virt addr for this chunk */
1208 u64 map; /* mapping for master */
1209 unsigned int offset; /* offset for this chunk */
1210 unsigned int last_flag; /* flag set for last chunk in page */
1211};
1212
1204struct bq_desc { 1213struct bq_desc {
1205 union { 1214 union {
1206 struct page *lbq_page; 1215 struct page_chunk pg_chunk;
1207 struct sk_buff *skb; 1216 struct sk_buff *skb;
1208 } p; 1217 } p;
1209 __le64 *addr; 1218 __le64 *addr;
@@ -1272,6 +1281,7 @@ struct rx_ring {
1272 dma_addr_t lbq_base_dma; 1281 dma_addr_t lbq_base_dma;
1273 void *lbq_base_indirect; 1282 void *lbq_base_indirect;
1274 dma_addr_t lbq_base_indirect_dma; 1283 dma_addr_t lbq_base_indirect_dma;
1284 struct page_chunk pg_chunk; /* current page for chunks */
1275 struct bq_desc *lbq; /* array of control blocks */ 1285 struct bq_desc *lbq; /* array of control blocks */
1276 void __iomem *lbq_prod_idx_db_reg; /* PCI doorbell mem area + 0x18 */ 1286 void __iomem *lbq_prod_idx_db_reg; /* PCI doorbell mem area + 0x18 */
1277 u32 lbq_prod_idx; /* current sw prod idx */ 1287 u32 lbq_prod_idx; /* current sw prod idx */
@@ -1526,6 +1536,7 @@ struct ql_adapter {
1526 1536
1527 struct rx_ring rx_ring[MAX_RX_RINGS]; 1537 struct rx_ring rx_ring[MAX_RX_RINGS];
1528 struct tx_ring tx_ring[MAX_TX_RINGS]; 1538 struct tx_ring tx_ring[MAX_TX_RINGS];
1539 unsigned int lbq_buf_order;
1529 1540
1530 int rx_csum; 1541 int rx_csum;
1531 u32 default_rx_queue; 1542 u32 default_rx_queue;