qlcnic: seperate interrupt for TX

Earlier all poll routine can process rx and tx, But now
one poll routine to process rx + tx and other for rx only.
Last msix vector will be used for separate tx interrupt.

o This is supported from fw version 4.4.2.
o Bump version 5.0.5

Signed-off-by: Sony Chacko <schacko@qlogic.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

1 files changed, 6 insertions, 1 deletions

diff --git a/drivers/net/qlcnic/qlcnic_ctx.c b/drivers/net/qlcnic/qlcnic_ctx.c
index 90ed6fbaee34..7c96c8e06c3f 100644
--- a/drivers/net/qlcnic/qlcnic_ctx.c
+++ b/drivers/net/qlcnic/qlcnic_ctx.c
@@ -152,9 +152,14 @@ qlcnic_fw_cmd_create_rx_ctx(struct qlcnic_adapter *adapter)
 
         prq->host_rsp_dma_addr = cpu_to_le64(cardrsp_phys_addr);
 
-        cap = (QLCNIC_CAP0_LEGACY_CONTEXT | QLCNIC_CAP0_LEGACY_MN);
+        cap = (QLCNIC_CAP0_LEGACY_CONTEXT | QLCNIC_CAP0_LEGACY_MN
+                                                | QLCNIC_CAP0_VALIDOFF);
         cap |= (QLCNIC_CAP0_JUMBO_CONTIGUOUS | QLCNIC_CAP0_LRO_CONTIGUOUS);
 
+        prq->valid_field_offset = offsetof(struct qlcnic_hostrq_rx_ctx,
+                                                         msix_handler);
+        prq->txrx_sds_binding = nsds_rings - 1;
+
         prq->capabilities[0] = cpu_to_le32(cap);
         prq->host_int_crb_mode =
                 cpu_to_le32(QLCNIC_HOST_INT_CRB_MODE_SHARED);