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authorRon Mercer <ron.mercer@qlogic.com>2007-03-26 15:43:52 -0400
committerJeff Garzik <jeff@garzik.org>2007-04-28 11:01:02 -0400
commit3efedf2e5b814f3edd99e4f4ca47a604871ebe0e (patch)
tree2cc59d55ca90b1ca4bcff89e227529584a6b35fd /drivers/net/qla3xxx.h
parentec8263839aa8bc6eeee608a045e8f51738d7e436 (diff)
qla3xxx: Adding support for the Agere PHY (ET1011C)
This PHY support patch was written by Benjamin Li. Signed-off-by: Benjamin Li <benjamin.li@qlogic.com> Signed-off-by: Ron Mercer <ron.mercer@qlogic.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
Diffstat (limited to 'drivers/net/qla3xxx.h')
-rwxr-xr-xdrivers/net/qla3xxx.h33
1 files changed, 31 insertions, 2 deletions
diff --git a/drivers/net/qla3xxx.h b/drivers/net/qla3xxx.h
index 0203f88f0544..4a832c46c274 100755
--- a/drivers/net/qla3xxx.h
+++ b/drivers/net/qla3xxx.h
@@ -293,6 +293,16 @@ struct net_rsp_iocb {
293 293
294#define MII_SCAN_REGISTER 0x00000001 294#define MII_SCAN_REGISTER 0x00000001
295 295
296#define PHY_ID_0_REG 2
297#define PHY_ID_1_REG 3
298
299#define PHY_OUI_1_MASK 0xfc00
300#define PHY_MODEL_MASK 0x03f0
301
302/* Address for the Agere Phy */
303#define MII_AGERE_ADDR_1 0x00001000
304#define MII_AGERE_ADDR_2 0x00001100
305
296/* 32-bit ispControlStatus */ 306/* 32-bit ispControlStatus */
297enum { 307enum {
298 ISP_CONTROL_NP_MASK = 0x0003, 308 ISP_CONTROL_NP_MASK = 0x0003,
@@ -789,6 +799,7 @@ enum {
789 PHY_CTRL_LOOPBACK = 0x4000, 799 PHY_CTRL_LOOPBACK = 0x4000,
790 800
791 PETBI_CONTROL_REG = 0x00, 801 PETBI_CONTROL_REG = 0x00,
802 PETBI_CTRL_ALL_PARAMS = 0x7140,
792 PETBI_CTRL_SOFT_RESET = 0x8000, 803 PETBI_CTRL_SOFT_RESET = 0x8000,
793 PETBI_CTRL_AUTO_NEG = 0x1000, 804 PETBI_CTRL_AUTO_NEG = 0x1000,
794 PETBI_CTRL_RESTART_NEG = 0x0200, 805 PETBI_CTRL_RESTART_NEG = 0x0200,
@@ -811,6 +822,23 @@ enum {
811 PETBI_EXPANSION_REG = 0x06, 822 PETBI_EXPANSION_REG = 0x06,
812 PETBI_EXP_PAGE_RX = 0x0002, 823 PETBI_EXP_PAGE_RX = 0x0002,
813 824
825 PHY_GIG_CONTROL = 9,
826 PHY_GIG_ENABLE_MAN = 0x1000, /* Enable Master/Slave Manual Config*/
827 PHY_GIG_SET_MASTER = 0x0800, /* Set Master (slave if clear)*/
828 PHY_GIG_ALL_PARAMS = 0x0300,
829 PHY_GIG_ADV_1000F = 0x0200,
830 PHY_GIG_ADV_1000H = 0x0100,
831
832 PHY_NEG_ADVER = 4,
833 PHY_NEG_ALL_PARAMS = 0x0fe0,
834 PHY_NEG_ASY_PAUSE = 0x0800,
835 PHY_NEG_SYM_PAUSE = 0x0400,
836 PHY_NEG_ADV_SPEED = 0x01e0,
837 PHY_NEG_ADV_100F = 0x0100,
838 PHY_NEG_ADV_100H = 0x0080,
839 PHY_NEG_ADV_10F = 0x0040,
840 PHY_NEG_ADV_10H = 0x0020,
841
814 PETBI_TBI_CTRL = 0x11, 842 PETBI_TBI_CTRL = 0x11,
815 PETBI_TBI_RESET = 0x8000, 843 PETBI_TBI_RESET = 0x8000,
816 PETBI_TBI_AUTO_SENSE = 0x0100, 844 PETBI_TBI_AUTO_SENSE = 0x0100,
@@ -826,8 +854,7 @@ enum {
826 PHY_AUX_RESET_STICK = 0x0002, 854 PHY_AUX_RESET_STICK = 0x0002,
827 PHY_NEG_PAUSE = 0x0400, 855 PHY_NEG_PAUSE = 0x0400,
828 PHY_CTRL_SOFT_RESET = 0x8000, 856 PHY_CTRL_SOFT_RESET = 0x8000,
829 PHY_NEG_ADVER = 4, 857 PHY_CTRL_AUTO_NEG = 0x1000,
830 PHY_NEG_ADV_SPEED = 0x01e0,
831 PHY_CTRL_RESTART_NEG = 0x0200, 858 PHY_CTRL_RESTART_NEG = 0x0200,
832}; 859};
833enum { 860enum {
@@ -892,6 +919,7 @@ enum {EEPROM_SIZE = FM93C86A_SIZE_16,
892 u16 pauseThreshold_mac; 919 u16 pauseThreshold_mac;
893 u16 resumeThreshold_mac; 920 u16 resumeThreshold_mac;
894 u16 portConfiguration; 921 u16 portConfiguration;
922#define PORT_CONFIG_DEFAULT 0xf700
895#define PORT_CONFIG_AUTO_NEG_ENABLED 0x8000 923#define PORT_CONFIG_AUTO_NEG_ENABLED 0x8000
896#define PORT_CONFIG_SYM_PAUSE_ENABLED 0x4000 924#define PORT_CONFIG_SYM_PAUSE_ENABLED 0x4000
897#define PORT_CONFIG_FULL_DUPLEX_ENABLED 0x2000 925#define PORT_CONFIG_FULL_DUPLEX_ENABLED 0x2000
@@ -1259,6 +1287,7 @@ struct ql3_adapter {
1259 struct delayed_work tx_timeout_work; 1287 struct delayed_work tx_timeout_work;
1260 u32 max_frame_size; 1288 u32 max_frame_size;
1261 u32 device_id; 1289 u32 device_id;
1290 u16 phyType;
1262}; 1291};
1263 1292
1264#endif /* _QLA3XXX_H_ */ 1293#endif /* _QLA3XXX_H_ */