diff options
author | Lendacky, Thomas <Thomas.Lendacky@amd.com> | 2014-08-01 12:56:36 -0400 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2014-08-02 22:29:53 -0400 |
commit | 1fa1f2e09824abd39fa7e7bffe8769b7b0260b45 (patch) | |
tree | 5906971e9fe2ebac9c82004a448800df9def4361 /drivers/net/phy | |
parent | 8c43a2cc75b3bf4f89ea439f4439a2a61f22c961 (diff) |
amd-xgbe-phy: Allow more time for Rx/Tx to become ready
The current time range waiting for Rx/Tx to become ready can sometimes
be too short if a connection is not present. Increase the number of
retries and the sleep to give a bit more time. Also, change level of
the message issued from _err to _dbg if Rx/Tx do not become ready
since the underlying logic will function as if no link is established
and retry eventually.
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/phy')
-rw-r--r-- | drivers/net/phy/amd-xgbe-phy.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/net/phy/amd-xgbe-phy.c b/drivers/net/phy/amd-xgbe-phy.c index 388e3029165a..f3230eef41fd 100644 --- a/drivers/net/phy/amd-xgbe-phy.c +++ b/drivers/net/phy/amd-xgbe-phy.c | |||
@@ -95,7 +95,7 @@ MODULE_DESCRIPTION("AMD 10GbE (amd-xgbe) PHY driver"); | |||
95 | #define XNP_MP_FORMATTED (1 << 13) | 95 | #define XNP_MP_FORMATTED (1 << 13) |
96 | #define XNP_NP_EXCHANGE (1 << 15) | 96 | #define XNP_NP_EXCHANGE (1 << 15) |
97 | 97 | ||
98 | #define XGBE_PHY_RATECHANGE_COUNT 100 | 98 | #define XGBE_PHY_RATECHANGE_COUNT 500 |
99 | 99 | ||
100 | #ifndef MDIO_PMA_10GBR_PMD_CTRL | 100 | #ifndef MDIO_PMA_10GBR_PMD_CTRL |
101 | #define MDIO_PMA_10GBR_PMD_CTRL 0x0096 | 101 | #define MDIO_PMA_10GBR_PMD_CTRL 0x0096 |
@@ -411,7 +411,7 @@ static void amd_xgbe_phy_serdes_complete_ratechange(struct phy_device *phydev) | |||
411 | /* Wait for Rx and Tx ready */ | 411 | /* Wait for Rx and Tx ready */ |
412 | wait = XGBE_PHY_RATECHANGE_COUNT; | 412 | wait = XGBE_PHY_RATECHANGE_COUNT; |
413 | while (wait--) { | 413 | while (wait--) { |
414 | usleep_range(10, 20); | 414 | usleep_range(50, 75); |
415 | 415 | ||
416 | status = XSIR0_IOREAD(priv, SIR0_STATUS); | 416 | status = XSIR0_IOREAD(priv, SIR0_STATUS); |
417 | if (XSIR_GET_BITS(status, SIR0_STATUS, RX_READY) && | 417 | if (XSIR_GET_BITS(status, SIR0_STATUS, RX_READY) && |
@@ -419,7 +419,7 @@ static void amd_xgbe_phy_serdes_complete_ratechange(struct phy_device *phydev) | |||
419 | return; | 419 | return; |
420 | } | 420 | } |
421 | 421 | ||
422 | netdev_err(phydev->attached_dev, "SerDes rx/tx not ready (%#hx)\n", | 422 | netdev_dbg(phydev->attached_dev, "SerDes rx/tx not ready (%#hx)\n", |
423 | status); | 423 | status); |
424 | } | 424 | } |
425 | 425 | ||