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authorTrent Piepho <tpiepho@freescale.com>2008-11-25 04:00:47 -0500
committerDavid S. Miller <davem@davemloft.net>2008-11-25 04:00:47 -0500
commit11c6dd2c723a9ff9bdd4ee11b2798a08abc94e98 (patch)
tree89f3cdd42cb4164edf09415880f9f53120dca397 /drivers/net/phy
parent244f46ae6e9e18f6fc0be7d1f49febde4762c34b (diff)
phylib: Add Vitesse VSC8221 SGMII PHY
PHY is mostly compatible with the existing VSC8244 PHY. The init sequence is different and the interrupt mask lacks some bits present in the VSC8244. Rather than making a copy of the existing VSC234x config_intr function and change one constant, I modify it to select the interrupt mask based on which driver is calling it. This lets it be used by both drivers. Signed-off-by: Trent Piepho <tpiepho@freescale.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/phy')
-rw-r--r--drivers/net/phy/vitesse.c64
1 files changed, 55 insertions, 9 deletions
diff --git a/drivers/net/phy/vitesse.c b/drivers/net/phy/vitesse.c
index 8874497b6bbf..dd3b2447e85a 100644
--- a/drivers/net/phy/vitesse.c
+++ b/drivers/net/phy/vitesse.c
@@ -34,6 +34,8 @@
34#define MII_VSC8244_IMASK_DUPLEX 0x1000 34#define MII_VSC8244_IMASK_DUPLEX 0x1000
35#define MII_VSC8244_IMASK_MASK 0xf000 35#define MII_VSC8244_IMASK_MASK 0xf000
36 36
37#define MII_VSC8221_IMASK_MASK 0xa000
38
37/* Vitesse Interrupt Status Register */ 39/* Vitesse Interrupt Status Register */
38#define MII_VSC8244_ISTAT 0x1a 40#define MII_VSC8244_ISTAT 0x1a
39#define MII_VSC8244_ISTAT_STATUS 0x8000 41#define MII_VSC8244_ISTAT_STATUS 0x8000
@@ -49,6 +51,12 @@
49#define MII_VSC8244_AUXCONSTAT_GBIT 0x0010 51#define MII_VSC8244_AUXCONSTAT_GBIT 0x0010
50#define MII_VSC8244_AUXCONSTAT_100 0x0008 52#define MII_VSC8244_AUXCONSTAT_100 0x0008
51 53
54#define MII_VSC8221_AUXCONSTAT_INIT 0x0004 /* need to set this bit? */
55#define MII_VSC8221_AUXCONSTAT_RESERVED 0x0004
56
57#define PHY_ID_VSC8244 0x000fc6c0
58#define PHY_ID_VSC8221 0x000fc550
59
52MODULE_DESCRIPTION("Vitesse PHY driver"); 60MODULE_DESCRIPTION("Vitesse PHY driver");
53MODULE_AUTHOR("Kriston Carson"); 61MODULE_AUTHOR("Kriston Carson");
54MODULE_LICENSE("GPL"); 62MODULE_LICENSE("GPL");
@@ -95,13 +103,15 @@ static int vsc824x_ack_interrupt(struct phy_device *phydev)
95 return (err < 0) ? err : 0; 103 return (err < 0) ? err : 0;
96} 104}
97 105
98static int vsc824x_config_intr(struct phy_device *phydev) 106static int vsc82xx_config_intr(struct phy_device *phydev)
99{ 107{
100 int err; 108 int err;
101 109
102 if (phydev->interrupts == PHY_INTERRUPT_ENABLED) 110 if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
103 err = phy_write(phydev, MII_VSC8244_IMASK, 111 err = phy_write(phydev, MII_VSC8244_IMASK,
104 MII_VSC8244_IMASK_MASK); 112 phydev->drv->phy_id == PHY_ID_VSC8244 ?
113 MII_VSC8244_IMASK_MASK :
114 MII_VSC8221_IMASK_MASK);
105 else { 115 else {
106 /* 116 /*
107 * The Vitesse PHY cannot clear the interrupt 117 * The Vitesse PHY cannot clear the interrupt
@@ -120,7 +130,7 @@ static int vsc824x_config_intr(struct phy_device *phydev)
120 130
121/* Vitesse 824x */ 131/* Vitesse 824x */
122static struct phy_driver vsc8244_driver = { 132static struct phy_driver vsc8244_driver = {
123 .phy_id = 0x000fc6c0, 133 .phy_id = PHY_ID_VSC8244,
124 .name = "Vitesse VSC8244", 134 .name = "Vitesse VSC8244",
125 .phy_id_mask = 0x000fffc0, 135 .phy_id_mask = 0x000fffc0,
126 .features = PHY_GBIT_FEATURES, 136 .features = PHY_GBIT_FEATURES,
@@ -129,19 +139,55 @@ static struct phy_driver vsc8244_driver = {
129 .config_aneg = &genphy_config_aneg, 139 .config_aneg = &genphy_config_aneg,
130 .read_status = &genphy_read_status, 140 .read_status = &genphy_read_status,
131 .ack_interrupt = &vsc824x_ack_interrupt, 141 .ack_interrupt = &vsc824x_ack_interrupt,
132 .config_intr = &vsc824x_config_intr, 142 .config_intr = &vsc82xx_config_intr,
133 .driver = { .owner = THIS_MODULE,}, 143 .driver = { .owner = THIS_MODULE,},
134}; 144};
135 145
136static int __init vsc8244_init(void) 146static int vsc8221_config_init(struct phy_device *phydev)
137{ 147{
138 return phy_driver_register(&vsc8244_driver); 148 int err;
149
150 err = phy_write(phydev, MII_VSC8244_AUX_CONSTAT,
151 MII_VSC8221_AUXCONSTAT_INIT);
152 return err;
153
154 /* Perhaps we should set EXT_CON1 based on the interface?
155 Options are 802.3Z SerDes or SGMII */
156}
157
158/* Vitesse 8221 */
159static struct phy_driver vsc8221_driver = {
160 .phy_id = PHY_ID_VSC8221,
161 .phy_id_mask = 0x000ffff0,
162 .name = "Vitesse VSC8221",
163 .features = PHY_GBIT_FEATURES,
164 .flags = PHY_HAS_INTERRUPT,
165 .config_init = &vsc8221_config_init,
166 .config_aneg = &genphy_config_aneg,
167 .read_status = &genphy_read_status,
168 .ack_interrupt = &vsc824x_ack_interrupt,
169 .config_intr = &vsc82xx_config_intr,
170 .driver = { .owner = THIS_MODULE,},
171};
172
173static int __init vsc82xx_init(void)
174{
175 int err;
176
177 err = phy_driver_register(&vsc8244_driver);
178 if (err < 0)
179 return err;
180 err = phy_driver_register(&vsc8221_driver);
181 if (err < 0)
182 phy_driver_unregister(&vsc8244_driver);
183 return err;
139} 184}
140 185
141static void __exit vsc8244_exit(void) 186static void __exit vsc82xx_exit(void)
142{ 187{
143 phy_driver_unregister(&vsc8244_driver); 188 phy_driver_unregister(&vsc8244_driver);
189 phy_driver_unregister(&vsc8221_driver);
144} 190}
145 191
146module_init(vsc8244_init); 192module_init(vsc82xx_init);
147module_exit(vsc8244_exit); 193module_exit(vsc82xx_exit);