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authorKapil Juneja <Kapil.Juneja@freescale.com>2007-05-11 19:25:11 -0400
committerJeff Garzik <jeff@garzik.org>2007-07-08 22:16:38 -0400
commitd3c12873c36005263286cf5660663c8c10f9d2b5 (patch)
tree8b51ae1aec834ece23271e6b569d7c4189422ad5 /drivers/net/phy
parent0cefeebaf3da39d768bffcf62460fe2088e824ef (diff)
gianfar: add support for SGMII
Add code for initialising and configuring TBI interface and programming it for connecting to on-chip SERDES (Lynx PHY) in case of SGMII mode selected through HRCW at reset. also add defines for TBI register configuration. TBI interface is programmed towards the SERDES. refactored mdio read/write functions to differentiate programming local interface MII regs (e.g., for TBI) from always programming the mdio master (TSEC1, for programming the PHYs). Signed-off-by: Kapil Juneja <Kapil.Juneja@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
Diffstat (limited to 'drivers/net/phy')
0 files changed, 0 insertions, 0 deletions