diff options
author | Baruch Siach <baruch@tkos.co.il> | 2011-02-13 21:05:33 -0500 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2011-02-14 20:38:30 -0500 |
commit | d606ef3fe0c57504b8e534c58498f73a6abc049a (patch) | |
tree | 00aa6e80fedbe8cd866fe19db8b077afd32db068 /drivers/net/phy | |
parent | 68aa3fd551e9d54d98794852714dc1edbb21df77 (diff) |
phy/micrel: add ability to support 50MHz RMII clock on KZS8051RNL
Platform code can now set the MICREL_PHY_50MHZ_CLK bit of dev_flags in a fixup
routine (registered with phy_register_fixup_for_uid()), to make the KZS8051RNL
PHY work with 50MHz RMII reference clock.
Cc: David J. Choi <david.choi@micrel.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/phy')
-rw-r--r-- | drivers/net/phy/micrel.c | 24 |
1 files changed, 16 insertions, 8 deletions
diff --git a/drivers/net/phy/micrel.c b/drivers/net/phy/micrel.c index 0fd1678bc5a9..590f902deb6b 100644 --- a/drivers/net/phy/micrel.c +++ b/drivers/net/phy/micrel.c | |||
@@ -19,13 +19,7 @@ | |||
19 | #include <linux/kernel.h> | 19 | #include <linux/kernel.h> |
20 | #include <linux/module.h> | 20 | #include <linux/module.h> |
21 | #include <linux/phy.h> | 21 | #include <linux/phy.h> |
22 | 22 | #include <linux/micrel_phy.h> | |
23 | #define PHY_ID_KSZ9021 0x00221611 | ||
24 | #define PHY_ID_KS8737 0x00221720 | ||
25 | #define PHY_ID_KS8041 0x00221510 | ||
26 | #define PHY_ID_KS8051 0x00221550 | ||
27 | /* both for ks8001 Rev. A/B, and for ks8721 Rev 3. */ | ||
28 | #define PHY_ID_KS8001 0x0022161A | ||
29 | 23 | ||
30 | /* general Interrupt control/status reg in vendor specific block. */ | 24 | /* general Interrupt control/status reg in vendor specific block. */ |
31 | #define MII_KSZPHY_INTCS 0x1B | 25 | #define MII_KSZPHY_INTCS 0x1B |
@@ -46,6 +40,7 @@ | |||
46 | #define KSZPHY_CTRL_INT_ACTIVE_HIGH (1 << 9) | 40 | #define KSZPHY_CTRL_INT_ACTIVE_HIGH (1 << 9) |
47 | #define KSZ9021_CTRL_INT_ACTIVE_HIGH (1 << 14) | 41 | #define KSZ9021_CTRL_INT_ACTIVE_HIGH (1 << 14) |
48 | #define KS8737_CTRL_INT_ACTIVE_HIGH (1 << 14) | 42 | #define KS8737_CTRL_INT_ACTIVE_HIGH (1 << 14) |
43 | #define KSZ8051_RMII_50MHZ_CLK (1 << 7) | ||
49 | 44 | ||
50 | static int kszphy_ack_interrupt(struct phy_device *phydev) | 45 | static int kszphy_ack_interrupt(struct phy_device *phydev) |
51 | { | 46 | { |
@@ -106,6 +101,19 @@ static int kszphy_config_init(struct phy_device *phydev) | |||
106 | return 0; | 101 | return 0; |
107 | } | 102 | } |
108 | 103 | ||
104 | static int ks8051_config_init(struct phy_device *phydev) | ||
105 | { | ||
106 | int regval; | ||
107 | |||
108 | if (phydev->dev_flags & MICREL_PHY_50MHZ_CLK) { | ||
109 | regval = phy_read(phydev, MII_KSZPHY_CTRL); | ||
110 | regval |= KSZ8051_RMII_50MHZ_CLK; | ||
111 | phy_write(phydev, MII_KSZPHY_CTRL, regval); | ||
112 | } | ||
113 | |||
114 | return 0; | ||
115 | } | ||
116 | |||
109 | static struct phy_driver ks8737_driver = { | 117 | static struct phy_driver ks8737_driver = { |
110 | .phy_id = PHY_ID_KS8737, | 118 | .phy_id = PHY_ID_KS8737, |
111 | .phy_id_mask = 0x00fffff0, | 119 | .phy_id_mask = 0x00fffff0, |
@@ -142,7 +150,7 @@ static struct phy_driver ks8051_driver = { | |||
142 | .features = (PHY_BASIC_FEATURES | SUPPORTED_Pause | 150 | .features = (PHY_BASIC_FEATURES | SUPPORTED_Pause |
143 | | SUPPORTED_Asym_Pause), | 151 | | SUPPORTED_Asym_Pause), |
144 | .flags = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT, | 152 | .flags = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT, |
145 | .config_init = kszphy_config_init, | 153 | .config_init = ks8051_config_init, |
146 | .config_aneg = genphy_config_aneg, | 154 | .config_aneg = genphy_config_aneg, |
147 | .read_status = genphy_read_status, | 155 | .read_status = genphy_read_status, |
148 | .ack_interrupt = kszphy_ack_interrupt, | 156 | .ack_interrupt = kszphy_ack_interrupt, |