diff options
author | David Daney <david.daney@cavium.com> | 2011-09-30 08:17:48 -0400 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2011-09-30 18:54:08 -0400 |
commit | 76231e0297db30f1f0e947a02b42495e7d535d56 (patch) | |
tree | a0fbf2e596d01de7cfe3d7ea8447b3e72e775ec9 /drivers/net/phy | |
parent | 6fe3264945ee63292cdfb27b6e95bc52c603bb09 (diff) |
netdev/phy/icplus: Use mdiobus_write() and mdiobus_read() for proper locking.
Usually you have to take the bus lock. Why not here too?
I saw this when working on something else. Not even compile tested.
Signed-off-by: David Daney <david.daney@cavium.com>
Cc: Greg Dietsche <Gregory.Dietsche@cuw.edu>
Cc: "Uwe Kleine-Konig" <u.kleine-koenig@pengutronix.de>
Cc: Giuseppe Cavallaro <peppe.cavallaro@st.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/phy')
-rw-r--r-- | drivers/net/phy/icplus.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/drivers/net/phy/icplus.c b/drivers/net/phy/icplus.c index 6e344e59caf7..d66bd8d12599 100644 --- a/drivers/net/phy/icplus.c +++ b/drivers/net/phy/icplus.c | |||
@@ -49,36 +49,36 @@ static int ip175c_config_init(struct phy_device *phydev) | |||
49 | if (full_reset_performed == 0) { | 49 | if (full_reset_performed == 0) { |
50 | 50 | ||
51 | /* master reset */ | 51 | /* master reset */ |
52 | err = phydev->bus->write(phydev->bus, 30, 0, 0x175c); | 52 | err = mdiobus_write(phydev->bus, 30, 0, 0x175c); |
53 | if (err < 0) | 53 | if (err < 0) |
54 | return err; | 54 | return err; |
55 | 55 | ||
56 | /* ensure no bus delays overlap reset period */ | 56 | /* ensure no bus delays overlap reset period */ |
57 | err = phydev->bus->read(phydev->bus, 30, 0); | 57 | err = mdiobus_read(phydev->bus, 30, 0); |
58 | 58 | ||
59 | /* data sheet specifies reset period is 2 msec */ | 59 | /* data sheet specifies reset period is 2 msec */ |
60 | mdelay(2); | 60 | mdelay(2); |
61 | 61 | ||
62 | /* enable IP175C mode */ | 62 | /* enable IP175C mode */ |
63 | err = phydev->bus->write(phydev->bus, 29, 31, 0x175c); | 63 | err = mdiobus_write(phydev->bus, 29, 31, 0x175c); |
64 | if (err < 0) | 64 | if (err < 0) |
65 | return err; | 65 | return err; |
66 | 66 | ||
67 | /* Set MII0 speed and duplex (in PHY mode) */ | 67 | /* Set MII0 speed and duplex (in PHY mode) */ |
68 | err = phydev->bus->write(phydev->bus, 29, 22, 0x420); | 68 | err = mdiobus_write(phydev->bus, 29, 22, 0x420); |
69 | if (err < 0) | 69 | if (err < 0) |
70 | return err; | 70 | return err; |
71 | 71 | ||
72 | /* reset switch ports */ | 72 | /* reset switch ports */ |
73 | for (i = 0; i < 5; i++) { | 73 | for (i = 0; i < 5; i++) { |
74 | err = phydev->bus->write(phydev->bus, i, | 74 | err = mdiobus_write(phydev->bus, i, |
75 | MII_BMCR, BMCR_RESET); | 75 | MII_BMCR, BMCR_RESET); |
76 | if (err < 0) | 76 | if (err < 0) |
77 | return err; | 77 | return err; |
78 | } | 78 | } |
79 | 79 | ||
80 | for (i = 0; i < 5; i++) | 80 | for (i = 0; i < 5; i++) |
81 | err = phydev->bus->read(phydev->bus, i, MII_BMCR); | 81 | err = mdiobus_read(phydev->bus, i, MII_BMCR); |
82 | 82 | ||
83 | mdelay(2); | 83 | mdelay(2); |
84 | 84 | ||