diff options
author | Jeff Garzik <jeff@garzik.org> | 2006-11-14 11:46:41 -0500 |
---|---|---|
committer | Jeff Garzik <jeff@garzik.org> | 2006-12-02 00:12:04 -0500 |
commit | cefd9f7f1281c1ead03236f227dad4b163619705 (patch) | |
tree | 94e12c23ffca42949f2bfbec4d706bcf591edffd /drivers/net/phy | |
parent | 89e5785fc8a6b9eafd37f2318a9a76d479c796be (diff) |
Revert "[PATCH] Add support for Marvell 88e1111S and 88e1145"
This reverts commit 477c517903d57047150b01608149e02c6e9d83dd.
This patch depended on something that was not yet committed.
Diffstat (limited to 'drivers/net/phy')
-rw-r--r-- | drivers/net/phy/marvell.c | 156 |
1 files changed, 12 insertions, 144 deletions
diff --git a/drivers/net/phy/marvell.c b/drivers/net/phy/marvell.c index 5320ab9fe018..0ad253282d0d 100644 --- a/drivers/net/phy/marvell.c +++ b/drivers/net/phy/marvell.c | |||
@@ -43,19 +43,6 @@ | |||
43 | #define MII_M1011_IMASK_INIT 0x6400 | 43 | #define MII_M1011_IMASK_INIT 0x6400 |
44 | #define MII_M1011_IMASK_CLEAR 0x0000 | 44 | #define MII_M1011_IMASK_CLEAR 0x0000 |
45 | 45 | ||
46 | #define MII_M1011_PHY_SCR 0x10 | ||
47 | #define MII_M1011_PHY_SCR_AUTO_CROSS 0x0060 | ||
48 | |||
49 | #define MII_M1145_PHY_EXT_CR 0x14 | ||
50 | #define MII_M1145_RGMII_RX_DELAY 0x0080 | ||
51 | #define MII_M1145_RGMII_TX_DELAY 0x0002 | ||
52 | |||
53 | #define M1145_DEV_FLAGS_RESISTANCE 0x00000001 | ||
54 | |||
55 | #define MII_M1111_PHY_LED_CONTROL 0x18 | ||
56 | #define MII_M1111_PHY_LED_DIRECT 0x4100 | ||
57 | #define MII_M1111_PHY_LED_COMBINE 0x411c | ||
58 | |||
59 | MODULE_DESCRIPTION("Marvell PHY driver"); | 46 | MODULE_DESCRIPTION("Marvell PHY driver"); |
60 | MODULE_AUTHOR("Andy Fleming"); | 47 | MODULE_AUTHOR("Andy Fleming"); |
61 | MODULE_LICENSE("GPL"); | 48 | MODULE_LICENSE("GPL"); |
@@ -77,7 +64,7 @@ static int marvell_config_intr(struct phy_device *phydev) | |||
77 | { | 64 | { |
78 | int err; | 65 | int err; |
79 | 66 | ||
80 | if (phydev->interrupts == PHY_INTERRUPT_ENABLED) | 67 | if(phydev->interrupts == PHY_INTERRUPT_ENABLED) |
81 | err = phy_write(phydev, MII_M1011_IMASK, MII_M1011_IMASK_INIT); | 68 | err = phy_write(phydev, MII_M1011_IMASK, MII_M1011_IMASK_INIT); |
82 | else | 69 | else |
83 | err = phy_write(phydev, MII_M1011_IMASK, MII_M1011_IMASK_CLEAR); | 70 | err = phy_write(phydev, MII_M1011_IMASK, MII_M1011_IMASK_CLEAR); |
@@ -117,153 +104,34 @@ static int marvell_config_aneg(struct phy_device *phydev) | |||
117 | if (err < 0) | 104 | if (err < 0) |
118 | return err; | 105 | return err; |
119 | 106 | ||
120 | err = phy_write(phydev, MII_M1011_PHY_SCR, | ||
121 | MII_M1011_PHY_SCR_AUTO_CROSS); | ||
122 | if (err < 0) | ||
123 | return err; | ||
124 | |||
125 | err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL, | ||
126 | MII_M1111_PHY_LED_DIRECT); | ||
127 | if (err < 0) | ||
128 | return err; | ||
129 | 107 | ||
130 | err = genphy_config_aneg(phydev); | 108 | err = genphy_config_aneg(phydev); |
131 | 109 | ||
132 | return err; | 110 | return err; |
133 | } | 111 | } |
134 | 112 | ||
135 | static int m88e1145_config_init(struct phy_device *phydev) | ||
136 | { | ||
137 | int err; | ||
138 | |||
139 | /* Take care of errata E0 & E1 */ | ||
140 | err = phy_write(phydev, 0x1d, 0x001b); | ||
141 | if (err < 0) | ||
142 | return err; | ||
143 | |||
144 | err = phy_write(phydev, 0x1e, 0x418f); | ||
145 | if (err < 0) | ||
146 | return err; | ||
147 | |||
148 | err = phy_write(phydev, 0x1d, 0x0016); | ||
149 | if (err < 0) | ||
150 | return err; | ||
151 | |||
152 | err = phy_write(phydev, 0x1e, 0xa2da); | ||
153 | if (err < 0) | ||
154 | return err; | ||
155 | |||
156 | if (phydev->interface == PHY_INTERFACE_MODE_RGMII) { | ||
157 | int temp = phy_read(phydev, MII_M1145_PHY_EXT_CR); | ||
158 | if (temp < 0) | ||
159 | return temp; | ||
160 | |||
161 | temp |= (MII_M1145_RGMII_RX_DELAY | MII_M1145_RGMII_TX_DELAY); | ||
162 | |||
163 | err = phy_write(phydev, MII_M1145_PHY_EXT_CR, temp); | ||
164 | if (err < 0) | ||
165 | return err; | ||
166 | |||
167 | if (phydev->dev_flags & M1145_DEV_FLAGS_RESISTANCE) { | ||
168 | err = phy_write(phydev, 0x1d, 0x0012); | ||
169 | if (err < 0) | ||
170 | return err; | ||
171 | |||
172 | temp = phy_read(phydev, 0x1e); | ||
173 | if (temp < 0) | ||
174 | return temp; | ||
175 | |||
176 | temp &= 0xf03f; | ||
177 | temp |= 2 << 9; /* 36 ohm */ | ||
178 | temp |= 2 << 6; /* 39 ohm */ | ||
179 | |||
180 | err = phy_write(phydev, 0x1e, temp); | ||
181 | if (err < 0) | ||
182 | return err; | ||
183 | |||
184 | err = phy_write(phydev, 0x1d, 0x3); | ||
185 | if (err < 0) | ||
186 | return err; | ||
187 | |||
188 | err = phy_write(phydev, 0x1e, 0x8000); | ||
189 | if (err < 0) | ||
190 | return err; | ||
191 | } | ||
192 | } | ||
193 | |||
194 | return 0; | ||
195 | } | ||
196 | 113 | ||
197 | static struct phy_driver m88e1101_driver = { | 114 | static struct phy_driver m88e1101_driver = { |
198 | .phy_id = 0x01410c60, | 115 | .phy_id = 0x01410c00, |
199 | .phy_id_mask = 0xfffffff0, | 116 | .phy_id_mask = 0xffffff00, |
200 | .name = "Marvell 88E1101", | 117 | .name = "Marvell 88E1101", |
201 | .features = PHY_GBIT_FEATURES, | 118 | .features = PHY_GBIT_FEATURES, |
202 | .flags = PHY_HAS_INTERRUPT, | 119 | .flags = PHY_HAS_INTERRUPT, |
203 | .config_aneg = &marvell_config_aneg, | 120 | .config_aneg = &marvell_config_aneg, |
204 | .read_status = &genphy_read_status, | 121 | .read_status = &genphy_read_status, |
205 | .ack_interrupt = &marvell_ack_interrupt, | 122 | .ack_interrupt = &marvell_ack_interrupt, |
206 | .config_intr = &marvell_config_intr, | 123 | .config_intr = &marvell_config_intr, |
207 | .driver = {.owner = THIS_MODULE,}, | 124 | .driver = { .owner = THIS_MODULE,}, |
208 | }; | ||
209 | |||
210 | static struct phy_driver m88e1111s_driver = { | ||
211 | .phy_id = 0x01410cc0, | ||
212 | .phy_id_mask = 0xfffffff0, | ||
213 | .name = "Marvell 88E1111", | ||
214 | .features = PHY_GBIT_FEATURES, | ||
215 | .flags = PHY_HAS_INTERRUPT, | ||
216 | .config_aneg = &marvell_config_aneg, | ||
217 | .read_status = &genphy_read_status, | ||
218 | .ack_interrupt = &marvell_ack_interrupt, | ||
219 | .config_intr = &marvell_config_intr, | ||
220 | .driver = {.owner = THIS_MODULE,}, | ||
221 | }; | ||
222 | |||
223 | static struct phy_driver m88e1145_driver = { | ||
224 | .phy_id = 0x01410cd0, | ||
225 | .phy_id_mask = 0xfffffff0, | ||
226 | .name = "Marvell 88E1145", | ||
227 | .features = PHY_GBIT_FEATURES, | ||
228 | .flags = PHY_HAS_INTERRUPT, | ||
229 | .config_init = &m88e1145_config_init, | ||
230 | .config_aneg = &marvell_config_aneg, | ||
231 | .read_status = &genphy_read_status, | ||
232 | .ack_interrupt = &marvell_ack_interrupt, | ||
233 | .config_intr = &marvell_config_intr, | ||
234 | .driver = {.owner = THIS_MODULE,}, | ||
235 | }; | 125 | }; |
236 | 126 | ||
237 | static int __init marvell_init(void) | 127 | static int __init marvell_init(void) |
238 | { | 128 | { |
239 | int ret; | 129 | return phy_driver_register(&m88e1101_driver); |
240 | |||
241 | ret = phy_driver_register(&m88e1101_driver); | ||
242 | if (ret) | ||
243 | return ret; | ||
244 | |||
245 | ret = phy_driver_register(&m88e1111s_driver); | ||
246 | if (ret) | ||
247 | goto err1111s; | ||
248 | |||
249 | ret = phy_driver_register(&m88e1145_driver); | ||
250 | if (ret) | ||
251 | goto err1145; | ||
252 | |||
253 | return 0; | ||
254 | |||
255 | err1145: | ||
256 | phy_driver_unregister(&m88e1111s_driver); | ||
257 | err1111s: | ||
258 | phy_driver_unregister(&m88e1101_driver); | ||
259 | return ret; | ||
260 | } | 130 | } |
261 | 131 | ||
262 | static void __exit marvell_exit(void) | 132 | static void __exit marvell_exit(void) |
263 | { | 133 | { |
264 | phy_driver_unregister(&m88e1101_driver); | 134 | phy_driver_unregister(&m88e1101_driver); |
265 | phy_driver_unregister(&m88e1111s_driver); | ||
266 | phy_driver_unregister(&m88e1145_driver); | ||
267 | } | 135 | } |
268 | 136 | ||
269 | module_init(marvell_init); | 137 | module_init(marvell_init); |