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authorArnaud Patard <arnaud.patard@rtp-net.org>2010-10-21 06:59:57 -0400
committerDavid S. Miller <davem@davemloft.net>2010-10-21 06:59:57 -0400
commitbe8c648051048bc66fbca590d00f3e8543ec32af (patch)
tree4b57610d1e849d0011decb98cf6d39c525bd4475 /drivers/net/phy
parent27ab76065c0c6734ea98ccc7080046a72d98455b (diff)
phy/marvell: fix 88e1121 support
Commit c477d0447db08068a497e7beb892b2b2a7bff64b added support for RGMII rx/tx delays except that it ends up clearing rx/tx delays bit for modes differents that RGMII*ID. Due to this, ethernet is not working anymore on my guruplug server +. This patch is fixing that. Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/phy')
-rw-r--r--drivers/net/phy/marvell.c31
1 files changed, 19 insertions, 12 deletions
diff --git a/drivers/net/phy/marvell.c b/drivers/net/phy/marvell.c
index ed43c0016c64..e2afdce0a437 100644
--- a/drivers/net/phy/marvell.c
+++ b/drivers/net/phy/marvell.c
@@ -196,20 +196,27 @@ static int m88e1121_config_aneg(struct phy_device *phydev)
196 MII_88E1121_PHY_MSCR_PAGE); 196 MII_88E1121_PHY_MSCR_PAGE);
197 if (err < 0) 197 if (err < 0)
198 return err; 198 return err;
199 mscr = phy_read(phydev, MII_88E1121_PHY_MSCR_REG) &
200 MII_88E1121_PHY_MSCR_DELAY_MASK;
201 199
202 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) 200 if ((phydev->interface == PHY_INTERFACE_MODE_RGMII) ||
203 mscr |= (MII_88E1121_PHY_MSCR_RX_DELAY | 201 (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) ||
204 MII_88E1121_PHY_MSCR_TX_DELAY); 202 (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) ||
205 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) 203 (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)) {
206 mscr |= MII_88E1121_PHY_MSCR_RX_DELAY;
207 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)
208 mscr |= MII_88E1121_PHY_MSCR_TX_DELAY;
209 204
210 err = phy_write(phydev, MII_88E1121_PHY_MSCR_REG, mscr); 205 mscr = phy_read(phydev, MII_88E1121_PHY_MSCR_REG) &
211 if (err < 0) 206 MII_88E1121_PHY_MSCR_DELAY_MASK;
212 return err; 207
208 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)
209 mscr |= (MII_88E1121_PHY_MSCR_RX_DELAY |
210 MII_88E1121_PHY_MSCR_TX_DELAY);
211 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID)
212 mscr |= MII_88E1121_PHY_MSCR_RX_DELAY;
213 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)
214 mscr |= MII_88E1121_PHY_MSCR_TX_DELAY;
215
216 err = phy_write(phydev, MII_88E1121_PHY_MSCR_REG, mscr);
217 if (err < 0)
218 return err;
219 }
213 220
214 phy_write(phydev, MII_88E1121_PHY_PAGE, oldpage); 221 phy_write(phydev, MII_88E1121_PHY_PAGE, oldpage);
215 222