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authorCyril Chemparathy <cyril@ti.com>2010-08-03 22:36:06 -0400
committerDavid S. Miller <davem@davemloft.net>2010-08-03 22:36:06 -0400
commit3ff1c25927e3af61c6bf0e4ed959504058ae4565 (patch)
tree67b0f116b1dff0dde7533c422ab2f2badd3a10a3 /drivers/net/phy
parent99870a73d406e5bd235bc8e5aca6893a68184881 (diff)
phy/marvell: add 88ec048 support
Marvell 88ec048 is a derivative of its 88e1121r device. From the programmer's perspective, the one major difference is the addition of an additional control bit in Page 2 Register 16 - used to control the padding of odd nibble preambles. This patch adds support for this new device, while inheriting as much code as possible from the existing 88e1121r implementation. Signed-off-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/phy')
-rw-r--r--drivers/net/phy/marvell.c42
1 files changed, 42 insertions, 0 deletions
diff --git a/drivers/net/phy/marvell.c b/drivers/net/phy/marvell.c
index b1413aed3f98..721a090a01bc 100644
--- a/drivers/net/phy/marvell.c
+++ b/drivers/net/phy/marvell.c
@@ -75,6 +75,9 @@
75#define MII_88E1121_PHY_MSCR_TX_DELAY BIT(4) 75#define MII_88E1121_PHY_MSCR_TX_DELAY BIT(4)
76#define MII_88E1121_PHY_MSCR_DELAY_MASK (~(0x3 << 4)) 76#define MII_88E1121_PHY_MSCR_DELAY_MASK (~(0x3 << 4))
77 77
78#define MII_88EC048_PHY_MSCR1_REG 16
79#define MII_88EC048_PHY_MSCR1_PAD_ODD BIT(6)
80
78#define MII_88E1121_PHY_LED_CTRL 16 81#define MII_88E1121_PHY_LED_CTRL 16
79#define MII_88E1121_PHY_LED_PAGE 3 82#define MII_88E1121_PHY_LED_PAGE 3
80#define MII_88E1121_PHY_LED_DEF 0x0030 83#define MII_88E1121_PHY_LED_DEF 0x0030
@@ -231,6 +234,31 @@ static int m88e1121_config_aneg(struct phy_device *phydev)
231 return err; 234 return err;
232} 235}
233 236
237static int m88ec048_config_aneg(struct phy_device *phydev)
238{
239 int err, oldpage, mscr;
240
241 oldpage = phy_read(phydev, MII_88E1121_PHY_PAGE);
242
243 err = phy_write(phydev, MII_88E1121_PHY_PAGE,
244 MII_88E1121_PHY_MSCR_PAGE);
245 if (err < 0)
246 return err;
247
248 mscr = phy_read(phydev, MII_88EC048_PHY_MSCR1_REG);
249 mscr |= MII_88EC048_PHY_MSCR1_PAD_ODD;
250
251 err = phy_write(phydev, MII_88E1121_PHY_MSCR_REG, mscr);
252 if (err < 0)
253 return err;
254
255 err = phy_write(phydev, MII_88E1121_PHY_PAGE, oldpage);
256 if (err < 0)
257 return err;
258
259 return m88e1121_config_aneg(phydev);
260}
261
234static int m88e1111_config_init(struct phy_device *phydev) 262static int m88e1111_config_init(struct phy_device *phydev)
235{ 263{
236 int err; 264 int err;
@@ -622,6 +650,19 @@ static struct phy_driver marvell_drivers[] = {
622 .driver = { .owner = THIS_MODULE }, 650 .driver = { .owner = THIS_MODULE },
623 }, 651 },
624 { 652 {
653 .phy_id = 0x01410e90,
654 .phy_id_mask = 0xfffffff0,
655 .name = "Marvell 88EC048",
656 .features = PHY_GBIT_FEATURES,
657 .flags = PHY_HAS_INTERRUPT,
658 .config_aneg = &m88ec048_config_aneg,
659 .read_status = &marvell_read_status,
660 .ack_interrupt = &marvell_ack_interrupt,
661 .config_intr = &marvell_config_intr,
662 .did_interrupt = &m88e1121_did_interrupt,
663 .driver = { .owner = THIS_MODULE },
664 },
665 {
625 .phy_id = 0x01410cd0, 666 .phy_id = 0x01410cd0,
626 .phy_id_mask = 0xfffffff0, 667 .phy_id_mask = 0xfffffff0,
627 .name = "Marvell 88E1145", 668 .name = "Marvell 88E1145",
@@ -686,6 +727,7 @@ static struct mdio_device_id marvell_tbl[] = {
686 { 0x01410cb0, 0xfffffff0 }, 727 { 0x01410cb0, 0xfffffff0 },
687 { 0x01410cd0, 0xfffffff0 }, 728 { 0x01410cd0, 0xfffffff0 },
688 { 0x01410e30, 0xfffffff0 }, 729 { 0x01410e30, 0xfffffff0 },
730 { 0x01410e90, 0xfffffff0 },
689 { } 731 { }
690}; 732};
691 733