diff options
author | Hector Palacios <hector.palacios@digi.com> | 2013-03-10 18:50:03 -0400 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2013-03-12 06:50:59 -0400 |
commit | b6bb4dfcb1803765e7d12a9807a8d4650545199a (patch) | |
tree | 85ad7923c17535647cfd736a0d01b62bb642c244 /drivers/net/phy/micrel.c | |
parent | b818d1a7f72575eef17e00dc4085512c9cc8897d (diff) |
phy/micrel: move flag handling to function for common use
The flag MICREL_PHY_50MHZ_CLK is not of exclusive use of KSZ8051
model. At least KSZ8021 and KSZ8031 models also use it.
This patch moves the handling of this and future flags to a
separate function so that the different PHY models can call it on
their init function, if needed.
Signed-off-by: Hector Palacios <hector.palacios@digi.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/phy/micrel.c')
-rw-r--r-- | drivers/net/phy/micrel.c | 27 |
1 files changed, 18 insertions, 9 deletions
diff --git a/drivers/net/phy/micrel.c b/drivers/net/phy/micrel.c index 018af1852fe1..2510435f34ed 100644 --- a/drivers/net/phy/micrel.c +++ b/drivers/net/phy/micrel.c | |||
@@ -53,6 +53,18 @@ | |||
53 | #define KS8737_CTRL_INT_ACTIVE_HIGH (1 << 14) | 53 | #define KS8737_CTRL_INT_ACTIVE_HIGH (1 << 14) |
54 | #define KSZ8051_RMII_50MHZ_CLK (1 << 7) | 54 | #define KSZ8051_RMII_50MHZ_CLK (1 << 7) |
55 | 55 | ||
56 | static int ksz_config_flags(struct phy_device *phydev) | ||
57 | { | ||
58 | int regval; | ||
59 | |||
60 | if (phydev->dev_flags & MICREL_PHY_50MHZ_CLK) { | ||
61 | regval = phy_read(phydev, MII_KSZPHY_CTRL); | ||
62 | regval |= KSZ8051_RMII_50MHZ_CLK; | ||
63 | return phy_write(phydev, MII_KSZPHY_CTRL, regval); | ||
64 | } | ||
65 | return 0; | ||
66 | } | ||
67 | |||
56 | static int kszphy_ack_interrupt(struct phy_device *phydev) | 68 | static int kszphy_ack_interrupt(struct phy_device *phydev) |
57 | { | 69 | { |
58 | /* bit[7..0] int status, which is a read and clear register. */ | 70 | /* bit[7..0] int status, which is a read and clear register. */ |
@@ -114,22 +126,19 @@ static int kszphy_config_init(struct phy_device *phydev) | |||
114 | 126 | ||
115 | static int ksz8021_config_init(struct phy_device *phydev) | 127 | static int ksz8021_config_init(struct phy_device *phydev) |
116 | { | 128 | { |
129 | int rc; | ||
117 | const u16 val = KSZPHY_OMSO_B_CAST_OFF | KSZPHY_OMSO_RMII_OVERRIDE; | 130 | const u16 val = KSZPHY_OMSO_B_CAST_OFF | KSZPHY_OMSO_RMII_OVERRIDE; |
118 | phy_write(phydev, MII_KSZPHY_OMSO, val); | 131 | phy_write(phydev, MII_KSZPHY_OMSO, val); |
119 | return 0; | 132 | rc = ksz_config_flags(phydev); |
133 | return rc < 0 ? rc : 0; | ||
120 | } | 134 | } |
121 | 135 | ||
122 | static int ks8051_config_init(struct phy_device *phydev) | 136 | static int ks8051_config_init(struct phy_device *phydev) |
123 | { | 137 | { |
124 | int regval; | 138 | int rc; |
125 | |||
126 | if (phydev->dev_flags & MICREL_PHY_50MHZ_CLK) { | ||
127 | regval = phy_read(phydev, MII_KSZPHY_CTRL); | ||
128 | regval |= KSZ8051_RMII_50MHZ_CLK; | ||
129 | phy_write(phydev, MII_KSZPHY_CTRL, regval); | ||
130 | } | ||
131 | 139 | ||
132 | return 0; | 140 | rc = ksz_config_flags(phydev); |
141 | return rc < 0 ? rc : 0; | ||
133 | } | 142 | } |
134 | 143 | ||
135 | #define KSZ8873MLL_GLOBAL_CONTROL_4 0x06 | 144 | #define KSZ8873MLL_GLOBAL_CONTROL_4 0x06 |