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authorMugunthan V N <mugunthanvnm@ti.com>2013-06-03 16:10:05 -0400
committerDavid S. Miller <davem@davemloft.net>2013-06-04 17:17:21 -0400
commitea13c9ee855cc60973458d1adeee9b35f0466a29 (patch)
treeb342c04cbc184e80a81f560dbfbfdb164270c630 /drivers/net/phy/at803x.c
parent317420ab2370d7999ec6c324bc30b34dc57fe9d8 (diff)
drivers: net: phy: at803x: seperate wol specific code to wol standard apis
WOL is initilized in phy config_init, but there are standard apis (set_wol/get_wol) for WOL in phy frame work. So this patch moves WOL specific code from config_init to wol standard apis. Cc: Matus Ujhelyi <ujhelyi.m@gmail.com> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/phy/at803x.c')
-rw-r--r--drivers/net/phy/at803x.c64
1 files changed, 48 insertions, 16 deletions
diff --git a/drivers/net/phy/at803x.c b/drivers/net/phy/at803x.c
index a1063e1bfc90..63444b7b7013 100644
--- a/drivers/net/phy/at803x.c
+++ b/drivers/net/phy/at803x.c
@@ -32,10 +32,13 @@ MODULE_DESCRIPTION("Atheros 803x PHY driver");
32MODULE_AUTHOR("Matus Ujhelyi"); 32MODULE_AUTHOR("Matus Ujhelyi");
33MODULE_LICENSE("GPL"); 33MODULE_LICENSE("GPL");
34 34
35static void at803x_set_wol_mac_addr(struct phy_device *phydev) 35static int at803x_set_wol(struct phy_device *phydev,
36 struct ethtool_wolinfo *wol)
36{ 37{
37 struct net_device *ndev = phydev->attached_dev; 38 struct net_device *ndev = phydev->attached_dev;
38 const u8 *mac; 39 const u8 *mac;
40 int ret;
41 u32 value;
39 unsigned int i, offsets[] = { 42 unsigned int i, offsets[] = {
40 AT803X_LOC_MAC_ADDR_32_47_OFFSET, 43 AT803X_LOC_MAC_ADDR_32_47_OFFSET,
41 AT803X_LOC_MAC_ADDR_16_31_OFFSET, 44 AT803X_LOC_MAC_ADDR_16_31_OFFSET,
@@ -43,30 +46,60 @@ static void at803x_set_wol_mac_addr(struct phy_device *phydev)
43 }; 46 };
44 47
45 if (!ndev) 48 if (!ndev)
46 return; 49 return -ENODEV;
47 50
48 mac = (const u8 *) ndev->dev_addr; 51 if (wol->wolopts & WAKE_MAGIC) {
52 mac = (const u8 *) ndev->dev_addr;
49 53
50 if (!is_valid_ether_addr(mac)) 54 if (!is_valid_ether_addr(mac))
51 return; 55 return -EFAULT;
52 56
53 for (i = 0; i < 3; i++) { 57 for (i = 0; i < 3; i++) {
54 phy_write(phydev, AT803X_MMD_ACCESS_CONTROL, 58 phy_write(phydev, AT803X_MMD_ACCESS_CONTROL,
55 AT803X_DEVICE_ADDR); 59 AT803X_DEVICE_ADDR);
56 phy_write(phydev, AT803X_MMD_ACCESS_CONTROL_DATA, 60 phy_write(phydev, AT803X_MMD_ACCESS_CONTROL_DATA,
57 offsets[i]); 61 offsets[i]);
58 phy_write(phydev, AT803X_MMD_ACCESS_CONTROL, 62 phy_write(phydev, AT803X_MMD_ACCESS_CONTROL,
59 AT803X_FUNC_DATA); 63 AT803X_FUNC_DATA);
60 phy_write(phydev, AT803X_MMD_ACCESS_CONTROL_DATA, 64 phy_write(phydev, AT803X_MMD_ACCESS_CONTROL_DATA,
61 mac[(i * 2) + 1] | (mac[(i * 2)] << 8)); 65 mac[(i * 2) + 1] | (mac[(i * 2)] << 8));
66 }
67
68 value = phy_read(phydev, AT803X_INTR_ENABLE);
69 value |= AT803X_WOL_ENABLE;
70 ret = phy_write(phydev, AT803X_INTR_ENABLE, value);
71 if (ret)
72 return ret;
73 value = phy_read(phydev, AT803X_INTR_STATUS);
74 } else {
75 value = phy_read(phydev, AT803X_INTR_ENABLE);
76 value &= (~AT803X_WOL_ENABLE);
77 ret = phy_write(phydev, AT803X_INTR_ENABLE, value);
78 if (ret)
79 return ret;
80 value = phy_read(phydev, AT803X_INTR_STATUS);
62 } 81 }
82
83 return ret;
84}
85
86static void at803x_get_wol(struct phy_device *phydev,
87 struct ethtool_wolinfo *wol)
88{
89 u32 value;
90
91 wol->supported = WAKE_MAGIC;
92 wol->wolopts = 0;
93
94 value = phy_read(phydev, AT803X_INTR_ENABLE);
95 if (value & AT803X_WOL_ENABLE)
96 wol->wolopts |= WAKE_MAGIC;
63} 97}
64 98
65static int at803x_config_init(struct phy_device *phydev) 99static int at803x_config_init(struct phy_device *phydev)
66{ 100{
67 int val; 101 int val;
68 u32 features; 102 u32 features;
69 int status;
70 103
71 features = SUPPORTED_TP | SUPPORTED_MII | SUPPORTED_AUI | 104 features = SUPPORTED_TP | SUPPORTED_MII | SUPPORTED_AUI |
72 SUPPORTED_FIBRE | SUPPORTED_BNC; 105 SUPPORTED_FIBRE | SUPPORTED_BNC;
@@ -100,11 +133,6 @@ static int at803x_config_init(struct phy_device *phydev)
100 phydev->supported = features; 133 phydev->supported = features;
101 phydev->advertising = features; 134 phydev->advertising = features;
102 135
103 /* enable WOL */
104 at803x_set_wol_mac_addr(phydev);
105 status = phy_write(phydev, AT803X_INTR_ENABLE, AT803X_WOL_ENABLE);
106 status = phy_read(phydev, AT803X_INTR_STATUS);
107
108 return 0; 136 return 0;
109} 137}
110 138
@@ -115,6 +143,8 @@ static struct phy_driver at803x_driver[] = {
115 .name = "Atheros 8035 ethernet", 143 .name = "Atheros 8035 ethernet",
116 .phy_id_mask = 0xffffffef, 144 .phy_id_mask = 0xffffffef,
117 .config_init = at803x_config_init, 145 .config_init = at803x_config_init,
146 .set_wol = at803x_set_wol,
147 .get_wol = at803x_get_wol,
118 .features = PHY_GBIT_FEATURES, 148 .features = PHY_GBIT_FEATURES,
119 .flags = PHY_HAS_INTERRUPT, 149 .flags = PHY_HAS_INTERRUPT,
120 .config_aneg = &genphy_config_aneg, 150 .config_aneg = &genphy_config_aneg,
@@ -128,6 +158,8 @@ static struct phy_driver at803x_driver[] = {
128 .name = "Atheros 8030 ethernet", 158 .name = "Atheros 8030 ethernet",
129 .phy_id_mask = 0xffffffef, 159 .phy_id_mask = 0xffffffef,
130 .config_init = at803x_config_init, 160 .config_init = at803x_config_init,
161 .set_wol = at803x_set_wol,
162 .get_wol = at803x_get_wol,
131 .features = PHY_GBIT_FEATURES, 163 .features = PHY_GBIT_FEATURES,
132 .flags = PHY_HAS_INTERRUPT, 164 .flags = PHY_HAS_INTERRUPT,
133 .config_aneg = &genphy_config_aneg, 165 .config_aneg = &genphy_config_aneg,