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authorJoe Perches <joe@perches.com>2009-12-03 02:58:21 -0500
committerDavid S. Miller <davem@davemloft.net>2009-12-03 16:18:01 -0500
commit8e95a2026f3b43f7c3d676adaccd2de9532e8dcc (patch)
tree3733318168cd512480b6db58c5c16d1c8847f0b7 /drivers/net/pcnet32.c
parent3454f835837609d60b29a266e3bd9d701073b060 (diff)
drivers/net: Move && and || to end of previous line
Only files where David Miller is the primary git-signer. wireless, wimax, ixgbe, etc are not modified. Compile tested x86 allyesconfig only Not all files compiled (not x86 compatible) Added a few > 80 column lines, which I ignored. Existing checkpatch complaints ignored. Signed-off-by: Joe Perches <joe@perches.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/pcnet32.c')
-rw-r--r--drivers/net/pcnet32.c20
1 files changed, 10 insertions, 10 deletions
diff --git a/drivers/net/pcnet32.c b/drivers/net/pcnet32.c
index 076f23a10517..dcc67a35e8f2 100644
--- a/drivers/net/pcnet32.c
+++ b/drivers/net/pcnet32.c
@@ -1515,8 +1515,8 @@ static void __devinit pcnet32_probe_vlbus(unsigned int *pcnet32_portlist)
1515 if (request_region 1515 if (request_region
1516 (ioaddr, PCNET32_TOTAL_SIZE, "pcnet32_probe_vlbus")) { 1516 (ioaddr, PCNET32_TOTAL_SIZE, "pcnet32_probe_vlbus")) {
1517 /* check if there is really a pcnet chip on that ioaddr */ 1517 /* check if there is really a pcnet chip on that ioaddr */
1518 if ((inb(ioaddr + 14) == 0x57) 1518 if ((inb(ioaddr + 14) == 0x57) &&
1519 && (inb(ioaddr + 15) == 0x57)) { 1519 (inb(ioaddr + 15) == 0x57)) {
1520 pcnet32_probe1(ioaddr, 0, NULL); 1520 pcnet32_probe1(ioaddr, 0, NULL);
1521 } else { 1521 } else {
1522 release_region(ioaddr, PCNET32_TOTAL_SIZE); 1522 release_region(ioaddr, PCNET32_TOTAL_SIZE);
@@ -1610,8 +1610,8 @@ pcnet32_probe1(unsigned long ioaddr, int shared, struct pci_dev *pdev)
1610 a = &pcnet32_wio; 1610 a = &pcnet32_wio;
1611 } else { 1611 } else {
1612 pcnet32_dwio_reset(ioaddr); 1612 pcnet32_dwio_reset(ioaddr);
1613 if (pcnet32_dwio_read_csr(ioaddr, 0) == 4 1613 if (pcnet32_dwio_read_csr(ioaddr, 0) == 4 &&
1614 && pcnet32_dwio_check(ioaddr)) { 1614 pcnet32_dwio_check(ioaddr)) {
1615 a = &pcnet32_dwio; 1615 a = &pcnet32_dwio;
1616 } else { 1616 } else {
1617 if (pcnet32_debug & NETIF_MSG_PROBE) 1617 if (pcnet32_debug & NETIF_MSG_PROBE)
@@ -1750,8 +1750,8 @@ pcnet32_probe1(unsigned long ioaddr, int shared, struct pci_dev *pdev)
1750 for (i = 0; i < 6; i++) 1750 for (i = 0; i < 6; i++)
1751 promaddr[i] = inb(ioaddr + i); 1751 promaddr[i] = inb(ioaddr + i);
1752 1752
1753 if (memcmp(promaddr, dev->dev_addr, 6) 1753 if (memcmp(promaddr, dev->dev_addr, 6) ||
1754 || !is_valid_ether_addr(dev->dev_addr)) { 1754 !is_valid_ether_addr(dev->dev_addr)) {
1755 if (is_valid_ether_addr(promaddr)) { 1755 if (is_valid_ether_addr(promaddr)) {
1756 if (pcnet32_debug & NETIF_MSG_PROBE) { 1756 if (pcnet32_debug & NETIF_MSG_PROBE) {
1757 printk(" warning: CSR address invalid,\n"); 1757 printk(" warning: CSR address invalid,\n");
@@ -1840,8 +1840,8 @@ pcnet32_probe1(unsigned long ioaddr, int shared, struct pci_dev *pdev)
1840 lp->mii = mii; 1840 lp->mii = mii;
1841 lp->chip_version = chip_version; 1841 lp->chip_version = chip_version;
1842 lp->msg_enable = pcnet32_debug; 1842 lp->msg_enable = pcnet32_debug;
1843 if ((cards_found >= MAX_UNITS) 1843 if ((cards_found >= MAX_UNITS) ||
1844 || (options[cards_found] >= sizeof(options_mapping))) 1844 (options[cards_found] >= sizeof(options_mapping)))
1845 lp->options = PCNET32_PORT_ASEL; 1845 lp->options = PCNET32_PORT_ASEL;
1846 else 1846 else
1847 lp->options = options_mapping[options[cards_found]]; 1847 lp->options = options_mapping[options[cards_found]];
@@ -1866,8 +1866,8 @@ pcnet32_probe1(unsigned long ioaddr, int shared, struct pci_dev *pdev)
1866 goto err_free_ring; 1866 goto err_free_ring;
1867 } 1867 }
1868 /* detect special T1/E1 WAN card by checking for MAC address */ 1868 /* detect special T1/E1 WAN card by checking for MAC address */
1869 if (dev->dev_addr[0] == 0x00 && dev->dev_addr[1] == 0xe0 1869 if (dev->dev_addr[0] == 0x00 && dev->dev_addr[1] == 0xe0 &&
1870 && dev->dev_addr[2] == 0x75) 1870 dev->dev_addr[2] == 0x75)
1871 lp->options = PCNET32_PORT_FD | PCNET32_PORT_GPSI; 1871 lp->options = PCNET32_PORT_FD | PCNET32_PORT_GPSI;
1872 1872
1873 lp->init_block->mode = cpu_to_le16(0x0003); /* Disable Rx and Tx. */ 1873 lp->init_block->mode = cpu_to_le16(0x0003); /* Disable Rx and Tx. */