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authorDominik Brodowski <linux@dominikbrodowski.net>2010-07-24 06:23:21 -0400
committerDominik Brodowski <linux@dominikbrodowski.net>2010-08-03 03:02:35 -0400
commit1d5cc192d431bce2ebe9fde64054ce903200e179 (patch)
treecdcdfb77712349bf46f0876d420e2be81f901d74 /drivers/net/pcmcia
parentac8b422838046ffc26be4874a3cbae0d313f4209 (diff)
pcmcia: use pcmica_{read,write}_config_byte
Use pcmcia_read_config_byte and pcmcia_write_config_byte instead of pcmcia_access_configuration_register. CC: netdev@vger.kernel.org CC: linux-wireless@vger.kernel.org CC: linux-serial@vger.kernel.org CC: Michael Buesch <mb@bu3sch.de> Signed-off-by: Dominik Brodowski <linux@dominikbrodowski.net>
Diffstat (limited to 'drivers/net/pcmcia')
-rw-r--r--drivers/net/pcmcia/axnet_cs.c3
-rw-r--r--drivers/net/pcmcia/nmclan_cs.c21
-rw-r--r--drivers/net/pcmcia/xirc2ps_cs.c16
3 files changed, 14 insertions, 26 deletions
diff --git a/drivers/net/pcmcia/axnet_cs.c b/drivers/net/pcmcia/axnet_cs.c
index 467fd4bfb2bd..ee0a6d036f94 100644
--- a/drivers/net/pcmcia/axnet_cs.c
+++ b/drivers/net/pcmcia/axnet_cs.c
@@ -378,8 +378,7 @@ static int axnet_config(struct pcmcia_device *link)
378 /* Maybe PHY is in power down mode. (PPD_SET = 1) 378 /* Maybe PHY is in power down mode. (PPD_SET = 1)
379 Bit 2 of CCSR is active low. */ 379 Bit 2 of CCSR is active low. */
380 if (i == 32) { 380 if (i == 32) {
381 conf_reg_t reg = { 0, CS_WRITE, CISREG_CCSR, 0x04 }; 381 pcmcia_write_config_byte(link, CISREG_CCSR, 0x04);
382 pcmcia_access_configuration_register(link, &reg);
383 for (i = 0; i < 32; i++) { 382 for (i = 0; i < 32; i++) {
384 j = mdio_read(dev->base_addr + AXNET_MII_EEP, i, 1); 383 j = mdio_read(dev->base_addr + AXNET_MII_EEP, i, 1);
385 j2 = mdio_read(dev->base_addr + AXNET_MII_EEP, i, 2); 384 j2 = mdio_read(dev->base_addr + AXNET_MII_EEP, i, 2);
diff --git a/drivers/net/pcmcia/nmclan_cs.c b/drivers/net/pcmcia/nmclan_cs.c
index c0eacfae1512..c0d85af3e942 100644
--- a/drivers/net/pcmcia/nmclan_cs.c
+++ b/drivers/net/pcmcia/nmclan_cs.c
@@ -757,29 +757,20 @@ static void nmclan_reset(struct net_device *dev)
757 757
758#if RESET_XILINX 758#if RESET_XILINX
759 struct pcmcia_device *link = &lp->link; 759 struct pcmcia_device *link = &lp->link;
760 conf_reg_t reg; 760 u8 OrigCorValue;
761 u_long OrigCorValue;
762 761
763 /* Save original COR value */ 762 /* Save original COR value */
764 reg.Function = 0; 763 pcmcia_read_config_byte(link, CISREG_COR, &OrigCorValue);
765 reg.Action = CS_READ;
766 reg.Offset = CISREG_COR;
767 reg.Value = 0;
768 pcmcia_access_configuration_register(link, &reg);
769 OrigCorValue = reg.Value;
770 764
771 /* Reset Xilinx */ 765 /* Reset Xilinx */
772 reg.Action = CS_WRITE; 766 dev_dbg(&link->dev, "nmclan_reset: OrigCorValue=0x%x, resetting...\n",
773 reg.Offset = CISREG_COR;
774 dev_dbg(&link->dev, "nmclan_reset: OrigCorValue=0x%lX, resetting...\n",
775 OrigCorValue); 767 OrigCorValue);
776 reg.Value = COR_SOFT_RESET; 768 pcmcia_write_config_byte(link, CISREG_COR, COR_SOFT_RESET);
777 pcmcia_access_configuration_register(link, &reg);
778 /* Need to wait for 20 ms for PCMCIA to finish reset. */ 769 /* Need to wait for 20 ms for PCMCIA to finish reset. */
779 770
780 /* Restore original COR configuration index */ 771 /* Restore original COR configuration index */
781 reg.Value = COR_LEVEL_REQ | (OrigCorValue & COR_CONFIG_MASK); 772 pcmcia_write_config_byte(link, CISREG_COR,
782 pcmcia_access_configuration_register(link, &reg); 773 (COR_LEVEL_REQ | (OrigCorValue & COR_CONFIG_MASK)));
783 /* Xilinx is now completely reset along with the MACE chip. */ 774 /* Xilinx is now completely reset along with the MACE chip. */
784 lp->tx_free_frames=AM2150_MAX_TX_FRAMES; 775 lp->tx_free_frames=AM2150_MAX_TX_FRAMES;
785 776
diff --git a/drivers/net/pcmcia/xirc2ps_cs.c b/drivers/net/pcmcia/xirc2ps_cs.c
index a7662f0832eb..e3a85ce89880 100644
--- a/drivers/net/pcmcia/xirc2ps_cs.c
+++ b/drivers/net/pcmcia/xirc2ps_cs.c
@@ -869,7 +869,6 @@ xirc2ps_config(struct pcmcia_device * link)
869 goto config_error; 869 goto config_error;
870 870
871 if (local->dingo) { 871 if (local->dingo) {
872 conf_reg_t reg;
873 win_req_t req; 872 win_req_t req;
874 memreq_t mem; 873 memreq_t mem;
875 874
@@ -878,15 +877,14 @@ xirc2ps_config(struct pcmcia_device * link)
878 * the base address of the ethernet port (BasePort1) is written 877 * the base address of the ethernet port (BasePort1) is written
879 * to the BAR registers of the modem. 878 * to the BAR registers of the modem.
880 */ 879 */
881 reg.Action = CS_WRITE; 880 err = pcmcia_write_config_byte(link, CISREG_IOBASE_0,
882 reg.Offset = CISREG_IOBASE_0; 881 link->io.BasePort2 & 0xff);
883 reg.Value = link->io.BasePort2 & 0xff; 882 if (err)
884 if ((err = pcmcia_access_configuration_register(link, &reg)))
885 goto config_error; 883 goto config_error;
886 reg.Action = CS_WRITE; 884
887 reg.Offset = CISREG_IOBASE_1; 885 err = pcmcia_write_config_byte(link, CISREG_IOBASE_1,
888 reg.Value = (link->io.BasePort2 >> 8) & 0xff; 886 (link->io.BasePort2 >> 8) & 0xff);
889 if ((err = pcmcia_access_configuration_register(link, &reg))) 887 if (err)
890 goto config_error; 888 goto config_error;
891 889
892 /* There is no config entry for the Ethernet part which 890 /* There is no config entry for the Ethernet part which