diff options
author | Joe Perches <joe@perches.com> | 2010-02-17 10:01:55 -0500 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2010-02-17 20:45:21 -0500 |
commit | 9cd31f078ee8b8dd68bbb39680b5c9a51f85f1ea (patch) | |
tree | 8fcc18a518d482b79d7ad7282cee7342dc5e538f /drivers/net/pci-skeleton.c | |
parent | ddf79b20eefd27797ce461411679a48e998701ca (diff) |
drivers/net/pci-skeleton.c: Use (pr|netdev|netif)_<level> macro helpers
Add #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
Remove #define PFX
Use pr_<level>
Use netdev_<level>
Use netif_<level>
Checkpatch cleaning
Convert formats like 0x%08x to %#08x
Remove periods from formats
Coalesce long formats
Use print_hex_dump
Signed-off-by: Joe Perches <joe@perches.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/pci-skeleton.c')
-rw-r--r-- | drivers/net/pci-skeleton.c | 1019 |
1 files changed, 503 insertions, 516 deletions
diff --git a/drivers/net/pci-skeleton.c b/drivers/net/pci-skeleton.c index bbdf0398c93f..11d4398eac94 100644 --- a/drivers/net/pci-skeleton.c +++ b/drivers/net/pci-skeleton.c | |||
@@ -11,7 +11,7 @@ | |||
11 | 11 | ||
12 | -----<snip>----- | 12 | -----<snip>----- |
13 | 13 | ||
14 | Written 1997-2000 by Donald Becker. | 14 | Written 1997-2000 by Donald Becker. |
15 | This software may be used and distributed according to the | 15 | This software may be used and distributed according to the |
16 | terms of the GNU General Public License (GPL), incorporated | 16 | terms of the GNU General Public License (GPL), incorporated |
17 | herein by reference. Drivers based on or derived from this | 17 | herein by reference. Drivers based on or derived from this |
@@ -85,6 +85,8 @@ IVc. Errata | |||
85 | 85 | ||
86 | */ | 86 | */ |
87 | 87 | ||
88 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt | ||
89 | |||
88 | #include <linux/module.h> | 90 | #include <linux/module.h> |
89 | #include <linux/kernel.h> | 91 | #include <linux/kernel.h> |
90 | #include <linux/pci.h> | 92 | #include <linux/pci.h> |
@@ -96,16 +98,15 @@ IVc. Errata | |||
96 | #include <linux/ethtool.h> | 98 | #include <linux/ethtool.h> |
97 | #include <linux/mii.h> | 99 | #include <linux/mii.h> |
98 | #include <linux/crc32.h> | 100 | #include <linux/crc32.h> |
99 | #include <asm/io.h> | 101 | #include <linux/io.h> |
100 | 102 | ||
101 | #define NETDRV_VERSION "1.0.1" | 103 | #define NETDRV_VERSION "1.0.1" |
102 | #define MODNAME "netdrv" | 104 | #define MODNAME "netdrv" |
103 | #define NETDRV_DRIVER_LOAD_MSG "MyVendor Fast Ethernet driver " NETDRV_VERSION " loaded" | 105 | #define NETDRV_DRIVER_LOAD_MSG "MyVendor Fast Ethernet driver " NETDRV_VERSION " loaded" |
104 | #define PFX MODNAME ": " | ||
105 | 106 | ||
106 | static char version[] __devinitdata = | 107 | static char version[] __devinitdata = |
107 | KERN_INFO NETDRV_DRIVER_LOAD_MSG "\n" | 108 | KERN_INFO NETDRV_DRIVER_LOAD_MSG "\n" |
108 | " Support available from http://foo.com/bar/baz.html\n"; | 109 | " Support available from http://foo.com/bar/baz.html\n"; |
109 | 110 | ||
110 | /* define to 1 to enable PIO instead of MMIO */ | 111 | /* define to 1 to enable PIO instead of MMIO */ |
111 | #undef USE_IO_OPS | 112 | #undef USE_IO_OPS |
@@ -119,19 +120,24 @@ KERN_INFO NETDRV_DRIVER_LOAD_MSG "\n" | |||
119 | 120 | ||
120 | #ifdef NETDRV_DEBUG | 121 | #ifdef NETDRV_DEBUG |
121 | /* note: prints function name for you */ | 122 | /* note: prints function name for you */ |
122 | # define DPRINTK(fmt, args...) printk(KERN_DEBUG "%s: " fmt, __func__ , ## args) | 123 | #define DPRINTK(fmt, args...) \ |
124 | printk(KERN_DEBUG "%s: " fmt, __func__ , ## args) | ||
123 | #else | 125 | #else |
124 | # define DPRINTK(fmt, args...) | 126 | #define DPRINTK(fmt, args...) \ |
127 | do { \ | ||
128 | if (0) \ | ||
129 | printk(KERN_DEBUG fmt, ##args); \ | ||
130 | } while (0) | ||
125 | #endif | 131 | #endif |
126 | 132 | ||
127 | #ifdef NETDRV_NDEBUG | 133 | #ifdef NETDRV_NDEBUG |
128 | # define assert(expr) do {} while (0) | 134 | #define assert(expr) do {} while (0) |
129 | #else | 135 | #else |
130 | # define assert(expr) \ | 136 | #define assert(expr) \ |
131 | if(!(expr)) { \ | 137 | if (!(expr)) { \ |
132 | printk( "Assertion failed! %s,%s,%s,line=%d\n", \ | 138 | printk("Assertion failed! %s,%s,%s,line=%d\n", \ |
133 | #expr,__FILE__,__func__,__LINE__); \ | 139 | #expr, __FILE__, __func__, __LINE__); \ |
134 | } | 140 | } |
135 | #endif | 141 | #endif |
136 | 142 | ||
137 | 143 | ||
@@ -148,10 +154,10 @@ static int multicast_filter_limit = 32; | |||
148 | 154 | ||
149 | /* Size of the in-memory receive ring. */ | 155 | /* Size of the in-memory receive ring. */ |
150 | #define RX_BUF_LEN_IDX 2 /* 0==8K, 1==16K, 2==32K, 3==64K */ | 156 | #define RX_BUF_LEN_IDX 2 /* 0==8K, 1==16K, 2==32K, 3==64K */ |
151 | #define RX_BUF_LEN (8192 << RX_BUF_LEN_IDX) | 157 | #define RX_BUF_LEN (8192 << RX_BUF_LEN_IDX) |
152 | #define RX_BUF_PAD 16 | 158 | #define RX_BUF_PAD 16 |
153 | #define RX_BUF_WRAP_PAD 2048 /* spare padding to handle lack of packet wrap */ | 159 | #define RX_BUF_WRAP_PAD 2048 /* spare padding to handle lack of packet wrap */ |
154 | #define RX_BUF_TOT_LEN (RX_BUF_LEN + RX_BUF_PAD + RX_BUF_WRAP_PAD) | 160 | #define RX_BUF_TOT_LEN (RX_BUF_LEN + RX_BUF_PAD + RX_BUF_WRAP_PAD) |
155 | 161 | ||
156 | /* Number of Tx descriptor registers. */ | 162 | /* Number of Tx descriptor registers. */ |
157 | #define NUM_TX_DESC 4 | 163 | #define NUM_TX_DESC 4 |
@@ -165,9 +171,11 @@ static int multicast_filter_limit = 32; | |||
165 | 171 | ||
166 | /* PCI Tuning Parameters | 172 | /* PCI Tuning Parameters |
167 | Threshold is bytes transferred to chip before transmission starts. */ | 173 | Threshold is bytes transferred to chip before transmission starts. */ |
168 | #define TX_FIFO_THRESH 256 /* In bytes, rounded down to 32 byte units. */ | 174 | #define TX_FIFO_THRESH 256 /* In bytes, rounded down to 32 byte units. */ |
169 | 175 | ||
170 | /* The following settings are log_2(bytes)-4: 0 == 16 bytes .. 6==1024, 7==end of packet. */ | 176 | /* The following settings are log_2(bytes)-4: |
177 | 0==16 bytes 1==32 2==64 3==128 4==256 5==512 6==1024 7==end of packet. | ||
178 | */ | ||
171 | #define RX_FIFO_THRESH 6 /* Rx buffer level before first PCI xfer. */ | 179 | #define RX_FIFO_THRESH 6 /* Rx buffer level before first PCI xfer. */ |
172 | #define RX_DMA_BURST 6 /* Maximum PCI burst, '6' is 1024 */ | 180 | #define RX_DMA_BURST 6 /* Maximum PCI burst, '6' is 1024 */ |
173 | #define TX_DMA_BURST 6 /* Maximum PCI burst, '6' is 1024 */ | 181 | #define TX_DMA_BURST 6 /* Maximum PCI burst, '6' is 1024 */ |
@@ -175,8 +183,7 @@ static int multicast_filter_limit = 32; | |||
175 | 183 | ||
176 | /* Operational parameters that usually are not changed. */ | 184 | /* Operational parameters that usually are not changed. */ |
177 | /* Time in jiffies before concluding the transmitter is hung. */ | 185 | /* Time in jiffies before concluding the transmitter is hung. */ |
178 | #define TX_TIMEOUT (6*HZ) | 186 | #define TX_TIMEOUT (6 * HZ) |
179 | |||
180 | 187 | ||
181 | enum { | 188 | enum { |
182 | HAS_CHIP_XCVR = 0x020000, | 189 | HAS_CHIP_XCVR = 0x020000, |
@@ -186,7 +193,7 @@ enum { | |||
186 | #define NETDRV_MIN_IO_SIZE 0x80 | 193 | #define NETDRV_MIN_IO_SIZE 0x80 |
187 | #define RTL8139B_IO_SIZE 256 | 194 | #define RTL8139B_IO_SIZE 256 |
188 | 195 | ||
189 | #define NETDRV_CAPS HAS_CHIP_XCVR|HAS_LNK_CHNG | 196 | #define NETDRV_CAPS (HAS_CHIP_XCVR | HAS_LNK_CHNG) |
190 | 197 | ||
191 | typedef enum { | 198 | typedef enum { |
192 | RTL8139 = 0, | 199 | RTL8139 = 0, |
@@ -220,7 +227,7 @@ static DEFINE_PCI_DEVICE_TABLE(netdrv_pci_tbl) = { | |||
220 | {0x4033, 0x1360, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ADDTRON8139 }, | 227 | {0x4033, 0x1360, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ADDTRON8139 }, |
221 | {0,} | 228 | {0,} |
222 | }; | 229 | }; |
223 | MODULE_DEVICE_TABLE (pci, netdrv_pci_tbl); | 230 | MODULE_DEVICE_TABLE(pci, netdrv_pci_tbl); |
224 | 231 | ||
225 | 232 | ||
226 | /* The rest of these values should never change. */ | 233 | /* The rest of these values should never change. */ |
@@ -270,7 +277,7 @@ enum NETDRV_registers { | |||
270 | enum ClearBitMasks { | 277 | enum ClearBitMasks { |
271 | MultiIntrClear = 0xF000, | 278 | MultiIntrClear = 0xF000, |
272 | ChipCmdClear = 0xE2, | 279 | ChipCmdClear = 0xE2, |
273 | Config1Clear = (1<<7)|(1<<6)|(1<<3)|(1<<2)|(1<<1), | 280 | Config1Clear = (1 << 7) | (1 << 6) | (1 << 3) | (1 << 2) | (1 << 1), |
274 | }; | 281 | }; |
275 | 282 | ||
276 | enum ChipCmdBits { | 283 | enum ChipCmdBits { |
@@ -329,7 +336,7 @@ enum tx_config_bits { | |||
329 | TxLoopBack = (1 << 18) | (1 << 17), /* enable loopback test mode */ | 336 | TxLoopBack = (1 << 18) | (1 << 17), /* enable loopback test mode */ |
330 | TxCRC = (1 << 16), /* DISABLE appending CRC to end of Tx packets */ | 337 | TxCRC = (1 << 16), /* DISABLE appending CRC to end of Tx packets */ |
331 | TxClearAbt = (1 << 0), /* Clear abort (WO) */ | 338 | TxClearAbt = (1 << 0), /* Clear abort (WO) */ |
332 | TxDMAShift = 8, /* DMA burst value (0-7) is shift this many bits */ | 339 | TxDMAShift = 8, /* DMA burst value(0-7) is shift this many bits */ |
333 | 340 | ||
334 | TxVersionMask = 0x7C800000, /* mask out version bits 30-26, 23 */ | 341 | TxVersionMask = 0x7C800000, /* mask out version bits 30-26, 23 */ |
335 | }; | 342 | }; |
@@ -481,41 +488,44 @@ struct netdrv_private { | |||
481 | chip_t chipset; | 488 | chip_t chipset; |
482 | }; | 489 | }; |
483 | 490 | ||
484 | MODULE_AUTHOR ("Jeff Garzik <jgarzik@pobox.com>"); | 491 | MODULE_AUTHOR("Jeff Garzik <jgarzik@pobox.com>"); |
485 | MODULE_DESCRIPTION ("Skeleton for a PCI Fast Ethernet driver"); | 492 | MODULE_DESCRIPTION("Skeleton for a PCI Fast Ethernet driver"); |
486 | MODULE_LICENSE("GPL"); | 493 | MODULE_LICENSE("GPL"); |
487 | module_param(multicast_filter_limit, int, 0); | 494 | module_param(multicast_filter_limit, int, 0); |
488 | module_param(max_interrupt_work, int, 0); | 495 | module_param(max_interrupt_work, int, 0); |
489 | module_param_array(media, int, NULL, 0); | 496 | module_param_array(media, int, NULL, 0); |
490 | MODULE_PARM_DESC (multicast_filter_limit, "pci-skeleton maximum number of filtered multicast addresses"); | 497 | MODULE_PARM_DESC(multicast_filter_limit, |
491 | MODULE_PARM_DESC (max_interrupt_work, "pci-skeleton maximum events handled per interrupt"); | 498 | MODNAME " maximum number of filtered multicast addresses"); |
492 | MODULE_PARM_DESC (media, "pci-skeleton: Bits 0-3: media type, bit 17: full duplex"); | 499 | MODULE_PARM_DESC(max_interrupt_work, |
493 | 500 | MODNAME " maximum events handled per interrupt"); | |
494 | static int read_eeprom (void *ioaddr, int location, int addr_len); | 501 | MODULE_PARM_DESC(media, |
495 | static int netdrv_open (struct net_device *dev); | 502 | MODNAME " Bits 0-3: media type, bit 17: full duplex"); |
496 | static int mdio_read (struct net_device *dev, int phy_id, int location); | 503 | |
497 | static void mdio_write (struct net_device *dev, int phy_id, int location, | 504 | static int read_eeprom(void *ioaddr, int location, int addr_len); |
498 | int val); | 505 | static int netdrv_open(struct net_device *dev); |
499 | static void netdrv_timer (unsigned long data); | 506 | static int mdio_read(struct net_device *dev, int phy_id, int location); |
500 | static void netdrv_tx_timeout (struct net_device *dev); | 507 | static void mdio_write(struct net_device *dev, int phy_id, int location, |
501 | static void netdrv_init_ring (struct net_device *dev); | 508 | int val); |
502 | static int netdrv_start_xmit (struct sk_buff *skb, | 509 | static void netdrv_timer(unsigned long data); |
503 | struct net_device *dev); | 510 | static void netdrv_tx_timeout(struct net_device *dev); |
504 | static irqreturn_t netdrv_interrupt (int irq, void *dev_instance); | 511 | static void netdrv_init_ring(struct net_device *dev); |
505 | static int netdrv_close (struct net_device *dev); | 512 | static int netdrv_start_xmit(struct sk_buff *skb, |
506 | static int netdrv_ioctl (struct net_device *dev, struct ifreq *rq, int cmd); | 513 | struct net_device *dev); |
507 | static void netdrv_set_rx_mode (struct net_device *dev); | 514 | static irqreturn_t netdrv_interrupt(int irq, void *dev_instance); |
508 | static void netdrv_hw_start (struct net_device *dev); | 515 | static int netdrv_close(struct net_device *dev); |
516 | static int netdrv_ioctl(struct net_device *dev, struct ifreq *rq, int cmd); | ||
517 | static void netdrv_set_rx_mode(struct net_device *dev); | ||
518 | static void netdrv_hw_start(struct net_device *dev); | ||
509 | 519 | ||
510 | 520 | ||
511 | #ifdef USE_IO_OPS | 521 | #ifdef USE_IO_OPS |
512 | 522 | ||
513 | #define NETDRV_R8(reg) inb (((unsigned long)ioaddr) + (reg)) | 523 | #define NETDRV_R8(reg) inb(((unsigned long)ioaddr) + (reg)) |
514 | #define NETDRV_R16(reg) inw (((unsigned long)ioaddr) + (reg)) | 524 | #define NETDRV_R16(reg) inw(((unsigned long)ioaddr) + (reg)) |
515 | #define NETDRV_R32(reg) ((unsigned long) inl (((unsigned long)ioaddr) + (reg))) | 525 | #define NETDRV_R32(reg) ((unsigned long)inl(((unsigned long)ioaddr) + (reg))) |
516 | #define NETDRV_W8(reg, val8) outb ((val8), ((unsigned long)ioaddr) + (reg)) | 526 | #define NETDRV_W8(reg, val8) outb((val8), ((unsigned long)ioaddr) + (reg)) |
517 | #define NETDRV_W16(reg, val16) outw ((val16), ((unsigned long)ioaddr) + (reg)) | 527 | #define NETDRV_W16(reg, val16) outw((val16), ((unsigned long)ioaddr) + (reg)) |
518 | #define NETDRV_W32(reg, val32) outl ((val32), ((unsigned long)ioaddr) + (reg)) | 528 | #define NETDRV_W32(reg, val32) outl((val32), ((unsigned long)ioaddr) + (reg)) |
519 | #define NETDRV_W8_F NETDRV_W8 | 529 | #define NETDRV_W8_F NETDRV_W8 |
520 | #define NETDRV_W16_F NETDRV_W16 | 530 | #define NETDRV_W16_F NETDRV_W16 |
521 | #define NETDRV_W32_F NETDRV_W32 | 531 | #define NETDRV_W32_F NETDRV_W32 |
@@ -528,25 +538,37 @@ static void netdrv_hw_start (struct net_device *dev); | |||
528 | #define readb(addr) inb((unsigned long)(addr)) | 538 | #define readb(addr) inb((unsigned long)(addr)) |
529 | #define readw(addr) inw((unsigned long)(addr)) | 539 | #define readw(addr) inw((unsigned long)(addr)) |
530 | #define readl(addr) inl((unsigned long)(addr)) | 540 | #define readl(addr) inl((unsigned long)(addr)) |
531 | #define writeb(val,addr) outb((val),(unsigned long)(addr)) | 541 | #define writeb(val, addr) outb((val), (unsigned long)(addr)) |
532 | #define writew(val,addr) outw((val),(unsigned long)(addr)) | 542 | #define writew(val, addr) outw((val), (unsigned long)(addr)) |
533 | #define writel(val,addr) outl((val),(unsigned long)(addr)) | 543 | #define writel(val, addr) outl((val), (unsigned long)(addr)) |
534 | 544 | ||
535 | #else | 545 | #else |
536 | 546 | ||
537 | /* write MMIO register, with flush */ | 547 | /* write MMIO register, with flush */ |
538 | /* Flush avoids rtl8139 bug w/ posted MMIO writes */ | 548 | /* Flush avoids rtl8139 bug w/ posted MMIO writes */ |
539 | #define NETDRV_W8_F(reg, val8) do { writeb ((val8), ioaddr + (reg)); readb (ioaddr + (reg)); } while (0) | 549 | #define NETDRV_W8_F(reg, val8) \ |
540 | #define NETDRV_W16_F(reg, val16) do { writew ((val16), ioaddr + (reg)); readw (ioaddr + (reg)); } while (0) | 550 | do { \ |
541 | #define NETDRV_W32_F(reg, val32) do { writel ((val32), ioaddr + (reg)); readl (ioaddr + (reg)); } while (0) | 551 | writeb((val8), ioaddr + (reg)); \ |
552 | readb(ioaddr + (reg)); \ | ||
553 | } while (0) | ||
554 | #define NETDRV_W16_F(reg, val16) \ | ||
555 | do { \ | ||
556 | writew((val16), ioaddr + (reg)); \ | ||
557 | readw(ioaddr + (reg)); \ | ||
558 | } while (0) | ||
559 | #define NETDRV_W32_F(reg, val32) \ | ||
560 | do { \ | ||
561 | writel((val32), ioaddr + (reg)); \ | ||
562 | readl(ioaddr + (reg)); \ | ||
563 | } while (0) | ||
542 | 564 | ||
543 | 565 | ||
544 | #ifdef MMIO_FLUSH_AUDIT_COMPLETE | 566 | #ifdef MMIO_FLUSH_AUDIT_COMPLETE |
545 | 567 | ||
546 | /* write MMIO register */ | 568 | /* write MMIO register */ |
547 | #define NETDRV_W8(reg, val8) writeb ((val8), ioaddr + (reg)) | 569 | #define NETDRV_W8(reg, val8) writeb((val8), ioaddr + (reg)) |
548 | #define NETDRV_W16(reg, val16) writew ((val16), ioaddr + (reg)) | 570 | #define NETDRV_W16(reg, val16) writew((val16), ioaddr + (reg)) |
549 | #define NETDRV_W32(reg, val32) writel ((val32), ioaddr + (reg)) | 571 | #define NETDRV_W32(reg, val32) writel((val32), ioaddr + (reg)) |
550 | 572 | ||
551 | #else | 573 | #else |
552 | 574 | ||
@@ -558,9 +580,9 @@ static void netdrv_hw_start (struct net_device *dev); | |||
558 | #endif /* MMIO_FLUSH_AUDIT_COMPLETE */ | 580 | #endif /* MMIO_FLUSH_AUDIT_COMPLETE */ |
559 | 581 | ||
560 | /* read MMIO register */ | 582 | /* read MMIO register */ |
561 | #define NETDRV_R8(reg) readb (ioaddr + (reg)) | 583 | #define NETDRV_R8(reg) readb(ioaddr + (reg)) |
562 | #define NETDRV_R16(reg) readw (ioaddr + (reg)) | 584 | #define NETDRV_R16(reg) readw(ioaddr + (reg)) |
563 | #define NETDRV_R32(reg) ((unsigned long) readl (ioaddr + (reg))) | 585 | #define NETDRV_R32(reg) ((unsigned long) readl(ioaddr + (reg))) |
564 | 586 | ||
565 | #endif /* USE_IO_OPS */ | 587 | #endif /* USE_IO_OPS */ |
566 | 588 | ||
@@ -570,14 +592,14 @@ static const u16 netdrv_intr_mask = | |||
570 | TxErr | TxOK | RxErr | RxOK; | 592 | TxErr | TxOK | RxErr | RxOK; |
571 | 593 | ||
572 | static const unsigned int netdrv_rx_config = | 594 | static const unsigned int netdrv_rx_config = |
573 | RxCfgEarlyRxNone | RxCfgRcv32K | RxNoWrap | | 595 | RxCfgEarlyRxNone | RxCfgRcv32K | RxNoWrap | |
574 | (RX_FIFO_THRESH << RxCfgFIFOShift) | | 596 | (RX_FIFO_THRESH << RxCfgFIFOShift) | |
575 | (RX_DMA_BURST << RxCfgDMAShift); | 597 | (RX_DMA_BURST << RxCfgDMAShift); |
576 | 598 | ||
577 | 599 | ||
578 | static int __devinit netdrv_init_board (struct pci_dev *pdev, | 600 | static int __devinit netdrv_init_board(struct pci_dev *pdev, |
579 | struct net_device **dev_out, | 601 | struct net_device **dev_out, |
580 | void **ioaddr_out) | 602 | void **ioaddr_out) |
581 | { | 603 | { |
582 | void *ioaddr = NULL; | 604 | void *ioaddr = NULL; |
583 | struct net_device *dev; | 605 | struct net_device *dev; |
@@ -587,43 +609,43 @@ static int __devinit netdrv_init_board (struct pci_dev *pdev, | |||
587 | unsigned long mmio_start, mmio_end, mmio_flags, mmio_len; | 609 | unsigned long mmio_start, mmio_end, mmio_flags, mmio_len; |
588 | u32 tmp; | 610 | u32 tmp; |
589 | 611 | ||
590 | DPRINTK ("ENTER\n"); | 612 | DPRINTK("ENTER\n"); |
591 | 613 | ||
592 | assert (pdev != NULL); | 614 | assert(pdev != NULL); |
593 | assert (ioaddr_out != NULL); | 615 | assert(ioaddr_out != NULL); |
594 | 616 | ||
595 | *ioaddr_out = NULL; | 617 | *ioaddr_out = NULL; |
596 | *dev_out = NULL; | 618 | *dev_out = NULL; |
597 | 619 | ||
598 | /* dev zeroed in alloc_etherdev */ | 620 | /* dev zeroed in alloc_etherdev */ |
599 | dev = alloc_etherdev (sizeof (*tp)); | 621 | dev = alloc_etherdev(sizeof(*tp)); |
600 | if (dev == NULL) { | 622 | if (dev == NULL) { |
601 | dev_err(&pdev->dev, "unable to alloc new ethernet\n"); | 623 | dev_err(&pdev->dev, "unable to alloc new ethernet\n"); |
602 | DPRINTK ("EXIT, returning -ENOMEM\n"); | 624 | DPRINTK("EXIT, returning -ENOMEM\n"); |
603 | return -ENOMEM; | 625 | return -ENOMEM; |
604 | } | 626 | } |
605 | SET_NETDEV_DEV(dev, &pdev->dev); | 627 | SET_NETDEV_DEV(dev, &pdev->dev); |
606 | tp = netdev_priv(dev); | 628 | tp = netdev_priv(dev); |
607 | 629 | ||
608 | /* enable device (incl. PCI PM wakeup), and bus-mastering */ | 630 | /* enable device(incl. PCI PM wakeup), and bus-mastering */ |
609 | rc = pci_enable_device (pdev); | 631 | rc = pci_enable_device(pdev); |
610 | if (rc) | 632 | if (rc) |
611 | goto err_out; | 633 | goto err_out; |
612 | 634 | ||
613 | pio_start = pci_resource_start (pdev, 0); | 635 | pio_start = pci_resource_start(pdev, 0); |
614 | pio_end = pci_resource_end (pdev, 0); | 636 | pio_end = pci_resource_end(pdev, 0); |
615 | pio_flags = pci_resource_flags (pdev, 0); | 637 | pio_flags = pci_resource_flags(pdev, 0); |
616 | pio_len = pci_resource_len (pdev, 0); | 638 | pio_len = pci_resource_len(pdev, 0); |
617 | 639 | ||
618 | mmio_start = pci_resource_start (pdev, 1); | 640 | mmio_start = pci_resource_start(pdev, 1); |
619 | mmio_end = pci_resource_end (pdev, 1); | 641 | mmio_end = pci_resource_end(pdev, 1); |
620 | mmio_flags = pci_resource_flags (pdev, 1); | 642 | mmio_flags = pci_resource_flags(pdev, 1); |
621 | mmio_len = pci_resource_len (pdev, 1); | 643 | mmio_len = pci_resource_len(pdev, 1); |
622 | 644 | ||
623 | /* set this immediately, we need to know before | 645 | /* set this immediately, we need to know before |
624 | * we talk to the chip directly */ | 646 | * we talk to the chip directly */ |
625 | DPRINTK("PIO region size == 0x%02X\n", pio_len); | 647 | DPRINTK("PIO region size == %#02X\n", pio_len); |
626 | DPRINTK("MMIO region size == 0x%02lX\n", mmio_len); | 648 | DPRINTK("MMIO region size == %#02lX\n", mmio_len); |
627 | 649 | ||
628 | /* make sure PCI base addr 0 is PIO */ | 650 | /* make sure PCI base addr 0 is PIO */ |
629 | if (!(pio_flags & IORESOURCE_IO)) { | 651 | if (!(pio_flags & IORESOURCE_IO)) { |
@@ -647,17 +669,17 @@ static int __devinit netdrv_init_board (struct pci_dev *pdev, | |||
647 | goto err_out; | 669 | goto err_out; |
648 | } | 670 | } |
649 | 671 | ||
650 | rc = pci_request_regions (pdev, MODNAME); | 672 | rc = pci_request_regions(pdev, MODNAME); |
651 | if (rc) | 673 | if (rc) |
652 | goto err_out; | 674 | goto err_out; |
653 | 675 | ||
654 | pci_set_master (pdev); | 676 | pci_set_master(pdev); |
655 | 677 | ||
656 | #ifdef USE_IO_OPS | 678 | #ifdef USE_IO_OPS |
657 | ioaddr = (void *) pio_start; | 679 | ioaddr = (void *)pio_start; |
658 | #else | 680 | #else |
659 | /* ioremap MMIO region */ | 681 | /* ioremap MMIO region */ |
660 | ioaddr = ioremap (mmio_start, mmio_len); | 682 | ioaddr = ioremap(mmio_start, mmio_len); |
661 | if (ioaddr == NULL) { | 683 | if (ioaddr == NULL) { |
662 | dev_err(&pdev->dev, "cannot remap MMIO, aborting\n"); | 684 | dev_err(&pdev->dev, "cannot remap MMIO, aborting\n"); |
663 | rc = -EIO; | 685 | rc = -EIO; |
@@ -666,52 +688,50 @@ static int __devinit netdrv_init_board (struct pci_dev *pdev, | |||
666 | #endif /* USE_IO_OPS */ | 688 | #endif /* USE_IO_OPS */ |
667 | 689 | ||
668 | /* Soft reset the chip. */ | 690 | /* Soft reset the chip. */ |
669 | NETDRV_W8 (ChipCmd, (NETDRV_R8 (ChipCmd) & ChipCmdClear) | CmdReset); | 691 | NETDRV_W8(ChipCmd, (NETDRV_R8(ChipCmd) & ChipCmdClear) | CmdReset); |
670 | 692 | ||
671 | /* Check that the chip has finished the reset. */ | 693 | /* Check that the chip has finished the reset. */ |
672 | for (i = 1000; i > 0; i--) | 694 | for (i = 1000; i > 0; i--) |
673 | if ((NETDRV_R8 (ChipCmd) & CmdReset) == 0) | 695 | if ((NETDRV_R8(ChipCmd) & CmdReset) == 0) |
674 | break; | 696 | break; |
675 | else | 697 | else |
676 | udelay (10); | 698 | udelay(10); |
677 | 699 | ||
678 | /* Bring the chip out of low-power mode. */ | 700 | /* Bring the chip out of low-power mode. */ |
679 | /* <insert device-specific code here> */ | 701 | /* <insert device-specific code here> */ |
680 | 702 | ||
681 | #ifndef USE_IO_OPS | 703 | #ifndef USE_IO_OPS |
682 | /* sanity checks -- ensure PIO and MMIO registers agree */ | 704 | /* sanity checks -- ensure PIO and MMIO registers agree */ |
683 | assert (inb (pio_start+Config0) == readb (ioaddr+Config0)); | 705 | assert(inb(pio_start+Config0) == readb(ioaddr+Config0)); |
684 | assert (inb (pio_start+Config1) == readb (ioaddr+Config1)); | 706 | assert(inb(pio_start+Config1) == readb(ioaddr+Config1)); |
685 | assert (inb (pio_start+TxConfig) == readb (ioaddr+TxConfig)); | 707 | assert(inb(pio_start+TxConfig) == readb(ioaddr+TxConfig)); |
686 | assert (inb (pio_start+RxConfig) == readb (ioaddr+RxConfig)); | 708 | assert(inb(pio_start+RxConfig) == readb(ioaddr+RxConfig)); |
687 | #endif /* !USE_IO_OPS */ | 709 | #endif /* !USE_IO_OPS */ |
688 | 710 | ||
689 | /* identify chip attached to board */ | 711 | /* identify chip attached to board */ |
690 | tmp = NETDRV_R8 (ChipVersion); | 712 | tmp = NETDRV_R8(ChipVersion); |
691 | for (i = ARRAY_SIZE (rtl_chip_info) - 1; i >= 0; i--) | 713 | for (i = ARRAY_SIZE(rtl_chip_info) - 1; i >= 0; i--) |
692 | if (tmp == rtl_chip_info[i].version) { | 714 | if (tmp == rtl_chip_info[i].version) { |
693 | tp->chipset = i; | 715 | tp->chipset = i; |
694 | goto match; | 716 | goto match; |
695 | } | 717 | } |
696 | 718 | ||
697 | /* if unknown chip, assume array element #0, original RTL-8139 in this case */ | 719 | /* if unknown chip, assume array element #0, original RTL-8139 in this case */ |
698 | dev_printk (KERN_DEBUG, &pdev->dev, | 720 | dev_printk(KERN_DEBUG, &pdev->dev, |
699 | "unknown chip version, assuming RTL-8139\n"); | 721 | "unknown chip version, assuming RTL-8139\n"); |
700 | dev_printk (KERN_DEBUG, &pdev->dev, "TxConfig = 0x%lx\n", | 722 | dev_printk(KERN_DEBUG, &pdev->dev, "TxConfig = %#lx\n", |
701 | NETDRV_R32 (TxConfig)); | 723 | NETDRV_R32(TxConfig)); |
702 | tp->chipset = 0; | 724 | tp->chipset = 0; |
703 | 725 | ||
704 | match: | 726 | match: |
705 | DPRINTK ("chipset id (%d) == index %d, '%s'\n", | 727 | DPRINTK("chipset id(%d) == index %d, '%s'\n", |
706 | tmp, | 728 | tmp, tp->chipset, rtl_chip_info[tp->chipset].name); |
707 | tp->chipset, | ||
708 | rtl_chip_info[tp->chipset].name); | ||
709 | 729 | ||
710 | rc = register_netdev (dev); | 730 | rc = register_netdev(dev); |
711 | if (rc) | 731 | if (rc) |
712 | goto err_out_unmap; | 732 | goto err_out_unmap; |
713 | 733 | ||
714 | DPRINTK ("EXIT, returning 0\n"); | 734 | DPRINTK("EXIT, returning 0\n"); |
715 | *ioaddr_out = ioaddr; | 735 | *ioaddr_out = ioaddr; |
716 | *dev_out = dev; | 736 | *dev_out = dev; |
717 | return 0; | 737 | return 0; |
@@ -721,10 +741,10 @@ err_out_unmap: | |||
721 | iounmap(ioaddr); | 741 | iounmap(ioaddr); |
722 | err_out_free_res: | 742 | err_out_free_res: |
723 | #endif | 743 | #endif |
724 | pci_release_regions (pdev); | 744 | pci_release_regions(pdev); |
725 | err_out: | 745 | err_out: |
726 | free_netdev (dev); | 746 | free_netdev(dev); |
727 | DPRINTK ("EXIT, returning %d\n", rc); | 747 | DPRINTK("EXIT, returning %d\n", rc); |
728 | return rc; | 748 | return rc; |
729 | } | 749 | } |
730 | 750 | ||
@@ -740,8 +760,8 @@ static const struct net_device_ops netdrv_netdev_ops = { | |||
740 | .ndo_set_mac_address = eth_mac_addr, | 760 | .ndo_set_mac_address = eth_mac_addr, |
741 | }; | 761 | }; |
742 | 762 | ||
743 | static int __devinit netdrv_init_one (struct pci_dev *pdev, | 763 | static int __devinit netdrv_init_one(struct pci_dev *pdev, |
744 | const struct pci_device_id *ent) | 764 | const struct pci_device_id *ent) |
745 | { | 765 | { |
746 | struct net_device *dev = NULL; | 766 | struct net_device *dev = NULL; |
747 | struct netdrv_private *tp; | 767 | struct netdrv_private *tp; |
@@ -756,29 +776,29 @@ static int __devinit netdrv_init_one (struct pci_dev *pdev, | |||
756 | printk(version); | 776 | printk(version); |
757 | #endif | 777 | #endif |
758 | 778 | ||
759 | DPRINTK ("ENTER\n"); | 779 | DPRINTK("ENTER\n"); |
760 | 780 | ||
761 | assert (pdev != NULL); | 781 | assert(pdev != NULL); |
762 | assert (ent != NULL); | 782 | assert(ent != NULL); |
763 | 783 | ||
764 | board_idx++; | 784 | board_idx++; |
765 | 785 | ||
766 | i = netdrv_init_board (pdev, &dev, &ioaddr); | 786 | i = netdrv_init_board(pdev, &dev, &ioaddr); |
767 | if (i < 0) { | 787 | if (i < 0) { |
768 | DPRINTK ("EXIT, returning %d\n", i); | 788 | DPRINTK("EXIT, returning %d\n", i); |
769 | return i; | 789 | return i; |
770 | } | 790 | } |
771 | 791 | ||
772 | tp = netdev_priv(dev); | 792 | tp = netdev_priv(dev); |
773 | 793 | ||
774 | assert (ioaddr != NULL); | 794 | assert(ioaddr != NULL); |
775 | assert (dev != NULL); | 795 | assert(dev != NULL); |
776 | assert (tp != NULL); | 796 | assert(tp != NULL); |
777 | 797 | ||
778 | addr_len = read_eeprom (ioaddr, 0, 8) == 0x8129 ? 8 : 6; | 798 | addr_len = read_eeprom(ioaddr, 0, 8) == 0x8129 ? 8 : 6; |
779 | for (i = 0; i < 3; i++) | 799 | for (i = 0; i < 3; i++) |
780 | ((u16 *) (dev->dev_addr))[i] = | 800 | ((u16 *)(dev->dev_addr))[i] = |
781 | le16_to_cpu (read_eeprom (ioaddr, i + 7, addr_len)); | 801 | le16_to_cpu(read_eeprom(ioaddr, i + 7, addr_len)); |
782 | 802 | ||
783 | dev->netdev_ops = &netdrv_netdev_ops; | 803 | dev->netdev_ops = &netdrv_netdev_ops; |
784 | dev->watchdog_timeo = TX_TIMEOUT; | 804 | dev->watchdog_timeo = TX_TIMEOUT; |
@@ -791,7 +811,7 @@ static int __devinit netdrv_init_one (struct pci_dev *pdev, | |||
791 | 811 | ||
792 | /* note: tp->chipset set in netdrv_init_board */ | 812 | /* note: tp->chipset set in netdrv_init_board */ |
793 | tp->drv_flags = PCI_COMMAND_IO | PCI_COMMAND_MEMORY | | 813 | tp->drv_flags = PCI_COMMAND_IO | PCI_COMMAND_MEMORY | |
794 | PCI_COMMAND_MASTER | NETDRV_CAPS; | 814 | PCI_COMMAND_MASTER | NETDRV_CAPS; |
795 | tp->pci_dev = pdev; | 815 | tp->pci_dev = pdev; |
796 | tp->board = ent->driver_data; | 816 | tp->board = ent->driver_data; |
797 | tp->mmio_addr = ioaddr; | 817 | tp->mmio_addr = ioaddr; |
@@ -801,18 +821,15 @@ static int __devinit netdrv_init_one (struct pci_dev *pdev, | |||
801 | 821 | ||
802 | tp->phys[0] = 32; | 822 | tp->phys[0] = 32; |
803 | 823 | ||
804 | printk (KERN_INFO "%s: %s at 0x%lx, %pM IRQ %d\n", | 824 | netdev_info(dev, "%s at %#lx, %pM IRQ %d\n", |
805 | dev->name, | 825 | board_info[ent->driver_data].name, |
806 | board_info[ent->driver_data].name, | 826 | dev->base_addr, dev->dev_addr, dev->irq); |
807 | dev->base_addr, | ||
808 | dev->dev_addr, | ||
809 | dev->irq); | ||
810 | 827 | ||
811 | printk (KERN_DEBUG "%s: Identified 8139 chip type '%s'\n", | 828 | netdev_printk(KERN_DEBUG, dev, "Identified 8139 chip type '%s'\n", |
812 | dev->name, rtl_chip_info[tp->chipset].name); | 829 | rtl_chip_info[tp->chipset].name); |
813 | 830 | ||
814 | /* Put the chip into low-power mode. */ | 831 | /* Put the chip into low-power mode. */ |
815 | NETDRV_W8_F (Cfg9346, Cfg9346_Unlock); | 832 | NETDRV_W8_F(Cfg9346, Cfg9346_Unlock); |
816 | 833 | ||
817 | /* The lower four bits are the media type. */ | 834 | /* The lower four bits are the media type. */ |
818 | option = (board_idx > 7) ? 0 : media[board_idx]; | 835 | option = (board_idx > 7) ? 0 : media[board_idx]; |
@@ -824,45 +841,43 @@ static int __devinit netdrv_init_one (struct pci_dev *pdev, | |||
824 | } | 841 | } |
825 | 842 | ||
826 | if (tp->full_duplex) { | 843 | if (tp->full_duplex) { |
827 | printk (KERN_INFO | 844 | netdev_info(dev, "Media type forced to Full Duplex\n"); |
828 | "%s: Media type forced to Full Duplex.\n", | 845 | mdio_write(dev, tp->phys[0], MII_ADVERTISE, ADVERTISE_FULL); |
829 | dev->name); | ||
830 | mdio_write (dev, tp->phys[0], MII_ADVERTISE, ADVERTISE_FULL); | ||
831 | tp->duplex_lock = 1; | 846 | tp->duplex_lock = 1; |
832 | } | 847 | } |
833 | 848 | ||
834 | DPRINTK ("EXIT - returning 0\n"); | 849 | DPRINTK("EXIT - returning 0\n"); |
835 | return 0; | 850 | return 0; |
836 | } | 851 | } |
837 | 852 | ||
838 | 853 | ||
839 | static void __devexit netdrv_remove_one (struct pci_dev *pdev) | 854 | static void __devexit netdrv_remove_one(struct pci_dev *pdev) |
840 | { | 855 | { |
841 | struct net_device *dev = pci_get_drvdata (pdev); | 856 | struct net_device *dev = pci_get_drvdata(pdev); |
842 | struct netdrv_private *np; | 857 | struct netdrv_private *np; |
843 | 858 | ||
844 | DPRINTK ("ENTER\n"); | 859 | DPRINTK("ENTER\n"); |
845 | 860 | ||
846 | assert (dev != NULL); | 861 | assert(dev != NULL); |
847 | 862 | ||
848 | np = netdev_priv(dev); | 863 | np = netdev_priv(dev); |
849 | assert (np != NULL); | 864 | assert(np != NULL); |
850 | 865 | ||
851 | unregister_netdev (dev); | 866 | unregister_netdev(dev); |
852 | 867 | ||
853 | #ifndef USE_IO_OPS | 868 | #ifndef USE_IO_OPS |
854 | iounmap (np->mmio_addr); | 869 | iounmap(np->mmio_addr); |
855 | #endif /* !USE_IO_OPS */ | 870 | #endif /* !USE_IO_OPS */ |
856 | 871 | ||
857 | pci_release_regions (pdev); | 872 | pci_release_regions(pdev); |
858 | 873 | ||
859 | free_netdev (dev); | 874 | free_netdev(dev); |
860 | 875 | ||
861 | pci_set_drvdata (pdev, NULL); | 876 | pci_set_drvdata(pdev, NULL); |
862 | 877 | ||
863 | pci_disable_device (pdev); | 878 | pci_disable_device(pdev); |
864 | 879 | ||
865 | DPRINTK ("EXIT\n"); | 880 | DPRINTK("EXIT\n"); |
866 | } | 881 | } |
867 | 882 | ||
868 | 883 | ||
@@ -870,63 +885,63 @@ static void __devexit netdrv_remove_one (struct pci_dev *pdev) | |||
870 | 885 | ||
871 | /* EEPROM_Ctrl bits. */ | 886 | /* EEPROM_Ctrl bits. */ |
872 | #define EE_SHIFT_CLK 0x04 /* EEPROM shift clock. */ | 887 | #define EE_SHIFT_CLK 0x04 /* EEPROM shift clock. */ |
873 | #define EE_CS 0x08 /* EEPROM chip select. */ | 888 | #define EE_CS 0x08 /* EEPROM chip select. */ |
874 | #define EE_DATA_WRITE 0x02 /* EEPROM chip data in. */ | 889 | #define EE_DATA_WRITE 0x02 /* EEPROM chip data in. */ |
875 | #define EE_WRITE_0 0x00 | 890 | #define EE_WRITE_0 0x00 |
876 | #define EE_WRITE_1 0x02 | 891 | #define EE_WRITE_1 0x02 |
877 | #define EE_DATA_READ 0x01 /* EEPROM chip data out. */ | 892 | #define EE_DATA_READ 0x01 /* EEPROM chip data out. */ |
878 | #define EE_ENB (0x80 | EE_CS) | 893 | #define EE_ENB (0x80 | EE_CS) |
879 | 894 | ||
880 | /* Delay between EEPROM clock transitions. | 895 | /* Delay between EEPROM clock transitions. |
881 | No extra delay is needed with 33Mhz PCI, but 66Mhz may change this. | 896 | No extra delay is needed with 33Mhz PCI, but 66Mhz may change this. |
882 | */ | 897 | */ |
883 | 898 | ||
884 | #define eeprom_delay() readl(ee_addr) | 899 | #define eeprom_delay() readl(ee_addr) |
885 | 900 | ||
886 | /* The EEPROM commands include the alway-set leading bit. */ | 901 | /* The EEPROM commands include the alway-set leading bit. */ |
887 | #define EE_WRITE_CMD (5) | 902 | #define EE_WRITE_CMD (5) |
888 | #define EE_READ_CMD (6) | 903 | #define EE_READ_CMD (6) |
889 | #define EE_ERASE_CMD (7) | 904 | #define EE_ERASE_CMD (7) |
890 | 905 | ||
891 | static int __devinit read_eeprom (void *ioaddr, int location, int addr_len) | 906 | static int __devinit read_eeprom(void *ioaddr, int location, int addr_len) |
892 | { | 907 | { |
893 | int i; | 908 | int i; |
894 | unsigned retval = 0; | 909 | unsigned retval = 0; |
895 | void *ee_addr = ioaddr + Cfg9346; | 910 | void *ee_addr = ioaddr + Cfg9346; |
896 | int read_cmd = location | (EE_READ_CMD << addr_len); | 911 | int read_cmd = location | (EE_READ_CMD << addr_len); |
897 | 912 | ||
898 | DPRINTK ("ENTER\n"); | 913 | DPRINTK("ENTER\n"); |
899 | 914 | ||
900 | writeb (EE_ENB & ~EE_CS, ee_addr); | 915 | writeb(EE_ENB & ~EE_CS, ee_addr); |
901 | writeb (EE_ENB, ee_addr); | 916 | writeb(EE_ENB, ee_addr); |
902 | eeprom_delay (); | 917 | eeprom_delay(); |
903 | 918 | ||
904 | /* Shift the read command bits out. */ | 919 | /* Shift the read command bits out. */ |
905 | for (i = 4 + addr_len; i >= 0; i--) { | 920 | for (i = 4 + addr_len; i >= 0; i--) { |
906 | int dataval = (read_cmd & (1 << i)) ? EE_DATA_WRITE : 0; | 921 | int dataval = (read_cmd & (1 << i)) ? EE_DATA_WRITE : 0; |
907 | writeb (EE_ENB | dataval, ee_addr); | 922 | writeb(EE_ENB | dataval, ee_addr); |
908 | eeprom_delay (); | 923 | eeprom_delay(); |
909 | writeb (EE_ENB | dataval | EE_SHIFT_CLK, ee_addr); | 924 | writeb(EE_ENB | dataval | EE_SHIFT_CLK, ee_addr); |
910 | eeprom_delay (); | 925 | eeprom_delay(); |
911 | } | 926 | } |
912 | writeb (EE_ENB, ee_addr); | 927 | writeb(EE_ENB, ee_addr); |
913 | eeprom_delay (); | 928 | eeprom_delay(); |
914 | 929 | ||
915 | for (i = 16; i > 0; i--) { | 930 | for (i = 16; i > 0; i--) { |
916 | writeb (EE_ENB | EE_SHIFT_CLK, ee_addr); | 931 | writeb(EE_ENB | EE_SHIFT_CLK, ee_addr); |
917 | eeprom_delay (); | 932 | eeprom_delay(); |
918 | retval = | 933 | retval = |
919 | (retval << 1) | ((readb (ee_addr) & EE_DATA_READ) ? 1 : | 934 | (retval << 1) | ((readb(ee_addr) & EE_DATA_READ) ? 1 : |
920 | 0); | 935 | 0); |
921 | writeb (EE_ENB, ee_addr); | 936 | writeb(EE_ENB, ee_addr); |
922 | eeprom_delay (); | 937 | eeprom_delay(); |
923 | } | 938 | } |
924 | 939 | ||
925 | /* Terminate the EEPROM access. */ | 940 | /* Terminate the EEPROM access. */ |
926 | writeb (~EE_CS, ee_addr); | 941 | writeb(~EE_CS, ee_addr); |
927 | eeprom_delay (); | 942 | eeprom_delay(); |
928 | 943 | ||
929 | DPRINTK ("EXIT - returning %d\n", retval); | 944 | DPRINTK("EXIT - returning %d\n", retval); |
930 | return retval; | 945 | return retval; |
931 | } | 946 | } |
932 | 947 | ||
@@ -936,12 +951,12 @@ static int __devinit read_eeprom (void *ioaddr, int location, int addr_len) | |||
936 | The maximum data clock rate is 2.5 Mhz. The minimum timing is usually | 951 | The maximum data clock rate is 2.5 Mhz. The minimum timing is usually |
937 | met by back-to-back PCI I/O cycles, but we insert a delay to avoid | 952 | met by back-to-back PCI I/O cycles, but we insert a delay to avoid |
938 | "overclocking" issues. */ | 953 | "overclocking" issues. */ |
939 | #define MDIO_DIR 0x80 | 954 | #define MDIO_DIR 0x80 |
940 | #define MDIO_DATA_OUT 0x04 | 955 | #define MDIO_DATA_OUT 0x04 |
941 | #define MDIO_DATA_IN 0x02 | 956 | #define MDIO_DATA_IN 0x02 |
942 | #define MDIO_CLK 0x01 | 957 | #define MDIO_CLK 0x01 |
943 | #define MDIO_WRITE0 (MDIO_DIR) | 958 | #define MDIO_WRITE0 (MDIO_DIR) |
944 | #define MDIO_WRITE1 (MDIO_DIR | MDIO_DATA_OUT) | 959 | #define MDIO_WRITE1 (MDIO_DIR | MDIO_DATA_OUT) |
945 | 960 | ||
946 | #define mdio_delay() readb(mdio_addr) | 961 | #define mdio_delay() readb(mdio_addr) |
947 | 962 | ||
@@ -959,24 +974,24 @@ static char mii_2_8139_map[8] = { | |||
959 | 974 | ||
960 | 975 | ||
961 | /* Syncronize the MII management interface by shifting 32 one bits out. */ | 976 | /* Syncronize the MII management interface by shifting 32 one bits out. */ |
962 | static void mdio_sync (void *mdio_addr) | 977 | static void mdio_sync(void *mdio_addr) |
963 | { | 978 | { |
964 | int i; | 979 | int i; |
965 | 980 | ||
966 | DPRINTK ("ENTER\n"); | 981 | DPRINTK("ENTER\n"); |
967 | 982 | ||
968 | for (i = 32; i >= 0; i--) { | 983 | for (i = 32; i >= 0; i--) { |
969 | writeb (MDIO_WRITE1, mdio_addr); | 984 | writeb(MDIO_WRITE1, mdio_addr); |
970 | mdio_delay (); | 985 | mdio_delay(); |
971 | writeb (MDIO_WRITE1 | MDIO_CLK, mdio_addr); | 986 | writeb(MDIO_WRITE1 | MDIO_CLK, mdio_addr); |
972 | mdio_delay (); | 987 | mdio_delay(); |
973 | } | 988 | } |
974 | 989 | ||
975 | DPRINTK ("EXIT\n"); | 990 | DPRINTK("EXIT\n"); |
976 | } | 991 | } |
977 | 992 | ||
978 | 993 | ||
979 | static int mdio_read (struct net_device *dev, int phy_id, int location) | 994 | static int mdio_read(struct net_device *dev, int phy_id, int location) |
980 | { | 995 | { |
981 | struct netdrv_private *tp = netdev_priv(dev); | 996 | struct netdrv_private *tp = netdev_priv(dev); |
982 | void *mdio_addr = tp->mmio_addr + Config4; | 997 | void *mdio_addr = tp->mmio_addr + Config4; |
@@ -984,97 +999,94 @@ static int mdio_read (struct net_device *dev, int phy_id, int location) | |||
984 | int retval = 0; | 999 | int retval = 0; |
985 | int i; | 1000 | int i; |
986 | 1001 | ||
987 | DPRINTK ("ENTER\n"); | 1002 | DPRINTK("ENTER\n"); |
988 | 1003 | ||
989 | if (phy_id > 31) { /* Really a 8139. Use internal registers. */ | 1004 | if (phy_id > 31) { /* Really a 8139. Use internal registers. */ |
990 | DPRINTK ("EXIT after directly using 8139 internal regs\n"); | 1005 | DPRINTK("EXIT after directly using 8139 internal regs\n"); |
991 | return location < 8 && mii_2_8139_map[location] ? | 1006 | return location < 8 && mii_2_8139_map[location] ? |
992 | readw (tp->mmio_addr + mii_2_8139_map[location]) : 0; | 1007 | readw(tp->mmio_addr + mii_2_8139_map[location]) : 0; |
993 | } | 1008 | } |
994 | mdio_sync (mdio_addr); | 1009 | mdio_sync(mdio_addr); |
995 | /* Shift the read command bits out. */ | 1010 | /* Shift the read command bits out. */ |
996 | for (i = 15; i >= 0; i--) { | 1011 | for (i = 15; i >= 0; i--) { |
997 | int dataval = (mii_cmd & (1 << i)) ? MDIO_DATA_OUT : 0; | 1012 | int dataval = (mii_cmd & (1 << i)) ? MDIO_DATA_OUT : 0; |
998 | 1013 | ||
999 | writeb (MDIO_DIR | dataval, mdio_addr); | 1014 | writeb(MDIO_DIR | dataval, mdio_addr); |
1000 | mdio_delay (); | 1015 | mdio_delay(); |
1001 | writeb (MDIO_DIR | dataval | MDIO_CLK, mdio_addr); | 1016 | writeb(MDIO_DIR | dataval | MDIO_CLK, mdio_addr); |
1002 | mdio_delay (); | 1017 | mdio_delay(); |
1003 | } | 1018 | } |
1004 | 1019 | ||
1005 | /* Read the two transition, 16 data, and wire-idle bits. */ | 1020 | /* Read the two transition, 16 data, and wire-idle bits. */ |
1006 | for (i = 19; i > 0; i--) { | 1021 | for (i = 19; i > 0; i--) { |
1007 | writeb (0, mdio_addr); | 1022 | writeb(0, mdio_addr); |
1008 | mdio_delay (); | 1023 | mdio_delay(); |
1009 | retval = | 1024 | retval = ((retval << 1) | ((readb(mdio_addr) & MDIO_DATA_IN)) |
1010 | (retval << 1) | ((readb (mdio_addr) & MDIO_DATA_IN) ? 1 | 1025 | ? 1 : 0); |
1011 | : 0); | 1026 | writeb(MDIO_CLK, mdio_addr); |
1012 | writeb (MDIO_CLK, mdio_addr); | 1027 | mdio_delay(); |
1013 | mdio_delay (); | ||
1014 | } | 1028 | } |
1015 | 1029 | ||
1016 | DPRINTK ("EXIT, returning %d\n", (retval >> 1) & 0xffff); | 1030 | DPRINTK("EXIT, returning %d\n", (retval >> 1) & 0xffff); |
1017 | return (retval >> 1) & 0xffff; | 1031 | return (retval >> 1) & 0xffff; |
1018 | } | 1032 | } |
1019 | 1033 | ||
1020 | 1034 | ||
1021 | static void mdio_write (struct net_device *dev, int phy_id, int location, | 1035 | static void mdio_write(struct net_device *dev, int phy_id, int location, |
1022 | int value) | 1036 | int value) |
1023 | { | 1037 | { |
1024 | struct netdrv_private *tp = netdev_priv(dev); | 1038 | struct netdrv_private *tp = netdev_priv(dev); |
1025 | void *mdio_addr = tp->mmio_addr + Config4; | 1039 | void *mdio_addr = tp->mmio_addr + Config4; |
1026 | int mii_cmd = | 1040 | int mii_cmd = |
1027 | (0x5002 << 16) | (phy_id << 23) | (location << 18) | value; | 1041 | (0x5002 << 16) | (phy_id << 23) | (location << 18) | value; |
1028 | int i; | 1042 | int i; |
1029 | 1043 | ||
1030 | DPRINTK ("ENTER\n"); | 1044 | DPRINTK("ENTER\n"); |
1031 | 1045 | ||
1032 | if (phy_id > 31) { /* Really a 8139. Use internal registers. */ | 1046 | if (phy_id > 31) { /* Really a 8139. Use internal registers. */ |
1033 | if (location < 8 && mii_2_8139_map[location]) { | 1047 | if (location < 8 && mii_2_8139_map[location]) { |
1034 | writew (value, | 1048 | writew(value, |
1035 | tp->mmio_addr + mii_2_8139_map[location]); | 1049 | tp->mmio_addr + mii_2_8139_map[location]); |
1036 | readw (tp->mmio_addr + mii_2_8139_map[location]); | 1050 | readw(tp->mmio_addr + mii_2_8139_map[location]); |
1037 | } | 1051 | } |
1038 | DPRINTK ("EXIT after directly using 8139 internal regs\n"); | 1052 | DPRINTK("EXIT after directly using 8139 internal regs\n"); |
1039 | return; | 1053 | return; |
1040 | } | 1054 | } |
1041 | mdio_sync (mdio_addr); | 1055 | mdio_sync(mdio_addr); |
1042 | 1056 | ||
1043 | /* Shift the command bits out. */ | 1057 | /* Shift the command bits out. */ |
1044 | for (i = 31; i >= 0; i--) { | 1058 | for (i = 31; i >= 0; i--) { |
1045 | int dataval = | 1059 | int dataval = |
1046 | (mii_cmd & (1 << i)) ? MDIO_WRITE1 : MDIO_WRITE0; | 1060 | (mii_cmd & (1 << i)) ? MDIO_WRITE1 : MDIO_WRITE0; |
1047 | writeb (dataval, mdio_addr); | 1061 | writeb(dataval, mdio_addr); |
1048 | mdio_delay (); | 1062 | mdio_delay(); |
1049 | writeb (dataval | MDIO_CLK, mdio_addr); | 1063 | writeb(dataval | MDIO_CLK, mdio_addr); |
1050 | mdio_delay (); | 1064 | mdio_delay(); |
1051 | } | 1065 | } |
1052 | 1066 | ||
1053 | /* Clear out extra bits. */ | 1067 | /* Clear out extra bits. */ |
1054 | for (i = 2; i > 0; i--) { | 1068 | for (i = 2; i > 0; i--) { |
1055 | writeb (0, mdio_addr); | 1069 | writeb(0, mdio_addr); |
1056 | mdio_delay (); | 1070 | mdio_delay(); |
1057 | writeb (MDIO_CLK, mdio_addr); | 1071 | writeb(MDIO_CLK, mdio_addr); |
1058 | mdio_delay (); | 1072 | mdio_delay(); |
1059 | } | 1073 | } |
1060 | 1074 | ||
1061 | DPRINTK ("EXIT\n"); | 1075 | DPRINTK("EXIT\n"); |
1062 | } | 1076 | } |
1063 | 1077 | ||
1064 | 1078 | ||
1065 | static int netdrv_open (struct net_device *dev) | 1079 | static int netdrv_open(struct net_device *dev) |
1066 | { | 1080 | { |
1067 | struct netdrv_private *tp = netdev_priv(dev); | 1081 | struct netdrv_private *tp = netdev_priv(dev); |
1068 | int retval; | 1082 | int retval; |
1069 | #ifdef NETDRV_DEBUG | ||
1070 | void *ioaddr = tp->mmio_addr; | 1083 | void *ioaddr = tp->mmio_addr; |
1071 | #endif | ||
1072 | 1084 | ||
1073 | DPRINTK ("ENTER\n"); | 1085 | DPRINTK("ENTER\n"); |
1074 | 1086 | ||
1075 | retval = request_irq (dev->irq, netdrv_interrupt, IRQF_SHARED, dev->name, dev); | 1087 | retval = request_irq(dev->irq, netdrv_interrupt, IRQF_SHARED, dev->name, dev); |
1076 | if (retval) { | 1088 | if (retval) { |
1077 | DPRINTK ("EXIT, returning %d\n", retval); | 1089 | DPRINTK("EXIT, returning %d\n", retval); |
1078 | return retval; | 1090 | return retval; |
1079 | } | 1091 | } |
1080 | 1092 | ||
@@ -1092,7 +1104,7 @@ static int netdrv_open (struct net_device *dev) | |||
1092 | pci_free_consistent(tp->pci_dev, RX_BUF_TOT_LEN, | 1104 | pci_free_consistent(tp->pci_dev, RX_BUF_TOT_LEN, |
1093 | tp->rx_ring, tp->rx_ring_dma); | 1105 | tp->rx_ring, tp->rx_ring_dma); |
1094 | 1106 | ||
1095 | DPRINTK ("EXIT, returning -ENOMEM\n"); | 1107 | DPRINTK("EXIT, returning -ENOMEM\n"); |
1096 | return -ENOMEM; | 1108 | return -ENOMEM; |
1097 | 1109 | ||
1098 | } | 1110 | } |
@@ -1100,109 +1112,108 @@ static int netdrv_open (struct net_device *dev) | |||
1100 | tp->full_duplex = tp->duplex_lock; | 1112 | tp->full_duplex = tp->duplex_lock; |
1101 | tp->tx_flag = (TX_FIFO_THRESH << 11) & 0x003f0000; | 1113 | tp->tx_flag = (TX_FIFO_THRESH << 11) & 0x003f0000; |
1102 | 1114 | ||
1103 | netdrv_init_ring (dev); | 1115 | netdrv_init_ring(dev); |
1104 | netdrv_hw_start (dev); | 1116 | netdrv_hw_start(dev); |
1105 | 1117 | ||
1106 | DPRINTK ("%s: netdrv_open() ioaddr %#lx IRQ %d" | 1118 | netdev_dbg(dev, "ioaddr %#llx IRQ %d GP Pins %02x %s-duplex\n", |
1107 | " GP Pins %2.2x %s-duplex.\n", | 1119 | (unsigned long long)pci_resource_start(tp->pci_dev, 1), |
1108 | dev->name, pci_resource_start (tp->pci_dev, 1), | 1120 | dev->irq, NETDRV_R8(MediaStatus), |
1109 | dev->irq, NETDRV_R8 (MediaStatus), | 1121 | tp->full_duplex ? "full" : "half"); |
1110 | tp->full_duplex ? "full" : "half"); | ||
1111 | 1122 | ||
1112 | /* Set the timer to switch to check for link beat and perhaps switch | 1123 | /* Set the timer to switch to check for link beat and perhaps switch |
1113 | to an alternate media type. */ | 1124 | to an alternate media type. */ |
1114 | init_timer (&tp->timer); | 1125 | init_timer(&tp->timer); |
1115 | tp->timer.expires = jiffies + 3 * HZ; | 1126 | tp->timer.expires = jiffies + 3 * HZ; |
1116 | tp->timer.data = (unsigned long) dev; | 1127 | tp->timer.data = (unsigned long) dev; |
1117 | tp->timer.function = &netdrv_timer; | 1128 | tp->timer.function = &netdrv_timer; |
1118 | add_timer (&tp->timer); | 1129 | add_timer(&tp->timer); |
1119 | 1130 | ||
1120 | DPRINTK ("EXIT, returning 0\n"); | 1131 | DPRINTK("EXIT, returning 0\n"); |
1121 | return 0; | 1132 | return 0; |
1122 | } | 1133 | } |
1123 | 1134 | ||
1124 | 1135 | ||
1125 | /* Start the hardware at open or resume. */ | 1136 | /* Start the hardware at open or resume. */ |
1126 | static void netdrv_hw_start (struct net_device *dev) | 1137 | static void netdrv_hw_start(struct net_device *dev) |
1127 | { | 1138 | { |
1128 | struct netdrv_private *tp = netdev_priv(dev); | 1139 | struct netdrv_private *tp = netdev_priv(dev); |
1129 | void *ioaddr = tp->mmio_addr; | 1140 | void *ioaddr = tp->mmio_addr; |
1130 | u32 i; | 1141 | u32 i; |
1131 | 1142 | ||
1132 | DPRINTK ("ENTER\n"); | 1143 | DPRINTK("ENTER\n"); |
1133 | 1144 | ||
1134 | /* Soft reset the chip. */ | 1145 | /* Soft reset the chip. */ |
1135 | NETDRV_W8 (ChipCmd, (NETDRV_R8 (ChipCmd) & ChipCmdClear) | CmdReset); | 1146 | NETDRV_W8(ChipCmd, (NETDRV_R8(ChipCmd) & ChipCmdClear) | CmdReset); |
1136 | udelay (100); | 1147 | udelay(100); |
1137 | 1148 | ||
1138 | /* Check that the chip has finished the reset. */ | 1149 | /* Check that the chip has finished the reset. */ |
1139 | for (i = 1000; i > 0; i--) | 1150 | for (i = 1000; i > 0; i--) |
1140 | if ((NETDRV_R8 (ChipCmd) & CmdReset) == 0) | 1151 | if ((NETDRV_R8(ChipCmd) & CmdReset) == 0) |
1141 | break; | 1152 | break; |
1142 | 1153 | ||
1143 | /* Restore our idea of the MAC address. */ | 1154 | /* Restore our idea of the MAC address. */ |
1144 | NETDRV_W32_F (MAC0 + 0, cpu_to_le32 (*(u32 *) (dev->dev_addr + 0))); | 1155 | NETDRV_W32_F(MAC0 + 0, cpu_to_le32(*(u32 *)(dev->dev_addr + 0))); |
1145 | NETDRV_W32_F (MAC0 + 4, cpu_to_le32 (*(u32 *) (dev->dev_addr + 4))); | 1156 | NETDRV_W32_F(MAC0 + 4, cpu_to_le32(*(u32 *)(dev->dev_addr + 4))); |
1146 | 1157 | ||
1147 | /* Must enable Tx/Rx before setting transfer thresholds! */ | 1158 | /* Must enable Tx/Rx before setting transfer thresholds! */ |
1148 | NETDRV_W8_F (ChipCmd, (NETDRV_R8 (ChipCmd) & ChipCmdClear) | | 1159 | NETDRV_W8_F(ChipCmd, (NETDRV_R8(ChipCmd) & ChipCmdClear) | |
1149 | CmdRxEnb | CmdTxEnb); | 1160 | CmdRxEnb | CmdTxEnb); |
1150 | 1161 | ||
1151 | i = netdrv_rx_config | | 1162 | i = netdrv_rx_config | |
1152 | (NETDRV_R32 (RxConfig) & rtl_chip_info[tp->chipset].RxConfigMask); | 1163 | (NETDRV_R32(RxConfig) & rtl_chip_info[tp->chipset].RxConfigMask); |
1153 | NETDRV_W32_F (RxConfig, i); | 1164 | NETDRV_W32_F(RxConfig, i); |
1154 | 1165 | ||
1155 | /* Check this value: the documentation for IFG contradicts ifself. */ | 1166 | /* Check this value: the documentation for IFG contradicts ifself. */ |
1156 | NETDRV_W32 (TxConfig, (TX_DMA_BURST << TxDMAShift)); | 1167 | NETDRV_W32(TxConfig, (TX_DMA_BURST << TxDMAShift)); |
1157 | 1168 | ||
1158 | /* unlock Config[01234] and BMCR register writes */ | 1169 | /* unlock Config[01234] and BMCR register writes */ |
1159 | NETDRV_W8_F (Cfg9346, Cfg9346_Unlock); | 1170 | NETDRV_W8_F(Cfg9346, Cfg9346_Unlock); |
1160 | udelay (10); | 1171 | udelay(10); |
1161 | 1172 | ||
1162 | tp->cur_rx = 0; | 1173 | tp->cur_rx = 0; |
1163 | 1174 | ||
1164 | /* Lock Config[01234] and BMCR register writes */ | 1175 | /* Lock Config[01234] and BMCR register writes */ |
1165 | NETDRV_W8_F (Cfg9346, Cfg9346_Lock); | 1176 | NETDRV_W8_F(Cfg9346, Cfg9346_Lock); |
1166 | udelay (10); | 1177 | udelay(10); |
1167 | 1178 | ||
1168 | /* init Rx ring buffer DMA address */ | 1179 | /* init Rx ring buffer DMA address */ |
1169 | NETDRV_W32_F (RxBuf, tp->rx_ring_dma); | 1180 | NETDRV_W32_F(RxBuf, tp->rx_ring_dma); |
1170 | 1181 | ||
1171 | /* init Tx buffer DMA addresses */ | 1182 | /* init Tx buffer DMA addresses */ |
1172 | for (i = 0; i < NUM_TX_DESC; i++) | 1183 | for (i = 0; i < NUM_TX_DESC; i++) |
1173 | NETDRV_W32_F (TxAddr0 + (i * 4), tp->tx_bufs_dma + (tp->tx_buf[i] - tp->tx_bufs)); | 1184 | NETDRV_W32_F(TxAddr0 + (i * 4), tp->tx_bufs_dma + (tp->tx_buf[i] - tp->tx_bufs)); |
1174 | 1185 | ||
1175 | NETDRV_W32_F (RxMissed, 0); | 1186 | NETDRV_W32_F(RxMissed, 0); |
1176 | 1187 | ||
1177 | netdrv_set_rx_mode (dev); | 1188 | netdrv_set_rx_mode(dev); |
1178 | 1189 | ||
1179 | /* no early-rx interrupts */ | 1190 | /* no early-rx interrupts */ |
1180 | NETDRV_W16 (MultiIntr, NETDRV_R16 (MultiIntr) & MultiIntrClear); | 1191 | NETDRV_W16(MultiIntr, NETDRV_R16(MultiIntr) & MultiIntrClear); |
1181 | 1192 | ||
1182 | /* make sure RxTx has started */ | 1193 | /* make sure RxTx has started */ |
1183 | NETDRV_W8_F (ChipCmd, (NETDRV_R8 (ChipCmd) & ChipCmdClear) | | 1194 | NETDRV_W8_F(ChipCmd, (NETDRV_R8(ChipCmd) & ChipCmdClear) | |
1184 | CmdRxEnb | CmdTxEnb); | 1195 | CmdRxEnb | CmdTxEnb); |
1185 | 1196 | ||
1186 | /* Enable all known interrupts by setting the interrupt mask. */ | 1197 | /* Enable all known interrupts by setting the interrupt mask. */ |
1187 | NETDRV_W16_F (IntrMask, netdrv_intr_mask); | 1198 | NETDRV_W16_F(IntrMask, netdrv_intr_mask); |
1188 | 1199 | ||
1189 | netif_start_queue (dev); | 1200 | netif_start_queue(dev); |
1190 | 1201 | ||
1191 | DPRINTK ("EXIT\n"); | 1202 | DPRINTK("EXIT\n"); |
1192 | } | 1203 | } |
1193 | 1204 | ||
1194 | 1205 | ||
1195 | /* Initialize the Rx and Tx rings, along with various 'dev' bits. */ | 1206 | /* Initialize the Rx and Tx rings, along with various 'dev' bits. */ |
1196 | static void netdrv_init_ring (struct net_device *dev) | 1207 | static void netdrv_init_ring(struct net_device *dev) |
1197 | { | 1208 | { |
1198 | struct netdrv_private *tp = netdev_priv(dev); | 1209 | struct netdrv_private *tp = netdev_priv(dev); |
1199 | int i; | 1210 | int i; |
1200 | 1211 | ||
1201 | DPRINTK ("ENTER\n"); | 1212 | DPRINTK("ENTER\n"); |
1202 | 1213 | ||
1203 | tp->cur_rx = 0; | 1214 | tp->cur_rx = 0; |
1204 | atomic_set (&tp->cur_tx, 0); | 1215 | atomic_set(&tp->cur_tx, 0); |
1205 | atomic_set (&tp->dirty_tx, 0); | 1216 | atomic_set(&tp->dirty_tx, 0); |
1206 | 1217 | ||
1207 | for (i = 0; i < NUM_TX_DESC; i++) { | 1218 | for (i = 0; i < NUM_TX_DESC; i++) { |
1208 | tp->tx_info[i].skb = NULL; | 1219 | tp->tx_info[i].skb = NULL; |
@@ -1210,11 +1221,11 @@ static void netdrv_init_ring (struct net_device *dev) | |||
1210 | tp->tx_buf[i] = &tp->tx_bufs[i * TX_BUF_SIZE]; | 1221 | tp->tx_buf[i] = &tp->tx_bufs[i * TX_BUF_SIZE]; |
1211 | } | 1222 | } |
1212 | 1223 | ||
1213 | DPRINTK ("EXIT\n"); | 1224 | DPRINTK("EXIT\n"); |
1214 | } | 1225 | } |
1215 | 1226 | ||
1216 | 1227 | ||
1217 | static void netdrv_timer (unsigned long data) | 1228 | static void netdrv_timer(unsigned long data) |
1218 | { | 1229 | { |
1219 | struct net_device *dev = (struct net_device *) data; | 1230 | struct net_device *dev = (struct net_device *) data; |
1220 | struct netdrv_private *tp = netdev_priv(dev); | 1231 | struct netdrv_private *tp = netdev_priv(dev); |
@@ -1222,58 +1233,54 @@ static void netdrv_timer (unsigned long data) | |||
1222 | int next_tick = 60 * HZ; | 1233 | int next_tick = 60 * HZ; |
1223 | int mii_lpa; | 1234 | int mii_lpa; |
1224 | 1235 | ||
1225 | mii_lpa = mdio_read (dev, tp->phys[0], MII_LPA); | 1236 | mii_lpa = mdio_read(dev, tp->phys[0], MII_LPA); |
1226 | 1237 | ||
1227 | if (!tp->duplex_lock && mii_lpa != 0xffff) { | 1238 | if (!tp->duplex_lock && mii_lpa != 0xffff) { |
1228 | int duplex = ((mii_lpa & LPA_100FULL) || | 1239 | int duplex = ((mii_lpa & LPA_100FULL) || |
1229 | (mii_lpa & 0x01C0) == 0x0040); | 1240 | (mii_lpa & 0x01C0) == 0x0040); |
1230 | if (tp->full_duplex != duplex) { | 1241 | if (tp->full_duplex != duplex) { |
1231 | tp->full_duplex = duplex; | 1242 | tp->full_duplex = duplex; |
1232 | printk (KERN_INFO | 1243 | netdev_info(dev, "Setting %s-duplex based on MII #%d link partner ability of %04x\n", |
1233 | "%s: Setting %s-duplex based on MII #%d link" | 1244 | tp->full_duplex ? "full" : "half", |
1234 | " partner ability of %4.4x.\n", dev->name, | 1245 | tp->phys[0], mii_lpa); |
1235 | tp->full_duplex ? "full" : "half", | 1246 | NETDRV_W8(Cfg9346, Cfg9346_Unlock); |
1236 | tp->phys[0], mii_lpa); | 1247 | NETDRV_W8(Config1, tp->full_duplex ? 0x60 : 0x20); |
1237 | NETDRV_W8 (Cfg9346, Cfg9346_Unlock); | 1248 | NETDRV_W8(Cfg9346, Cfg9346_Lock); |
1238 | NETDRV_W8 (Config1, tp->full_duplex ? 0x60 : 0x20); | ||
1239 | NETDRV_W8 (Cfg9346, Cfg9346_Lock); | ||
1240 | } | 1249 | } |
1241 | } | 1250 | } |
1242 | 1251 | ||
1243 | DPRINTK ("%s: Media selection tick, Link partner %4.4x.\n", | 1252 | netdev_dbg(dev, "Media selection tick, Link partner %04x\n", |
1244 | dev->name, NETDRV_R16 (NWayLPAR)); | 1253 | NETDRV_R16(NWayLPAR)); |
1245 | DPRINTK ("%s: Other registers are IntMask %4.4x IntStatus %4.4x" | 1254 | netdev_dbg(dev, "Other registers are IntMask %04x IntStatus %04x RxStatus %04lx\n", |
1246 | " RxStatus %4.4x.\n", dev->name, | 1255 | NETDRV_R16(IntrMask), |
1247 | NETDRV_R16 (IntrMask), | 1256 | NETDRV_R16(IntrStatus), |
1248 | NETDRV_R16 (IntrStatus), | 1257 | NETDRV_R32(RxEarlyStatus)); |
1249 | NETDRV_R32 (RxEarlyStatus)); | 1258 | netdev_dbg(dev, "Chip config %02x %02x\n", |
1250 | DPRINTK ("%s: Chip config %2.2x %2.2x.\n", | 1259 | NETDRV_R8(Config0), NETDRV_R8(Config1)); |
1251 | dev->name, NETDRV_R8 (Config0), | ||
1252 | NETDRV_R8 (Config1)); | ||
1253 | 1260 | ||
1254 | tp->timer.expires = jiffies + next_tick; | 1261 | tp->timer.expires = jiffies + next_tick; |
1255 | add_timer (&tp->timer); | 1262 | add_timer(&tp->timer); |
1256 | } | 1263 | } |
1257 | 1264 | ||
1258 | 1265 | ||
1259 | static void netdrv_tx_clear (struct net_device *dev) | 1266 | static void netdrv_tx_clear(struct net_device *dev) |
1260 | { | 1267 | { |
1261 | int i; | 1268 | int i; |
1262 | struct netdrv_private *tp = netdev_priv(dev); | 1269 | struct netdrv_private *tp = netdev_priv(dev); |
1263 | 1270 | ||
1264 | atomic_set (&tp->cur_tx, 0); | 1271 | atomic_set(&tp->cur_tx, 0); |
1265 | atomic_set (&tp->dirty_tx, 0); | 1272 | atomic_set(&tp->dirty_tx, 0); |
1266 | 1273 | ||
1267 | /* Dump the unsent Tx packets. */ | 1274 | /* Dump the unsent Tx packets. */ |
1268 | for (i = 0; i < NUM_TX_DESC; i++) { | 1275 | for (i = 0; i < NUM_TX_DESC; i++) { |
1269 | struct ring_info *rp = &tp->tx_info[i]; | 1276 | struct ring_info *rp = &tp->tx_info[i]; |
1270 | if (rp->mapping != 0) { | 1277 | if (rp->mapping != 0) { |
1271 | pci_unmap_single (tp->pci_dev, rp->mapping, | 1278 | pci_unmap_single(tp->pci_dev, rp->mapping, |
1272 | rp->skb->len, PCI_DMA_TODEVICE); | 1279 | rp->skb->len, PCI_DMA_TODEVICE); |
1273 | rp->mapping = 0; | 1280 | rp->mapping = 0; |
1274 | } | 1281 | } |
1275 | if (rp->skb) { | 1282 | if (rp->skb) { |
1276 | dev_kfree_skb (rp->skb); | 1283 | dev_kfree_skb(rp->skb); |
1277 | rp->skb = NULL; | 1284 | rp->skb = NULL; |
1278 | dev->stats.tx_dropped++; | 1285 | dev->stats.tx_dropped++; |
1279 | } | 1286 | } |
@@ -1281,7 +1288,7 @@ static void netdrv_tx_clear (struct net_device *dev) | |||
1281 | } | 1288 | } |
1282 | 1289 | ||
1283 | 1290 | ||
1284 | static void netdrv_tx_timeout (struct net_device *dev) | 1291 | static void netdrv_tx_timeout(struct net_device *dev) |
1285 | { | 1292 | { |
1286 | struct netdrv_private *tp = netdev_priv(dev); | 1293 | struct netdrv_private *tp = netdev_priv(dev); |
1287 | void *ioaddr = tp->mmio_addr; | 1294 | void *ioaddr = tp->mmio_addr; |
@@ -1289,96 +1296,95 @@ static void netdrv_tx_timeout (struct net_device *dev) | |||
1289 | u8 tmp8; | 1296 | u8 tmp8; |
1290 | unsigned long flags; | 1297 | unsigned long flags; |
1291 | 1298 | ||
1292 | DPRINTK ("%s: Transmit timeout, status %2.2x %4.4x " | 1299 | netdev_dbg(dev, "Transmit timeout, status %02x %04x media %02x\n", |
1293 | "media %2.2x.\n", dev->name, | 1300 | NETDRV_R8(ChipCmd), |
1294 | NETDRV_R8 (ChipCmd), | 1301 | NETDRV_R16(IntrStatus), |
1295 | NETDRV_R16 (IntrStatus), | 1302 | NETDRV_R8(MediaStatus)); |
1296 | NETDRV_R8 (MediaStatus)); | ||
1297 | 1303 | ||
1298 | /* disable Tx ASAP, if not already */ | 1304 | /* disable Tx ASAP, if not already */ |
1299 | tmp8 = NETDRV_R8 (ChipCmd); | 1305 | tmp8 = NETDRV_R8(ChipCmd); |
1300 | if (tmp8 & CmdTxEnb) | 1306 | if (tmp8 & CmdTxEnb) |
1301 | NETDRV_W8 (ChipCmd, tmp8 & ~CmdTxEnb); | 1307 | NETDRV_W8(ChipCmd, tmp8 & ~CmdTxEnb); |
1302 | 1308 | ||
1303 | /* Disable interrupts by clearing the interrupt mask. */ | 1309 | /* Disable interrupts by clearing the interrupt mask. */ |
1304 | NETDRV_W16 (IntrMask, 0x0000); | 1310 | NETDRV_W16(IntrMask, 0x0000); |
1305 | 1311 | ||
1306 | /* Emit info to figure out what went wrong. */ | 1312 | /* Emit info to figure out what went wrong. */ |
1307 | printk (KERN_DEBUG "%s: Tx queue start entry %d dirty entry %d.\n", | 1313 | netdev_dbg(dev, "Tx queue start entry %d dirty entry %d\n", |
1308 | dev->name, atomic_read (&tp->cur_tx), | 1314 | atomic_read(&tp->cur_tx), |
1309 | atomic_read (&tp->dirty_tx)); | 1315 | atomic_read(&tp->dirty_tx)); |
1310 | for (i = 0; i < NUM_TX_DESC; i++) | 1316 | for (i = 0; i < NUM_TX_DESC; i++) |
1311 | printk (KERN_DEBUG "%s: Tx descriptor %d is %8.8lx.%s\n", | 1317 | netdev_dbg(dev, "Tx descriptor %d is %08lx%s\n", |
1312 | dev->name, i, NETDRV_R32 (TxStatus0 + (i * 4)), | 1318 | i, NETDRV_R32(TxStatus0 + (i * 4)), |
1313 | i == atomic_read (&tp->dirty_tx) % NUM_TX_DESC ? | 1319 | i == atomic_read(&tp->dirty_tx) % NUM_TX_DESC ? |
1314 | " (queue head)" : ""); | 1320 | "(queue head)" : ""); |
1315 | 1321 | ||
1316 | /* Stop a shared interrupt from scavenging while we are. */ | 1322 | /* Stop a shared interrupt from scavenging while we are. */ |
1317 | spin_lock_irqsave (&tp->lock, flags); | 1323 | spin_lock_irqsave(&tp->lock, flags); |
1318 | 1324 | ||
1319 | netdrv_tx_clear (dev); | 1325 | netdrv_tx_clear(dev); |
1320 | 1326 | ||
1321 | spin_unlock_irqrestore (&tp->lock, flags); | 1327 | spin_unlock_irqrestore(&tp->lock, flags); |
1322 | 1328 | ||
1323 | /* ...and finally, reset everything */ | 1329 | /* ...and finally, reset everything */ |
1324 | netdrv_hw_start (dev); | 1330 | netdrv_hw_start(dev); |
1325 | 1331 | ||
1326 | netif_wake_queue (dev); | 1332 | netif_wake_queue(dev); |
1327 | } | 1333 | } |
1328 | 1334 | ||
1329 | 1335 | ||
1330 | 1336 | ||
1331 | static int netdrv_start_xmit (struct sk_buff *skb, struct net_device *dev) | 1337 | static int netdrv_start_xmit(struct sk_buff *skb, struct net_device *dev) |
1332 | { | 1338 | { |
1333 | struct netdrv_private *tp = netdev_priv(dev); | 1339 | struct netdrv_private *tp = netdev_priv(dev); |
1334 | void *ioaddr = tp->mmio_addr; | 1340 | void *ioaddr = tp->mmio_addr; |
1335 | int entry; | 1341 | int entry; |
1336 | 1342 | ||
1337 | /* Calculate the next Tx descriptor entry. */ | 1343 | /* Calculate the next Tx descriptor entry. */ |
1338 | entry = atomic_read (&tp->cur_tx) % NUM_TX_DESC; | 1344 | entry = atomic_read(&tp->cur_tx) % NUM_TX_DESC; |
1339 | 1345 | ||
1340 | assert (tp->tx_info[entry].skb == NULL); | 1346 | assert(tp->tx_info[entry].skb == NULL); |
1341 | assert (tp->tx_info[entry].mapping == 0); | 1347 | assert(tp->tx_info[entry].mapping == 0); |
1342 | 1348 | ||
1343 | tp->tx_info[entry].skb = skb; | 1349 | tp->tx_info[entry].skb = skb; |
1344 | /* tp->tx_info[entry].mapping = 0; */ | 1350 | /* tp->tx_info[entry].mapping = 0; */ |
1345 | skb_copy_from_linear_data(skb, tp->tx_buf[entry], skb->len); | 1351 | skb_copy_from_linear_data(skb, tp->tx_buf[entry], skb->len); |
1346 | 1352 | ||
1347 | /* Note: the chip doesn't have auto-pad! */ | 1353 | /* Note: the chip doesn't have auto-pad! */ |
1348 | NETDRV_W32 (TxStatus0 + (entry * sizeof(u32)), | 1354 | NETDRV_W32(TxStatus0 + (entry * sizeof(u32)), |
1349 | tp->tx_flag | (skb->len >= ETH_ZLEN ? skb->len : ETH_ZLEN)); | 1355 | tp->tx_flag | (skb->len >= ETH_ZLEN ? skb->len : ETH_ZLEN)); |
1350 | 1356 | ||
1351 | dev->trans_start = jiffies; | 1357 | dev->trans_start = jiffies; |
1352 | atomic_inc (&tp->cur_tx); | 1358 | atomic_inc(&tp->cur_tx); |
1353 | if ((atomic_read (&tp->cur_tx) - atomic_read (&tp->dirty_tx)) >= NUM_TX_DESC) | 1359 | if ((atomic_read(&tp->cur_tx) - atomic_read(&tp->dirty_tx)) >= NUM_TX_DESC) |
1354 | netif_stop_queue (dev); | 1360 | netif_stop_queue(dev); |
1355 | 1361 | ||
1356 | DPRINTK ("%s: Queued Tx packet at %p size %u to slot %d.\n", | 1362 | netdev_dbg(dev, "Queued Tx packet at %p size %u to slot %d\n", |
1357 | dev->name, skb->data, skb->len, entry); | 1363 | skb->data, skb->len, entry); |
1358 | 1364 | ||
1359 | return NETDEV_TX_OK; | 1365 | return NETDEV_TX_OK; |
1360 | } | 1366 | } |
1361 | 1367 | ||
1362 | 1368 | ||
1363 | static void netdrv_tx_interrupt (struct net_device *dev, | 1369 | static void netdrv_tx_interrupt(struct net_device *dev, |
1364 | struct netdrv_private *tp, | 1370 | struct netdrv_private *tp, |
1365 | void *ioaddr) | 1371 | void *ioaddr) |
1366 | { | 1372 | { |
1367 | int cur_tx, dirty_tx, tx_left; | 1373 | int cur_tx, dirty_tx, tx_left; |
1368 | 1374 | ||
1369 | assert (dev != NULL); | 1375 | assert(dev != NULL); |
1370 | assert (tp != NULL); | 1376 | assert(tp != NULL); |
1371 | assert (ioaddr != NULL); | 1377 | assert(ioaddr != NULL); |
1372 | 1378 | ||
1373 | dirty_tx = atomic_read (&tp->dirty_tx); | 1379 | dirty_tx = atomic_read(&tp->dirty_tx); |
1374 | 1380 | ||
1375 | cur_tx = atomic_read (&tp->cur_tx); | 1381 | cur_tx = atomic_read(&tp->cur_tx); |
1376 | tx_left = cur_tx - dirty_tx; | 1382 | tx_left = cur_tx - dirty_tx; |
1377 | while (tx_left > 0) { | 1383 | while (tx_left > 0) { |
1378 | int entry = dirty_tx % NUM_TX_DESC; | 1384 | int entry = dirty_tx % NUM_TX_DESC; |
1379 | int txstatus; | 1385 | int txstatus; |
1380 | 1386 | ||
1381 | txstatus = NETDRV_R32 (TxStatus0 + (entry * sizeof (u32))); | 1387 | txstatus = NETDRV_R32(TxStatus0 + (entry * sizeof(u32))); |
1382 | 1388 | ||
1383 | if (!(txstatus & (TxStatOK | TxUnderrun | TxAborted))) | 1389 | if (!(txstatus & (TxStatOK | TxUnderrun | TxAborted))) |
1384 | break; /* It still hasn't been Txed */ | 1390 | break; /* It still hasn't been Txed */ |
@@ -1386,12 +1392,12 @@ static void netdrv_tx_interrupt (struct net_device *dev, | |||
1386 | /* Note: TxCarrierLost is always asserted at 100mbps. */ | 1392 | /* Note: TxCarrierLost is always asserted at 100mbps. */ |
1387 | if (txstatus & (TxOutOfWindow | TxAborted)) { | 1393 | if (txstatus & (TxOutOfWindow | TxAborted)) { |
1388 | /* There was an major error, log it. */ | 1394 | /* There was an major error, log it. */ |
1389 | DPRINTK ("%s: Transmit error, Tx status %8.8x.\n", | 1395 | netdev_dbg(dev, "Transmit error, Tx status %#08x\n", |
1390 | dev->name, txstatus); | 1396 | txstatus); |
1391 | dev->stats.tx_errors++; | 1397 | dev->stats.tx_errors++; |
1392 | if (txstatus & TxAborted) { | 1398 | if (txstatus & TxAborted) { |
1393 | dev->stats.tx_aborted_errors++; | 1399 | dev->stats.tx_aborted_errors++; |
1394 | NETDRV_W32 (TxConfig, TxClearAbt | (TX_DMA_BURST << TxDMAShift)); | 1400 | NETDRV_W32(TxConfig, TxClearAbt | (TX_DMA_BURST << TxDMAShift)); |
1395 | } | 1401 | } |
1396 | if (txstatus & TxCarrierLost) | 1402 | if (txstatus & TxCarrierLost) |
1397 | dev->stats.tx_carrier_errors++; | 1403 | dev->stats.tx_carrier_errors++; |
@@ -1417,48 +1423,45 @@ static void netdrv_tx_interrupt (struct net_device *dev, | |||
1417 | PCI_DMA_TODEVICE); | 1423 | PCI_DMA_TODEVICE); |
1418 | tp->tx_info[entry].mapping = 0; | 1424 | tp->tx_info[entry].mapping = 0; |
1419 | } | 1425 | } |
1420 | dev_kfree_skb_irq (tp->tx_info[entry].skb); | 1426 | dev_kfree_skb_irq(tp->tx_info[entry].skb); |
1421 | tp->tx_info[entry].skb = NULL; | 1427 | tp->tx_info[entry].skb = NULL; |
1422 | dirty_tx++; | 1428 | dirty_tx++; |
1423 | if (dirty_tx < 0) { /* handle signed int overflow */ | 1429 | if (dirty_tx < 0) { /* handle signed int overflow */ |
1424 | atomic_sub (cur_tx, &tp->cur_tx); /* XXX racy? */ | 1430 | atomic_sub(cur_tx, &tp->cur_tx); /* XXX racy? */ |
1425 | dirty_tx = cur_tx - tx_left + 1; | 1431 | dirty_tx = cur_tx - tx_left + 1; |
1426 | } | 1432 | } |
1427 | if (netif_queue_stopped (dev)) | 1433 | if (netif_queue_stopped(dev)) |
1428 | netif_wake_queue (dev); | 1434 | netif_wake_queue(dev); |
1429 | 1435 | ||
1430 | cur_tx = atomic_read (&tp->cur_tx); | 1436 | cur_tx = atomic_read(&tp->cur_tx); |
1431 | tx_left = cur_tx - dirty_tx; | 1437 | tx_left = cur_tx - dirty_tx; |
1432 | 1438 | ||
1433 | } | 1439 | } |
1434 | 1440 | ||
1435 | #ifndef NETDRV_NDEBUG | 1441 | #ifndef NETDRV_NDEBUG |
1436 | if (atomic_read (&tp->cur_tx) - dirty_tx > NUM_TX_DESC) { | 1442 | if (atomic_read(&tp->cur_tx) - dirty_tx > NUM_TX_DESC) { |
1437 | printk (KERN_ERR | 1443 | netdev_err(dev, "Out-of-sync dirty pointer, %d vs. %d\n", |
1438 | "%s: Out-of-sync dirty pointer, %d vs. %d.\n", | 1444 | dirty_tx, atomic_read(&tp->cur_tx)); |
1439 | dev->name, dirty_tx, atomic_read (&tp->cur_tx)); | ||
1440 | dirty_tx += NUM_TX_DESC; | 1445 | dirty_tx += NUM_TX_DESC; |
1441 | } | 1446 | } |
1442 | #endif /* NETDRV_NDEBUG */ | 1447 | #endif /* NETDRV_NDEBUG */ |
1443 | 1448 | ||
1444 | atomic_set (&tp->dirty_tx, dirty_tx); | 1449 | atomic_set(&tp->dirty_tx, dirty_tx); |
1445 | } | 1450 | } |
1446 | 1451 | ||
1447 | 1452 | ||
1448 | /* TODO: clean this up! Rx reset need not be this intensive */ | 1453 | /* TODO: clean this up! Rx reset need not be this intensive */ |
1449 | static void netdrv_rx_err (u32 rx_status, struct net_device *dev, | 1454 | static void netdrv_rx_err(u32 rx_status, struct net_device *dev, |
1450 | struct netdrv_private *tp, void *ioaddr) | 1455 | struct netdrv_private *tp, void *ioaddr) |
1451 | { | 1456 | { |
1452 | u8 tmp8; | 1457 | u8 tmp8; |
1453 | int tmp_work = 1000; | 1458 | int tmp_work = 1000; |
1454 | 1459 | ||
1455 | DPRINTK ("%s: Ethernet frame had errors, status %8.8x.\n", | 1460 | netdev_dbg(dev, "Ethernet frame had errors, status %08x\n", rx_status); |
1456 | dev->name, rx_status); | 1461 | if (rx_status & RxTooLong) |
1457 | if (rx_status & RxTooLong) { | 1462 | netdev_dbg(dev, "Oversized Ethernet frame, status %04x!\n", |
1458 | DPRINTK ("%s: Oversized Ethernet frame, status %4.4x!\n", | 1463 | rx_status); |
1459 | dev->name, rx_status); | ||
1460 | /* A.C.: The chip hangs here. */ | 1464 | /* A.C.: The chip hangs here. */ |
1461 | } | ||
1462 | dev->stats.rx_errors++; | 1465 | dev->stats.rx_errors++; |
1463 | if (rx_status & (RxBadSymbol | RxBadAlign)) | 1466 | if (rx_status & (RxBadSymbol | RxBadAlign)) |
1464 | dev->stats.rx_frame_errors++; | 1467 | dev->stats.rx_frame_errors++; |
@@ -1466,56 +1469,55 @@ static void netdrv_rx_err (u32 rx_status, struct net_device *dev, | |||
1466 | dev->stats.rx_length_errors++; | 1469 | dev->stats.rx_length_errors++; |
1467 | if (rx_status & RxCRCErr) | 1470 | if (rx_status & RxCRCErr) |
1468 | dev->stats.rx_crc_errors++; | 1471 | dev->stats.rx_crc_errors++; |
1469 | /* Reset the receiver, based on RealTek recommendation. (Bug?) */ | 1472 | /* Reset the receiver, based on RealTek recommendation.(Bug?) */ |
1470 | tp->cur_rx = 0; | 1473 | tp->cur_rx = 0; |
1471 | 1474 | ||
1472 | /* disable receive */ | 1475 | /* disable receive */ |
1473 | tmp8 = NETDRV_R8 (ChipCmd) & ChipCmdClear; | 1476 | tmp8 = NETDRV_R8(ChipCmd) & ChipCmdClear; |
1474 | NETDRV_W8_F (ChipCmd, tmp8 | CmdTxEnb); | 1477 | NETDRV_W8_F(ChipCmd, tmp8 | CmdTxEnb); |
1475 | 1478 | ||
1476 | /* A.C.: Reset the multicast list. */ | 1479 | /* A.C.: Reset the multicast list. */ |
1477 | netdrv_set_rx_mode (dev); | 1480 | netdrv_set_rx_mode(dev); |
1478 | 1481 | ||
1479 | /* XXX potentially temporary hack to | 1482 | /* XXX potentially temporary hack to |
1480 | * restart hung receiver */ | 1483 | * restart hung receiver */ |
1481 | while (--tmp_work > 0) { | 1484 | while (--tmp_work > 0) { |
1482 | tmp8 = NETDRV_R8 (ChipCmd); | 1485 | tmp8 = NETDRV_R8(ChipCmd); |
1483 | if ((tmp8 & CmdRxEnb) && (tmp8 & CmdTxEnb)) | 1486 | if ((tmp8 & CmdRxEnb) && (tmp8 & CmdTxEnb)) |
1484 | break; | 1487 | break; |
1485 | NETDRV_W8_F (ChipCmd, | 1488 | NETDRV_W8_F(ChipCmd, |
1486 | (tmp8 & ChipCmdClear) | CmdRxEnb | CmdTxEnb); | 1489 | (tmp8 & ChipCmdClear) | CmdRxEnb | CmdTxEnb); |
1487 | } | 1490 | } |
1488 | 1491 | ||
1489 | /* G.S.: Re-enable receiver */ | 1492 | /* G.S.: Re-enable receiver */ |
1490 | /* XXX temporary hack to work around receiver hang */ | 1493 | /* XXX temporary hack to work around receiver hang */ |
1491 | netdrv_set_rx_mode (dev); | 1494 | netdrv_set_rx_mode(dev); |
1492 | 1495 | ||
1493 | if (tmp_work <= 0) | 1496 | if (tmp_work <= 0) |
1494 | printk (KERN_WARNING PFX "tx/rx enable wait too long\n"); | 1497 | netdev_warn(dev, "tx/rx enable wait too long\n"); |
1495 | } | 1498 | } |
1496 | 1499 | ||
1497 | 1500 | ||
1498 | /* The data sheet doesn't describe the Rx ring at all, so I'm guessing at the | 1501 | /* The data sheet doesn't describe the Rx ring at all, so I'm guessing at the |
1499 | field alignments and semantics. */ | 1502 | field alignments and semantics. */ |
1500 | static void netdrv_rx_interrupt (struct net_device *dev, | 1503 | static void netdrv_rx_interrupt(struct net_device *dev, |
1501 | struct netdrv_private *tp, void *ioaddr) | 1504 | struct netdrv_private *tp, void *ioaddr) |
1502 | { | 1505 | { |
1503 | unsigned char *rx_ring; | 1506 | unsigned char *rx_ring; |
1504 | u16 cur_rx; | 1507 | u16 cur_rx; |
1505 | 1508 | ||
1506 | assert (dev != NULL); | 1509 | assert(dev != NULL); |
1507 | assert (tp != NULL); | 1510 | assert(tp != NULL); |
1508 | assert (ioaddr != NULL); | 1511 | assert(ioaddr != NULL); |
1509 | 1512 | ||
1510 | rx_ring = tp->rx_ring; | 1513 | rx_ring = tp->rx_ring; |
1511 | cur_rx = tp->cur_rx; | 1514 | cur_rx = tp->cur_rx; |
1512 | 1515 | ||
1513 | DPRINTK ("%s: In netdrv_rx(), current %4.4x BufAddr %4.4x," | 1516 | netdev_dbg(dev, "In netdrv_rx(), current %04x BufAddr %04x, free to %04x, Cmd %02x\n", |
1514 | " free to %4.4x, Cmd %2.2x.\n", dev->name, cur_rx, | 1517 | cur_rx, NETDRV_R16(RxBufAddr), |
1515 | NETDRV_R16 (RxBufAddr), | 1518 | NETDRV_R16(RxBufPtr), NETDRV_R8(ChipCmd)); |
1516 | NETDRV_R16 (RxBufPtr), NETDRV_R8 (ChipCmd)); | ||
1517 | 1519 | ||
1518 | while ((NETDRV_R8 (ChipCmd) & RxBufEmpty) == 0) { | 1520 | while ((NETDRV_R8(ChipCmd) & RxBufEmpty) == 0) { |
1519 | int ring_offset = cur_rx % RX_BUF_LEN; | 1521 | int ring_offset = cur_rx % RX_BUF_LEN; |
1520 | u32 rx_status; | 1522 | u32 rx_status; |
1521 | unsigned int rx_size; | 1523 | unsigned int rx_size; |
@@ -1523,32 +1525,25 @@ static void netdrv_rx_interrupt (struct net_device *dev, | |||
1523 | struct sk_buff *skb; | 1525 | struct sk_buff *skb; |
1524 | 1526 | ||
1525 | /* read size+status of next frame from DMA ring buffer */ | 1527 | /* read size+status of next frame from DMA ring buffer */ |
1526 | rx_status = le32_to_cpu (*(u32 *) (rx_ring + ring_offset)); | 1528 | rx_status = le32_to_cpu(*(u32 *)(rx_ring + ring_offset)); |
1527 | rx_size = rx_status >> 16; | 1529 | rx_size = rx_status >> 16; |
1528 | pkt_size = rx_size - 4; | 1530 | pkt_size = rx_size - 4; |
1529 | 1531 | ||
1530 | DPRINTK ("%s: netdrv_rx() status %4.4x, size %4.4x," | 1532 | netdev_dbg(dev, "netdrv_rx() status %04x, size %04x, cur %04x\n", |
1531 | " cur %4.4x.\n", dev->name, rx_status, | 1533 | rx_status, rx_size, cur_rx); |
1532 | rx_size, cur_rx); | ||
1533 | #if defined(NETDRV_DEBUG) && (NETDRV_DEBUG > 2) | 1534 | #if defined(NETDRV_DEBUG) && (NETDRV_DEBUG > 2) |
1534 | { | 1535 | print_hex_dump_bytes("Frame contents: ", HEX_DUMP_OFFSET, |
1535 | int i; | 1536 | &rx_ring[ring_offset], 70); |
1536 | DPRINTK ("%s: Frame contents ", dev->name); | ||
1537 | for (i = 0; i < 70; i++) | ||
1538 | printk (" %2.2x", | ||
1539 | rx_ring[ring_offset + i]); | ||
1540 | printk (".\n"); | ||
1541 | } | ||
1542 | #endif | 1537 | #endif |
1543 | 1538 | ||
1544 | /* If Rx err or invalid rx_size/rx_status received | 1539 | /* If Rx err or invalid rx_size/rx_status received |
1545 | * (which happens if we get lost in the ring), | 1540 | *(which happens if we get lost in the ring), |
1546 | * Rx process gets reset, so we abort any further | 1541 | * Rx process gets reset, so we abort any further |
1547 | * Rx processing. | 1542 | * Rx processing. |
1548 | */ | 1543 | */ |
1549 | if ((rx_size > (MAX_ETH_FRAME_SIZE+4)) || | 1544 | if ((rx_size > (MAX_ETH_FRAME_SIZE+4)) || |
1550 | (!(rx_status & RxStatusOK))) { | 1545 | (!(rx_status & RxStatusOK))) { |
1551 | netdrv_rx_err (rx_status, dev, tp, ioaddr); | 1546 | netdrv_rx_err(rx_status, dev, tp, ioaddr); |
1552 | return; | 1547 | return; |
1553 | } | 1548 | } |
1554 | 1549 | ||
@@ -1561,71 +1556,67 @@ static void netdrv_rx_interrupt (struct net_device *dev, | |||
1561 | * drop packets here under memory pressure. | 1556 | * drop packets here under memory pressure. |
1562 | */ | 1557 | */ |
1563 | 1558 | ||
1564 | skb = dev_alloc_skb (pkt_size + 2); | 1559 | skb = dev_alloc_skb(pkt_size + 2); |
1565 | if (skb) { | 1560 | if (skb) { |
1566 | skb_reserve (skb, 2); /* 16 byte align the IP fields. */ | 1561 | skb_reserve(skb, 2); /* 16 byte align the IP fields. */ |
1567 | 1562 | ||
1568 | skb_copy_to_linear_data (skb, &rx_ring[ring_offset + 4], pkt_size); | 1563 | skb_copy_to_linear_data(skb, &rx_ring[ring_offset + 4], pkt_size); |
1569 | skb_put (skb, pkt_size); | 1564 | skb_put(skb, pkt_size); |
1570 | 1565 | ||
1571 | skb->protocol = eth_type_trans (skb, dev); | 1566 | skb->protocol = eth_type_trans(skb, dev); |
1572 | netif_rx (skb); | 1567 | netif_rx(skb); |
1573 | dev->stats.rx_bytes += pkt_size; | 1568 | dev->stats.rx_bytes += pkt_size; |
1574 | dev->stats.rx_packets++; | 1569 | dev->stats.rx_packets++; |
1575 | } else { | 1570 | } else { |
1576 | printk (KERN_WARNING | 1571 | netdev_warn(dev, "Memory squeeze, dropping packet\n"); |
1577 | "%s: Memory squeeze, dropping packet.\n", | ||
1578 | dev->name); | ||
1579 | dev->stats.rx_dropped++; | 1572 | dev->stats.rx_dropped++; |
1580 | } | 1573 | } |
1581 | 1574 | ||
1582 | cur_rx = (cur_rx + rx_size + 4 + 3) & ~3; | 1575 | cur_rx = (cur_rx + rx_size + 4 + 3) & ~3; |
1583 | NETDRV_W16_F (RxBufPtr, cur_rx - 16); | 1576 | NETDRV_W16_F(RxBufPtr, cur_rx - 16); |
1584 | } | 1577 | } |
1585 | 1578 | ||
1586 | DPRINTK ("%s: Done netdrv_rx(), current %4.4x BufAddr %4.4x," | 1579 | netdev_dbg(dev, "Done netdrv_rx(), current %04x BufAddr %04x, free to %04x, Cmd %02x\n", |
1587 | " free to %4.4x, Cmd %2.2x.\n", dev->name, cur_rx, | 1580 | cur_rx, NETDRV_R16(RxBufAddr), |
1588 | NETDRV_R16 (RxBufAddr), | 1581 | NETDRV_R16(RxBufPtr), NETDRV_R8(ChipCmd)); |
1589 | NETDRV_R16 (RxBufPtr), NETDRV_R8 (ChipCmd)); | ||
1590 | 1582 | ||
1591 | tp->cur_rx = cur_rx; | 1583 | tp->cur_rx = cur_rx; |
1592 | } | 1584 | } |
1593 | 1585 | ||
1594 | 1586 | ||
1595 | static void netdrv_weird_interrupt (struct net_device *dev, | 1587 | static void netdrv_weird_interrupt(struct net_device *dev, |
1596 | struct netdrv_private *tp, | 1588 | struct netdrv_private *tp, |
1597 | void *ioaddr, | 1589 | void *ioaddr, |
1598 | int status, int link_changed) | 1590 | int status, int link_changed) |
1599 | { | 1591 | { |
1600 | printk (KERN_DEBUG "%s: Abnormal interrupt, status %8.8x.\n", | 1592 | netdev_printk(KERN_DEBUG, dev, "Abnormal interrupt, status %08x\n", |
1601 | dev->name, status); | 1593 | status); |
1602 | 1594 | ||
1603 | assert (dev != NULL); | 1595 | assert(dev != NULL); |
1604 | assert (tp != NULL); | 1596 | assert(tp != NULL); |
1605 | assert (ioaddr != NULL); | 1597 | assert(ioaddr != NULL); |
1606 | 1598 | ||
1607 | /* Update the error count. */ | 1599 | /* Update the error count. */ |
1608 | dev->stats.rx_missed_errors += NETDRV_R32 (RxMissed); | 1600 | dev->stats.rx_missed_errors += NETDRV_R32(RxMissed); |
1609 | NETDRV_W32 (RxMissed, 0); | 1601 | NETDRV_W32(RxMissed, 0); |
1610 | 1602 | ||
1611 | if ((status & RxUnderrun) && link_changed && | 1603 | if ((status & RxUnderrun) && link_changed && |
1612 | (tp->drv_flags & HAS_LNK_CHNG)) { | 1604 | (tp->drv_flags & HAS_LNK_CHNG)) { |
1613 | /* Really link-change on new chips. */ | 1605 | /* Really link-change on new chips. */ |
1614 | int lpar = NETDRV_R16 (NWayLPAR); | 1606 | int lpar = NETDRV_R16(NWayLPAR); |
1615 | int duplex = ((lpar & 0x0100) || (lpar & 0x01C0) == 0x0040 || | 1607 | int duplex = ((lpar & 0x0100) || (lpar & 0x01C0) == 0x0040 || |
1616 | tp->duplex_lock); | 1608 | tp->duplex_lock); |
1617 | if (tp->full_duplex != duplex) { | 1609 | if (tp->full_duplex != duplex) { |
1618 | tp->full_duplex = duplex; | 1610 | tp->full_duplex = duplex; |
1619 | NETDRV_W8 (Cfg9346, Cfg9346_Unlock); | 1611 | NETDRV_W8(Cfg9346, Cfg9346_Unlock); |
1620 | NETDRV_W8 (Config1, tp->full_duplex ? 0x60 : 0x20); | 1612 | NETDRV_W8(Config1, tp->full_duplex ? 0x60 : 0x20); |
1621 | NETDRV_W8 (Cfg9346, Cfg9346_Lock); | 1613 | NETDRV_W8(Cfg9346, Cfg9346_Lock); |
1622 | } | 1614 | } |
1623 | status &= ~RxUnderrun; | 1615 | status &= ~RxUnderrun; |
1624 | } | 1616 | } |
1625 | 1617 | ||
1626 | /* XXX along with netdrv_rx_err, are we double-counting errors? */ | 1618 | /* XXX along with netdrv_rx_err, are we double-counting errors? */ |
1627 | if (status & | 1619 | if (status & (RxUnderrun | RxOverflow | RxErr | RxFIFOOver)) |
1628 | (RxUnderrun | RxOverflow | RxErr | RxFIFOOver)) | ||
1629 | dev->stats.rx_errors++; | 1620 | dev->stats.rx_errors++; |
1630 | 1621 | ||
1631 | if (status & (PCSTimeout)) | 1622 | if (status & (PCSTimeout)) |
@@ -1634,22 +1625,21 @@ static void netdrv_weird_interrupt (struct net_device *dev, | |||
1634 | dev->stats.rx_fifo_errors++; | 1625 | dev->stats.rx_fifo_errors++; |
1635 | if (status & RxOverflow) { | 1626 | if (status & RxOverflow) { |
1636 | dev->stats.rx_over_errors++; | 1627 | dev->stats.rx_over_errors++; |
1637 | tp->cur_rx = NETDRV_R16 (RxBufAddr) % RX_BUF_LEN; | 1628 | tp->cur_rx = NETDRV_R16(RxBufAddr) % RX_BUF_LEN; |
1638 | NETDRV_W16_F (RxBufPtr, tp->cur_rx - 16); | 1629 | NETDRV_W16_F(RxBufPtr, tp->cur_rx - 16); |
1639 | } | 1630 | } |
1640 | if (status & PCIErr) { | 1631 | if (status & PCIErr) { |
1641 | u16 pci_cmd_status; | 1632 | u16 pci_cmd_status; |
1642 | pci_read_config_word (tp->pci_dev, PCI_STATUS, &pci_cmd_status); | 1633 | pci_read_config_word(tp->pci_dev, PCI_STATUS, &pci_cmd_status); |
1643 | 1634 | ||
1644 | printk (KERN_ERR "%s: PCI Bus error %4.4x.\n", | 1635 | netdev_err(dev, "PCI Bus error %04x\n", pci_cmd_status); |
1645 | dev->name, pci_cmd_status); | ||
1646 | } | 1636 | } |
1647 | } | 1637 | } |
1648 | 1638 | ||
1649 | 1639 | ||
1650 | /* The interrupt handler does all of the Rx thread work and cleans up | 1640 | /* The interrupt handler does all of the Rx thread work and cleans up |
1651 | after the Tx thread. */ | 1641 | after the Tx thread. */ |
1652 | static irqreturn_t netdrv_interrupt (int irq, void *dev_instance) | 1642 | static irqreturn_t netdrv_interrupt(int irq, void *dev_instance) |
1653 | { | 1643 | { |
1654 | struct net_device *dev = (struct net_device *) dev_instance; | 1644 | struct net_device *dev = (struct net_device *) dev_instance; |
1655 | struct netdrv_private *tp = netdev_priv(dev); | 1645 | struct netdrv_private *tp = netdev_priv(dev); |
@@ -1658,22 +1648,21 @@ static irqreturn_t netdrv_interrupt (int irq, void *dev_instance) | |||
1658 | int status = 0, link_changed = 0; /* avoid bogus "uninit" warning */ | 1648 | int status = 0, link_changed = 0; /* avoid bogus "uninit" warning */ |
1659 | int handled = 0; | 1649 | int handled = 0; |
1660 | 1650 | ||
1661 | spin_lock (&tp->lock); | 1651 | spin_lock(&tp->lock); |
1662 | 1652 | ||
1663 | do { | 1653 | do { |
1664 | status = NETDRV_R16 (IntrStatus); | 1654 | status = NETDRV_R16(IntrStatus); |
1665 | 1655 | ||
1666 | /* h/w no longer present (hotplug?) or major error, bail */ | 1656 | /* h/w no longer present(hotplug?) or major error, bail */ |
1667 | if (status == 0xFFFF) | 1657 | if (status == 0xFFFF) |
1668 | break; | 1658 | break; |
1669 | 1659 | ||
1670 | handled = 1; | 1660 | handled = 1; |
1671 | /* Acknowledge all of the current interrupt sources ASAP */ | 1661 | /* Acknowledge all of the current interrupt sources ASAP */ |
1672 | NETDRV_W16_F (IntrStatus, status); | 1662 | NETDRV_W16_F(IntrStatus, status); |
1673 | 1663 | ||
1674 | DPRINTK ("%s: interrupt status=%#4.4x new intstat=%#4.4x.\n", | 1664 | netdev_dbg(dev, "interrupt status=%#04x new intstat=%#04x\n", |
1675 | dev->name, status, | 1665 | status, NETDRV_R16(IntrStatus)); |
1676 | NETDRV_R16 (IntrStatus)); | ||
1677 | 1666 | ||
1678 | if ((status & | 1667 | if ((status & |
1679 | (PCIErr | PCSTimeout | RxUnderrun | RxOverflow | | 1668 | (PCIErr | PCSTimeout | RxUnderrun | RxOverflow | |
@@ -1682,69 +1671,67 @@ static irqreturn_t netdrv_interrupt (int irq, void *dev_instance) | |||
1682 | 1671 | ||
1683 | /* Check uncommon events with one test. */ | 1672 | /* Check uncommon events with one test. */ |
1684 | if (status & (PCIErr | PCSTimeout | RxUnderrun | RxOverflow | | 1673 | if (status & (PCIErr | PCSTimeout | RxUnderrun | RxOverflow | |
1685 | RxFIFOOver | TxErr | RxErr)) | 1674 | RxFIFOOver | TxErr | RxErr)) |
1686 | netdrv_weird_interrupt (dev, tp, ioaddr, | 1675 | netdrv_weird_interrupt(dev, tp, ioaddr, |
1687 | status, link_changed); | 1676 | status, link_changed); |
1688 | 1677 | ||
1689 | if (status & (RxOK | RxUnderrun | RxOverflow | RxFIFOOver)) /* Rx interrupt */ | 1678 | if (status & (RxOK | RxUnderrun | RxOverflow | RxFIFOOver)) /* Rx interrupt */ |
1690 | netdrv_rx_interrupt (dev, tp, ioaddr); | 1679 | netdrv_rx_interrupt(dev, tp, ioaddr); |
1691 | 1680 | ||
1692 | if (status & (TxOK | TxErr)) | 1681 | if (status & (TxOK | TxErr)) |
1693 | netdrv_tx_interrupt (dev, tp, ioaddr); | 1682 | netdrv_tx_interrupt(dev, tp, ioaddr); |
1694 | 1683 | ||
1695 | boguscnt--; | 1684 | boguscnt--; |
1696 | } while (boguscnt > 0); | 1685 | } while (boguscnt > 0); |
1697 | 1686 | ||
1698 | if (boguscnt <= 0) { | 1687 | if (boguscnt <= 0) { |
1699 | printk (KERN_WARNING | 1688 | netdev_warn(dev, "Too much work at interrupt, IntrStatus=%#04x\n", |
1700 | "%s: Too much work at interrupt, " | 1689 | status); |
1701 | "IntrStatus=0x%4.4x.\n", dev->name, | ||
1702 | status); | ||
1703 | 1690 | ||
1704 | /* Clear all interrupt sources. */ | 1691 | /* Clear all interrupt sources. */ |
1705 | NETDRV_W16 (IntrStatus, 0xffff); | 1692 | NETDRV_W16(IntrStatus, 0xffff); |
1706 | } | 1693 | } |
1707 | 1694 | ||
1708 | spin_unlock (&tp->lock); | 1695 | spin_unlock(&tp->lock); |
1709 | 1696 | ||
1710 | DPRINTK ("%s: exiting interrupt, intr_status=%#4.4x.\n", | 1697 | netdev_dbg(dev, "exiting interrupt, intr_status=%#04x\n", |
1711 | dev->name, NETDRV_R16 (IntrStatus)); | 1698 | NETDRV_R16(IntrStatus)); |
1712 | return IRQ_RETVAL(handled); | 1699 | return IRQ_RETVAL(handled); |
1713 | } | 1700 | } |
1714 | 1701 | ||
1715 | 1702 | ||
1716 | static int netdrv_close (struct net_device *dev) | 1703 | static int netdrv_close(struct net_device *dev) |
1717 | { | 1704 | { |
1718 | struct netdrv_private *tp = netdev_priv(dev); | 1705 | struct netdrv_private *tp = netdev_priv(dev); |
1719 | void *ioaddr = tp->mmio_addr; | 1706 | void *ioaddr = tp->mmio_addr; |
1720 | unsigned long flags; | 1707 | unsigned long flags; |
1721 | 1708 | ||
1722 | DPRINTK ("ENTER\n"); | 1709 | DPRINTK("ENTER\n"); |
1723 | 1710 | ||
1724 | netif_stop_queue (dev); | 1711 | netif_stop_queue(dev); |
1725 | 1712 | ||
1726 | DPRINTK ("%s: Shutting down ethercard, status was 0x%4.4x.\n", | 1713 | netdev_dbg(dev, "Shutting down ethercard, status was %#04x\n", |
1727 | dev->name, NETDRV_R16 (IntrStatus)); | 1714 | NETDRV_R16(IntrStatus)); |
1728 | 1715 | ||
1729 | del_timer_sync (&tp->timer); | 1716 | del_timer_sync(&tp->timer); |
1730 | 1717 | ||
1731 | spin_lock_irqsave (&tp->lock, flags); | 1718 | spin_lock_irqsave(&tp->lock, flags); |
1732 | 1719 | ||
1733 | /* Stop the chip's Tx and Rx DMA processes. */ | 1720 | /* Stop the chip's Tx and Rx DMA processes. */ |
1734 | NETDRV_W8 (ChipCmd, (NETDRV_R8 (ChipCmd) & ChipCmdClear)); | 1721 | NETDRV_W8(ChipCmd, (NETDRV_R8(ChipCmd) & ChipCmdClear)); |
1735 | 1722 | ||
1736 | /* Disable interrupts by clearing the interrupt mask. */ | 1723 | /* Disable interrupts by clearing the interrupt mask. */ |
1737 | NETDRV_W16 (IntrMask, 0x0000); | 1724 | NETDRV_W16(IntrMask, 0x0000); |
1738 | 1725 | ||
1739 | /* Update the error counts. */ | 1726 | /* Update the error counts. */ |
1740 | dev->stats.rx_missed_errors += NETDRV_R32 (RxMissed); | 1727 | dev->stats.rx_missed_errors += NETDRV_R32(RxMissed); |
1741 | NETDRV_W32 (RxMissed, 0); | 1728 | NETDRV_W32(RxMissed, 0); |
1742 | 1729 | ||
1743 | spin_unlock_irqrestore (&tp->lock, flags); | 1730 | spin_unlock_irqrestore(&tp->lock, flags); |
1744 | 1731 | ||
1745 | free_irq (dev->irq, dev); | 1732 | free_irq(dev->irq, dev); |
1746 | 1733 | ||
1747 | netdrv_tx_clear (dev); | 1734 | netdrv_tx_clear(dev); |
1748 | 1735 | ||
1749 | pci_free_consistent(tp->pci_dev, RX_BUF_TOT_LEN, | 1736 | pci_free_consistent(tp->pci_dev, RX_BUF_TOT_LEN, |
1750 | tp->rx_ring, tp->rx_ring_dma); | 1737 | tp->rx_ring, tp->rx_ring_dma); |
@@ -1754,23 +1741,23 @@ static int netdrv_close (struct net_device *dev) | |||
1754 | tp->tx_bufs = NULL; | 1741 | tp->tx_bufs = NULL; |
1755 | 1742 | ||
1756 | /* Green! Put the chip in low-power mode. */ | 1743 | /* Green! Put the chip in low-power mode. */ |
1757 | NETDRV_W8 (Cfg9346, Cfg9346_Unlock); | 1744 | NETDRV_W8(Cfg9346, Cfg9346_Unlock); |
1758 | NETDRV_W8 (Config1, 0x03); | 1745 | NETDRV_W8(Config1, 0x03); |
1759 | NETDRV_W8 (Cfg9346, Cfg9346_Lock); | 1746 | NETDRV_W8(Cfg9346, Cfg9346_Lock); |
1760 | 1747 | ||
1761 | DPRINTK ("EXIT\n"); | 1748 | DPRINTK("EXIT\n"); |
1762 | return 0; | 1749 | return 0; |
1763 | } | 1750 | } |
1764 | 1751 | ||
1765 | 1752 | ||
1766 | static int netdrv_ioctl (struct net_device *dev, struct ifreq *rq, int cmd) | 1753 | static int netdrv_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) |
1767 | { | 1754 | { |
1768 | struct netdrv_private *tp = netdev_priv(dev); | 1755 | struct netdrv_private *tp = netdev_priv(dev); |
1769 | struct mii_ioctl_data *data = if_mii(rq); | 1756 | struct mii_ioctl_data *data = if_mii(rq); |
1770 | unsigned long flags; | 1757 | unsigned long flags; |
1771 | int rc = 0; | 1758 | int rc = 0; |
1772 | 1759 | ||
1773 | DPRINTK ("ENTER\n"); | 1760 | DPRINTK("ENTER\n"); |
1774 | 1761 | ||
1775 | switch (cmd) { | 1762 | switch (cmd) { |
1776 | case SIOCGMIIPHY: /* Get address of MII PHY in use. */ | 1763 | case SIOCGMIIPHY: /* Get address of MII PHY in use. */ |
@@ -1778,15 +1765,15 @@ static int netdrv_ioctl (struct net_device *dev, struct ifreq *rq, int cmd) | |||
1778 | /* Fall Through */ | 1765 | /* Fall Through */ |
1779 | 1766 | ||
1780 | case SIOCGMIIREG: /* Read MII PHY register. */ | 1767 | case SIOCGMIIREG: /* Read MII PHY register. */ |
1781 | spin_lock_irqsave (&tp->lock, flags); | 1768 | spin_lock_irqsave(&tp->lock, flags); |
1782 | data->val_out = mdio_read (dev, data->phy_id & 0x1f, data->reg_num & 0x1f); | 1769 | data->val_out = mdio_read(dev, data->phy_id & 0x1f, data->reg_num & 0x1f); |
1783 | spin_unlock_irqrestore (&tp->lock, flags); | 1770 | spin_unlock_irqrestore(&tp->lock, flags); |
1784 | break; | 1771 | break; |
1785 | 1772 | ||
1786 | case SIOCSMIIREG: /* Write MII PHY register. */ | 1773 | case SIOCSMIIREG: /* Write MII PHY register. */ |
1787 | spin_lock_irqsave (&tp->lock, flags); | 1774 | spin_lock_irqsave(&tp->lock, flags); |
1788 | mdio_write (dev, data->phy_id & 0x1f, data->reg_num & 0x1f, data->val_in); | 1775 | mdio_write(dev, data->phy_id & 0x1f, data->reg_num & 0x1f, data->val_in); |
1789 | spin_unlock_irqrestore (&tp->lock, flags); | 1776 | spin_unlock_irqrestore(&tp->lock, flags); |
1790 | break; | 1777 | break; |
1791 | 1778 | ||
1792 | default: | 1779 | default: |
@@ -1794,14 +1781,14 @@ static int netdrv_ioctl (struct net_device *dev, struct ifreq *rq, int cmd) | |||
1794 | break; | 1781 | break; |
1795 | } | 1782 | } |
1796 | 1783 | ||
1797 | DPRINTK ("EXIT, returning %d\n", rc); | 1784 | DPRINTK("EXIT, returning %d\n", rc); |
1798 | return rc; | 1785 | return rc; |
1799 | } | 1786 | } |
1800 | 1787 | ||
1801 | /* Set or clear the multicast filter for this adaptor. | 1788 | /* Set or clear the multicast filter for this adaptor. |
1802 | This routine is not state sensitive and need not be SMP locked. */ | 1789 | This routine is not state sensitive and need not be SMP locked. */ |
1803 | 1790 | ||
1804 | static void netdrv_set_rx_mode (struct net_device *dev) | 1791 | static void netdrv_set_rx_mode(struct net_device *dev) |
1805 | { | 1792 | { |
1806 | struct netdrv_private *tp = netdev_priv(dev); | 1793 | struct netdrv_private *tp = netdev_priv(dev); |
1807 | void *ioaddr = tp->mmio_addr; | 1794 | void *ioaddr = tp->mmio_addr; |
@@ -1809,16 +1796,16 @@ static void netdrv_set_rx_mode (struct net_device *dev) | |||
1809 | int i, rx_mode; | 1796 | int i, rx_mode; |
1810 | u32 tmp; | 1797 | u32 tmp; |
1811 | 1798 | ||
1812 | DPRINTK ("ENTER\n"); | 1799 | DPRINTK("ENTER\n"); |
1813 | 1800 | ||
1814 | DPRINTK ("%s: netdrv_set_rx_mode(%4.4x) done -- Rx config %8.8x.\n", | 1801 | netdev_dbg(dev, "%s(%04x) done -- Rx config %08lx\n", |
1815 | dev->name, dev->flags, NETDRV_R32 (RxConfig)); | 1802 | __func__, dev->flags, NETDRV_R32(RxConfig)); |
1816 | 1803 | ||
1817 | /* Note: do not reorder, GCC is clever about common statements. */ | 1804 | /* Note: do not reorder, GCC is clever about common statements. */ |
1818 | if (dev->flags & IFF_PROMISC) { | 1805 | if (dev->flags & IFF_PROMISC) { |
1819 | rx_mode = | 1806 | rx_mode = |
1820 | AcceptBroadcast | AcceptMulticast | AcceptMyPhys | | 1807 | AcceptBroadcast | AcceptMulticast | AcceptMyPhys | |
1821 | AcceptAllPhys; | 1808 | AcceptAllPhys; |
1822 | mc_filter[1] = mc_filter[0] = 0xffffffff; | 1809 | mc_filter[1] = mc_filter[0] = 0xffffffff; |
1823 | } else if ((netdev_mc_count(dev) > multicast_filter_limit) || | 1810 | } else if ((netdev_mc_count(dev) > multicast_filter_limit) || |
1824 | (dev->flags & IFF_ALLMULTI)) { | 1811 | (dev->flags & IFF_ALLMULTI)) { |
@@ -1838,66 +1825,66 @@ static void netdrv_set_rx_mode (struct net_device *dev) | |||
1838 | } | 1825 | } |
1839 | 1826 | ||
1840 | /* if called from irq handler, lock already acquired */ | 1827 | /* if called from irq handler, lock already acquired */ |
1841 | if (!in_irq ()) | 1828 | if (!in_irq()) |
1842 | spin_lock_irq (&tp->lock); | 1829 | spin_lock_irq(&tp->lock); |
1843 | 1830 | ||
1844 | /* We can safely update without stopping the chip. */ | 1831 | /* We can safely update without stopping the chip. */ |
1845 | tmp = netdrv_rx_config | rx_mode | | 1832 | tmp = netdrv_rx_config | rx_mode | |
1846 | (NETDRV_R32 (RxConfig) & rtl_chip_info[tp->chipset].RxConfigMask); | 1833 | (NETDRV_R32(RxConfig) & rtl_chip_info[tp->chipset].RxConfigMask); |
1847 | NETDRV_W32_F (RxConfig, tmp); | 1834 | NETDRV_W32_F(RxConfig, tmp); |
1848 | NETDRV_W32_F (MAR0 + 0, mc_filter[0]); | 1835 | NETDRV_W32_F(MAR0 + 0, mc_filter[0]); |
1849 | NETDRV_W32_F (MAR0 + 4, mc_filter[1]); | 1836 | NETDRV_W32_F(MAR0 + 4, mc_filter[1]); |
1850 | 1837 | ||
1851 | if (!in_irq ()) | 1838 | if (!in_irq()) |
1852 | spin_unlock_irq (&tp->lock); | 1839 | spin_unlock_irq(&tp->lock); |
1853 | 1840 | ||
1854 | DPRINTK ("EXIT\n"); | 1841 | DPRINTK("EXIT\n"); |
1855 | } | 1842 | } |
1856 | 1843 | ||
1857 | 1844 | ||
1858 | #ifdef CONFIG_PM | 1845 | #ifdef CONFIG_PM |
1859 | 1846 | ||
1860 | static int netdrv_suspend (struct pci_dev *pdev, pm_message_t state) | 1847 | static int netdrv_suspend(struct pci_dev *pdev, pm_message_t state) |
1861 | { | 1848 | { |
1862 | struct net_device *dev = pci_get_drvdata (pdev); | 1849 | struct net_device *dev = pci_get_drvdata(pdev); |
1863 | struct netdrv_private *tp = netdev_priv(dev); | 1850 | struct netdrv_private *tp = netdev_priv(dev); |
1864 | void *ioaddr = tp->mmio_addr; | 1851 | void *ioaddr = tp->mmio_addr; |
1865 | unsigned long flags; | 1852 | unsigned long flags; |
1866 | 1853 | ||
1867 | if (!netif_running(dev)) | 1854 | if (!netif_running(dev)) |
1868 | return 0; | 1855 | return 0; |
1869 | netif_device_detach (dev); | 1856 | netif_device_detach(dev); |
1870 | 1857 | ||
1871 | spin_lock_irqsave (&tp->lock, flags); | 1858 | spin_lock_irqsave(&tp->lock, flags); |
1872 | 1859 | ||
1873 | /* Disable interrupts, stop Tx and Rx. */ | 1860 | /* Disable interrupts, stop Tx and Rx. */ |
1874 | NETDRV_W16 (IntrMask, 0x0000); | 1861 | NETDRV_W16(IntrMask, 0x0000); |
1875 | NETDRV_W8 (ChipCmd, (NETDRV_R8 (ChipCmd) & ChipCmdClear)); | 1862 | NETDRV_W8(ChipCmd, (NETDRV_R8(ChipCmd) & ChipCmdClear)); |
1876 | 1863 | ||
1877 | /* Update the error counts. */ | 1864 | /* Update the error counts. */ |
1878 | dev->stats.rx_missed_errors += NETDRV_R32 (RxMissed); | 1865 | dev->stats.rx_missed_errors += NETDRV_R32(RxMissed); |
1879 | NETDRV_W32 (RxMissed, 0); | 1866 | NETDRV_W32(RxMissed, 0); |
1880 | 1867 | ||
1881 | spin_unlock_irqrestore (&tp->lock, flags); | 1868 | spin_unlock_irqrestore(&tp->lock, flags); |
1882 | 1869 | ||
1883 | pci_save_state (pdev); | 1870 | pci_save_state(pdev); |
1884 | pci_set_power_state (pdev, PCI_D3hot); | 1871 | pci_set_power_state(pdev, PCI_D3hot); |
1885 | 1872 | ||
1886 | return 0; | 1873 | return 0; |
1887 | } | 1874 | } |
1888 | 1875 | ||
1889 | 1876 | ||
1890 | static int netdrv_resume (struct pci_dev *pdev) | 1877 | static int netdrv_resume(struct pci_dev *pdev) |
1891 | { | 1878 | { |
1892 | struct net_device *dev = pci_get_drvdata (pdev); | 1879 | struct net_device *dev = pci_get_drvdata(pdev); |
1893 | /*struct netdrv_private *tp = netdev_priv(dev);*/ | 1880 | /*struct netdrv_private *tp = netdev_priv(dev);*/ |
1894 | 1881 | ||
1895 | if (!netif_running(dev)) | 1882 | if (!netif_running(dev)) |
1896 | return 0; | 1883 | return 0; |
1897 | pci_set_power_state (pdev, PCI_D0); | 1884 | pci_set_power_state(pdev, PCI_D0); |
1898 | pci_restore_state (pdev); | 1885 | pci_restore_state(pdev); |
1899 | netif_device_attach (dev); | 1886 | netif_device_attach(dev); |
1900 | netdrv_hw_start (dev); | 1887 | netdrv_hw_start(dev); |
1901 | 1888 | ||
1902 | return 0; | 1889 | return 0; |
1903 | } | 1890 | } |
@@ -1917,7 +1904,7 @@ static struct pci_driver netdrv_pci_driver = { | |||
1917 | }; | 1904 | }; |
1918 | 1905 | ||
1919 | 1906 | ||
1920 | static int __init netdrv_init_module (void) | 1907 | static int __init netdrv_init_module(void) |
1921 | { | 1908 | { |
1922 | /* when a module, this is printed whether or not devices are found in probe */ | 1909 | /* when a module, this is printed whether or not devices are found in probe */ |
1923 | #ifdef MODULE | 1910 | #ifdef MODULE |
@@ -1927,9 +1914,9 @@ static int __init netdrv_init_module (void) | |||
1927 | } | 1914 | } |
1928 | 1915 | ||
1929 | 1916 | ||
1930 | static void __exit netdrv_cleanup_module (void) | 1917 | static void __exit netdrv_cleanup_module(void) |
1931 | { | 1918 | { |
1932 | pci_unregister_driver (&netdrv_pci_driver); | 1919 | pci_unregister_driver(&netdrv_pci_driver); |
1933 | } | 1920 | } |
1934 | 1921 | ||
1935 | 1922 | ||