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authorOlof Johansson <olof@lixom.net>2007-10-02 17:27:57 -0400
committerDavid S. Miller <davem@sunset.davemloft.net>2007-10-10 19:54:27 -0400
commitb5254eee7994ba0a44ba7386cb66c2ce2f30fcc6 (patch)
treef21fe0be6225cc6fce029ffcadb45ec4a5d93faf /drivers/net/pasemi_mac.h
parent9e81d331f2ec65695e4366ce592e14f9700bae8b (diff)
pasemi_mac: use buffer index pointer in clean_rx()
pasemi_mac: use buffer index pointer in clean_rx() Use the new features in B0 for buffer ring index on the receive side. This means we no longer have to search in the ring for where the buffer came from. Also cleanup the RX cleaning side a little, while I was at it. Note: Pre-B0 hardware is no longer supported, and needs a pile of other workarounds that are not being submitted for mainline inclusion. So the fact that this breaks old hardware is not a problem at this time. Signed-off-by: Olof Johansson <olof@lixom.net> Signed-off-by: Jeff Garzik <jeff@garzik.org>
Diffstat (limited to 'drivers/net/pasemi_mac.h')
-rw-r--r--drivers/net/pasemi_mac.h21
1 files changed, 17 insertions, 4 deletions
diff --git a/drivers/net/pasemi_mac.h b/drivers/net/pasemi_mac.h
index 0bb3c487478d..1a120408cf3f 100644
--- a/drivers/net/pasemi_mac.h
+++ b/drivers/net/pasemi_mac.h
@@ -206,12 +206,15 @@ enum {
206#define PAS_DMA_RXINT_RCMDSTA_DROPS_M 0xfffe0000 206#define PAS_DMA_RXINT_RCMDSTA_DROPS_M 0xfffe0000
207#define PAS_DMA_RXINT_RCMDSTA_DROPS_S 17 207#define PAS_DMA_RXINT_RCMDSTA_DROPS_S 17
208#define PAS_DMA_RXINT_CFG(i) (0x204+(i)*_PAS_DMA_RXINT_STRIDE) 208#define PAS_DMA_RXINT_CFG(i) (0x204+(i)*_PAS_DMA_RXINT_STRIDE)
209#define PAS_DMA_RXINT_CFG_RBP 0x80000000
210#define PAS_DMA_RXINT_CFG_ITRR 0x40000000
209#define PAS_DMA_RXINT_CFG_DHL_M 0x07000000 211#define PAS_DMA_RXINT_CFG_DHL_M 0x07000000
210#define PAS_DMA_RXINT_CFG_DHL_S 24 212#define PAS_DMA_RXINT_CFG_DHL_S 24
211#define PAS_DMA_RXINT_CFG_DHL(x) (((x) << PAS_DMA_RXINT_CFG_DHL_S) & \ 213#define PAS_DMA_RXINT_CFG_DHL(x) (((x) << PAS_DMA_RXINT_CFG_DHL_S) & \
212 PAS_DMA_RXINT_CFG_DHL_M) 214 PAS_DMA_RXINT_CFG_DHL_M)
213#define PAS_DMA_RXINT_CFG_LW 0x00200000 215#define PAS_DMA_RXINT_CFG_LW 0x00200000
214#define PAS_DMA_RXINT_CFG_L2 0x00100000 216#define PAS_DMA_RXINT_CFG_L2 0x00100000
217#define PAS_DMA_RXINT_CFG_HEN 0x00080000
215#define PAS_DMA_RXINT_CFG_WIF 0x00000002 218#define PAS_DMA_RXINT_CFG_WIF 0x00000002
216#define PAS_DMA_RXINT_CFG_WIL 0x00000001 219#define PAS_DMA_RXINT_CFG_WIL 0x00000001
217 220
@@ -425,10 +428,9 @@ enum {
425/* Receive descriptor fields */ 428/* Receive descriptor fields */
426#define XCT_MACRX_T 0x8000000000000000ull 429#define XCT_MACRX_T 0x8000000000000000ull
427#define XCT_MACRX_ST 0x4000000000000000ull 430#define XCT_MACRX_ST 0x4000000000000000ull
428#define XCT_MACRX_NORES 0x0000000000000000ull 431#define XCT_MACRX_RR_M 0x3000000000000000ull
429#define XCT_MACRX_8BRES 0x1000000000000000ull 432#define XCT_MACRX_RR_NORES 0x0000000000000000ull
430#define XCT_MACRX_24BRES 0x2000000000000000ull 433#define XCT_MACRX_RR_8BRES 0x1000000000000000ull
431#define XCT_MACRX_40BRES 0x3000000000000000ull
432#define XCT_MACRX_O 0x0400000000000000ull 434#define XCT_MACRX_O 0x0400000000000000ull
433#define XCT_MACRX_E 0x0200000000000000ull 435#define XCT_MACRX_E 0x0200000000000000ull
434#define XCT_MACRX_FF 0x0100000000000000ull 436#define XCT_MACRX_FF 0x0100000000000000ull
@@ -476,6 +478,17 @@ enum {
476#define XCT_PTR_ADDR(x) ((((long)(x)) << XCT_PTR_ADDR_S) & \ 478#define XCT_PTR_ADDR(x) ((((long)(x)) << XCT_PTR_ADDR_S) & \
477 XCT_PTR_ADDR_M) 479 XCT_PTR_ADDR_M)
478 480
481/* Receive interface 8byte result fields */
482#define XCT_RXRES_8B_L4O_M 0xff00000000000000ull
483#define XCT_RXRES_8B_L4O_S 56
484#define XCT_RXRES_8B_RULE_M 0x00ffff0000000000ull
485#define XCT_RXRES_8B_RULE_S 40
486#define XCT_RXRES_8B_EVAL_M 0x000000ffff000000ull
487#define XCT_RXRES_8B_EVAL_S 24
488#define XCT_RXRES_8B_HTYPE_M 0x0000000000f00000ull
489#define XCT_RXRES_8B_HASH_M 0x00000000000fffffull
490#define XCT_RXRES_8B_HASH_S 0
491
479/* Receive interface buffer fields */ 492/* Receive interface buffer fields */
480#define XCT_RXB_LEN_M 0x0ffff00000000000ull 493#define XCT_RXB_LEN_M 0x0ffff00000000000ull
481#define XCT_RXB_LEN_S 44 494#define XCT_RXB_LEN_S 44