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authorDhananjay Phadke <dhananjay@netxen.com>2009-03-02 11:02:16 -0500
committerDavid S. Miller <davem@davemloft.net>2009-03-03 03:05:26 -0500
commit1f434f638457712732238329dfdf089eab25e5b3 (patch)
tree11740366d95d15a87ec4c266c00ed7007bb11d27 /drivers/net/netxen
parent7e99013a5043cacd375375c3efad35b57c3afdba (diff)
netxen: support larger dma addressing
Support larger dma mask if firmware indicates capability to handle larger addresses. Signed-off-by: Dhananjay Phadke <dhananjay@netxen.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/netxen')
-rw-r--r--drivers/net/netxen/netxen_nic.h2
-rw-r--r--drivers/net/netxen/netxen_nic_main.c76
-rw-r--r--drivers/net/netxen/netxen_nic_phan_reg.h1
3 files changed, 46 insertions, 33 deletions
diff --git a/drivers/net/netxen/netxen_nic.h b/drivers/net/netxen/netxen_nic.h
index bbdd8f2d152b..bd5fbb4ce865 100644
--- a/drivers/net/netxen/netxen_nic.h
+++ b/drivers/net/netxen/netxen_nic.h
@@ -1256,8 +1256,6 @@ struct netxen_adapter {
1256 u32 crb_win; 1256 u32 crb_win;
1257 rwlock_t adapter_lock; 1257 rwlock_t adapter_lock;
1258 1258
1259 uint64_t dma_mask;
1260
1261 u32 cmd_producer; 1259 u32 cmd_producer;
1262 __le32 *cmd_consumer; 1260 __le32 *cmd_consumer;
1263 u32 last_cmd_consumer; 1261 u32 last_cmd_consumer;
diff --git a/drivers/net/netxen/netxen_nic_main.c b/drivers/net/netxen/netxen_nic_main.c
index 02f5240245b9..0ce7cf0dc99c 100644
--- a/drivers/net/netxen/netxen_nic_main.c
+++ b/drivers/net/netxen/netxen_nic_main.c
@@ -166,50 +166,61 @@ static inline void netxen_nic_enable_int(struct netxen_adapter *adapter)
166static int nx_set_dma_mask(struct netxen_adapter *adapter, uint8_t revision_id) 166static int nx_set_dma_mask(struct netxen_adapter *adapter, uint8_t revision_id)
167{ 167{
168 struct pci_dev *pdev = adapter->pdev; 168 struct pci_dev *pdev = adapter->pdev;
169 int err; 169 uint64_t mask, cmask;
170 uint64_t mask; 170
171 171 adapter->pci_using_dac = 0;
172#ifdef CONFIG_IA64
173 adapter->dma_mask = DMA_32BIT_MASK;
174#else
175 if (revision_id >= NX_P3_B0) {
176 /* should go to DMA_64BIT_MASK */
177 adapter->dma_mask = DMA_39BIT_MASK;
178 mask = DMA_39BIT_MASK;
179 } else if (revision_id == NX_P3_A2) {
180 adapter->dma_mask = DMA_39BIT_MASK;
181 mask = DMA_39BIT_MASK;
182 } else if (revision_id == NX_P2_C1) {
183 adapter->dma_mask = DMA_35BIT_MASK;
184 mask = DMA_35BIT_MASK;
185 } else {
186 adapter->dma_mask = DMA_32BIT_MASK;
187 mask = DMA_32BIT_MASK;
188 goto set_32_bit_mask;
189 }
190 172
173 mask = DMA_32BIT_MASK;
191 /* 174 /*
192 * Consistent DMA mask is set to 32 bit because it cannot be set to 175 * Consistent DMA mask is set to 32 bit because it cannot be set to
193 * 35 bits. For P3 also leave it at 32 bits for now. Only the rings 176 * 35 bits. For P3 also leave it at 32 bits for now. Only the rings
194 * come off this pool. 177 * come off this pool.
195 */ 178 */
179 cmask = DMA_32BIT_MASK;
180
181#ifndef CONFIG_IA64
182 if (revision_id >= NX_P3_B0)
183 mask = DMA_39BIT_MASK;
184 else if (revision_id == NX_P2_C1)
185 mask = DMA_35BIT_MASK;
186#endif
196 if (pci_set_dma_mask(pdev, mask) == 0 && 187 if (pci_set_dma_mask(pdev, mask) == 0 &&
197 pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK) == 0) { 188 pci_set_consistent_dma_mask(pdev, cmask) == 0) {
198 adapter->pci_using_dac = 1; 189 adapter->pci_using_dac = 1;
199 return 0; 190 return 0;
200 } 191 }
201set_32_bit_mask:
202#endif /* CONFIG_IA64 */
203 192
204 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK); 193 return -EIO;
205 if (!err) 194}
206 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK); 195
207 if (err) { 196/* Update addressable range if firmware supports it */
208 DPRINTK(ERR, "No usable DMA configuration, aborting:%d\n", err); 197static int
209 return err; 198nx_update_dma_mask(struct netxen_adapter *adapter)
199{
200 int change, shift, err;
201 uint64_t mask, old_mask;
202 struct pci_dev *pdev = adapter->pdev;
203
204 change = 0;
205
206 shift = netxen_nic_reg_read(adapter, CRB_DMA_SHIFT);
207 if (shift >= 32)
208 return 0;
209
210 if (NX_IS_REVISION_P3(adapter->ahw.revision_id) && (shift > 9))
211 change = 1;
212 else if ((adapter->ahw.revision_id == NX_P2_C1) && (shift <= 4))
213 change = 1;
214
215 if (change) {
216 old_mask = pdev->dma_mask;
217 mask = (1ULL<<(32+shift)) - 1;
218
219 err = pci_set_dma_mask(pdev, mask);
220 if (err)
221 return pci_set_dma_mask(pdev, old_mask);
210 } 222 }
211 223
212 adapter->pci_using_dac = 0;
213 return 0; 224 return 0;
214} 225}
215 226
@@ -674,6 +685,7 @@ netxen_start_firmware(struct netxen_adapter *adapter)
674 netxen_pinit_from_rom(adapter, 0); 685 netxen_pinit_from_rom(adapter, 0);
675 msleep(1); 686 msleep(1);
676 } 687 }
688 netxen_nic_reg_write(adapter, CRB_DMA_SHIFT, 0x55555555);
677 netxen_load_firmware(adapter); 689 netxen_load_firmware(adapter);
678 690
679 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) { 691 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) {
@@ -851,6 +863,8 @@ netxen_nic_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
851 goto err_out_iounmap; 863 goto err_out_iounmap;
852 } 864 }
853 865
866 nx_update_dma_mask(adapter);
867
854 netxen_nic_flash_print(adapter); 868 netxen_nic_flash_print(adapter);
855 869
856 if (NX_IS_REVISION_P3(revision_id)) { 870 if (NX_IS_REVISION_P3(revision_id)) {
diff --git a/drivers/net/netxen/netxen_nic_phan_reg.h b/drivers/net/netxen/netxen_nic_phan_reg.h
index 2a368f284daf..50183335e43a 100644
--- a/drivers/net/netxen/netxen_nic_phan_reg.h
+++ b/drivers/net/netxen/netxen_nic_phan_reg.h
@@ -91,6 +91,7 @@
91#define CRB_RX_LRO_START_NUM NETXEN_NIC_REG(0xc0) 91#define CRB_RX_LRO_START_NUM NETXEN_NIC_REG(0xc0)
92#define CRB_MPORT_MODE NETXEN_NIC_REG(0xc4) /* Multiport Mode */ 92#define CRB_MPORT_MODE NETXEN_NIC_REG(0xc4) /* Multiport Mode */
93#define CRB_CMD_RING_SIZE NETXEN_NIC_REG(0xc8) 93#define CRB_CMD_RING_SIZE NETXEN_NIC_REG(0xc8)
94#define CRB_DMA_SHIFT NETXEN_NIC_REG(0xcc)
94#define CRB_INT_VECTOR NETXEN_NIC_REG(0xd4) 95#define CRB_INT_VECTOR NETXEN_NIC_REG(0xd4)
95#define CRB_CTX_RESET NETXEN_NIC_REG(0xd8) 96#define CRB_CTX_RESET NETXEN_NIC_REG(0xd8)
96#define CRB_HOST_STS_PROD NETXEN_NIC_REG(0xdc) 97#define CRB_HOST_STS_PROD NETXEN_NIC_REG(0xdc)