diff options
author | Dhananjay Phadke <dhananjay@netxen.com> | 2009-04-07 18:50:38 -0400 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2009-04-08 18:58:24 -0400 |
commit | e98e3350c03af4187e1d5fe007c7b460e378990c (patch) | |
tree | 5245bf0e0662ab27d1f8b33e629e4b0d118aa189 /drivers/net/netxen/netxen_nic_hw.h | |
parent | 577c9c456f0e1371cbade38eaf91ae8e8a308555 (diff) |
netxen: code cleanup
o remove unused structure defs.
o remove unnecessary includes.
o replace enums with specific #defines.
o reduce footprint of stats structure.
Signed-off-by: Dhananjay Phadke <dhananjay@netxen.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/netxen/netxen_nic_hw.h')
-rw-r--r-- | drivers/net/netxen/netxen_nic_hw.h | 66 |
1 files changed, 22 insertions, 44 deletions
diff --git a/drivers/net/netxen/netxen_nic_hw.h b/drivers/net/netxen/netxen_nic_hw.h index 04b47a7993cd..f20c96591a87 100644 --- a/drivers/net/netxen/netxen_nic_hw.h +++ b/drivers/net/netxen/netxen_nic_hw.h | |||
@@ -36,35 +36,15 @@ | |||
36 | /* Hardware memory size of 128 meg */ | 36 | /* Hardware memory size of 128 meg */ |
37 | #define NETXEN_MEMADDR_MAX (128 * 1024 * 1024) | 37 | #define NETXEN_MEMADDR_MAX (128 * 1024 * 1024) |
38 | 38 | ||
39 | #ifndef readq | ||
40 | static inline u64 readq(void __iomem * addr) | ||
41 | { | ||
42 | return readl(addr) | (((u64) readl(addr + 4)) << 32LL); | ||
43 | } | ||
44 | #endif | ||
45 | |||
46 | #ifndef writeq | ||
47 | static inline void writeq(u64 val, void __iomem * addr) | ||
48 | { | ||
49 | writel(((u32) (val)), (addr)); | ||
50 | writel(((u32) (val >> 32)), (addr + 4)); | ||
51 | } | ||
52 | #endif | ||
53 | |||
54 | struct netxen_adapter; | 39 | struct netxen_adapter; |
55 | 40 | ||
56 | #define NETXEN_PCI_MAPSIZE_BYTES (NETXEN_PCI_MAPSIZE << 20) | 41 | #define NETXEN_PCI_MAPSIZE_BYTES (NETXEN_PCI_MAPSIZE << 20) |
57 | 42 | ||
58 | struct netxen_port; | ||
59 | void netxen_nic_set_link_parameters(struct netxen_adapter *adapter); | 43 | void netxen_nic_set_link_parameters(struct netxen_adapter *adapter); |
60 | 44 | ||
61 | typedef u8 netxen_ethernet_macaddr_t[6]; | 45 | typedef u8 netxen_ethernet_macaddr_t[6]; |
62 | 46 | ||
63 | /* Nibble or Byte mode for phy interface (GbE mode only) */ | 47 | /* Nibble or Byte mode for phy interface (GbE mode only) */ |
64 | typedef enum { | ||
65 | NETXEN_NIU_10_100_MB = 0, | ||
66 | NETXEN_NIU_1000_MB | ||
67 | } netxen_niu_gbe_ifmode_t; | ||
68 | 48 | ||
69 | #define _netxen_crb_get_bit(var, bit) ((var >> bit) & 0x1) | 49 | #define _netxen_crb_get_bit(var, bit) ((var >> bit) & 0x1) |
70 | 50 | ||
@@ -222,30 +202,28 @@ typedef enum { | |||
222 | /* | 202 | /* |
223 | * PHY-Specific MII control/status registers. | 203 | * PHY-Specific MII control/status registers. |
224 | */ | 204 | */ |
225 | typedef enum { | 205 | #define NETXEN_NIU_GB_MII_MGMT_ADDR_CONTROL 0 |
226 | NETXEN_NIU_GB_MII_MGMT_ADDR_CONTROL = 0, | 206 | #define NETXEN_NIU_GB_MII_MGMT_ADDR_STATUS 1 |
227 | NETXEN_NIU_GB_MII_MGMT_ADDR_STATUS = 1, | 207 | #define NETXEN_NIU_GB_MII_MGMT_ADDR_PHY_ID_0 2 |
228 | NETXEN_NIU_GB_MII_MGMT_ADDR_PHY_ID_0 = 2, | 208 | #define NETXEN_NIU_GB_MII_MGMT_ADDR_PHY_ID_1 3 |
229 | NETXEN_NIU_GB_MII_MGMT_ADDR_PHY_ID_1 = 3, | 209 | #define NETXEN_NIU_GB_MII_MGMT_ADDR_AUTONEG 4 |
230 | NETXEN_NIU_GB_MII_MGMT_ADDR_AUTONEG = 4, | 210 | #define NETXEN_NIU_GB_MII_MGMT_ADDR_LNKPART 5 |
231 | NETXEN_NIU_GB_MII_MGMT_ADDR_LNKPART = 5, | 211 | #define NETXEN_NIU_GB_MII_MGMT_ADDR_AUTONEG_MORE 6 |
232 | NETXEN_NIU_GB_MII_MGMT_ADDR_AUTONEG_MORE = 6, | 212 | #define NETXEN_NIU_GB_MII_MGMT_ADDR_NEXTPAGE_XMIT 7 |
233 | NETXEN_NIU_GB_MII_MGMT_ADDR_NEXTPAGE_XMIT = 7, | 213 | #define NETXEN_NIU_GB_MII_MGMT_ADDR_LNKPART_NEXTPAGE 8 |
234 | NETXEN_NIU_GB_MII_MGMT_ADDR_LNKPART_NEXTPAGE = 8, | 214 | #define NETXEN_NIU_GB_MII_MGMT_ADDR_1000BT_CONTROL 9 |
235 | NETXEN_NIU_GB_MII_MGMT_ADDR_1000BT_CONTROL = 9, | 215 | #define NETXEN_NIU_GB_MII_MGMT_ADDR_1000BT_STATUS 10 |
236 | NETXEN_NIU_GB_MII_MGMT_ADDR_1000BT_STATUS = 10, | 216 | #define NETXEN_NIU_GB_MII_MGMT_ADDR_EXTENDED_STATUS 15 |
237 | NETXEN_NIU_GB_MII_MGMT_ADDR_EXTENDED_STATUS = 15, | 217 | #define NETXEN_NIU_GB_MII_MGMT_ADDR_PHY_CONTROL 16 |
238 | NETXEN_NIU_GB_MII_MGMT_ADDR_PHY_CONTROL = 16, | 218 | #define NETXEN_NIU_GB_MII_MGMT_ADDR_PHY_STATUS 17 |
239 | NETXEN_NIU_GB_MII_MGMT_ADDR_PHY_STATUS = 17, | 219 | #define NETXEN_NIU_GB_MII_MGMT_ADDR_INT_ENABLE 18 |
240 | NETXEN_NIU_GB_MII_MGMT_ADDR_INT_ENABLE = 18, | 220 | #define NETXEN_NIU_GB_MII_MGMT_ADDR_INT_STATUS 19 |
241 | NETXEN_NIU_GB_MII_MGMT_ADDR_INT_STATUS = 19, | 221 | #define NETXEN_NIU_GB_MII_MGMT_ADDR_PHY_CONTROL_MORE 20 |
242 | NETXEN_NIU_GB_MII_MGMT_ADDR_PHY_CONTROL_MORE = 20, | 222 | #define NETXEN_NIU_GB_MII_MGMT_ADDR_RECV_ERROR_COUNT 21 |
243 | NETXEN_NIU_GB_MII_MGMT_ADDR_RECV_ERROR_COUNT = 21, | 223 | #define NETXEN_NIU_GB_MII_MGMT_ADDR_LED_CONTROL 24 |
244 | NETXEN_NIU_GB_MII_MGMT_ADDR_LED_CONTROL = 24, | 224 | #define NETXEN_NIU_GB_MII_MGMT_ADDR_LED_OVERRIDE 25 |
245 | NETXEN_NIU_GB_MII_MGMT_ADDR_LED_OVERRIDE = 25, | 225 | #define NETXEN_NIU_GB_MII_MGMT_ADDR_PHY_CONTROL_MORE_YET 26 |
246 | NETXEN_NIU_GB_MII_MGMT_ADDR_PHY_CONTROL_MORE_YET = 26, | 226 | #define NETXEN_NIU_GB_MII_MGMT_ADDR_PHY_STATUS_MORE 27 |
247 | NETXEN_NIU_GB_MII_MGMT_ADDR_PHY_STATUS_MORE = 27 | ||
248 | } netxen_niu_phy_register_t; | ||
249 | 227 | ||
250 | /* | 228 | /* |
251 | * PHY-Specific Status Register (reg 17). | 229 | * PHY-Specific Status Register (reg 17). |