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authorAmit S. Kale <amitkale@netxen.com>2006-11-29 12:00:10 -0500
committerJeff Garzik <jeff@garzik.org>2006-12-02 00:16:36 -0500
commitcb8011ad53e0855ef088e0e5a4bcb98fa90c70b6 (patch)
tree2ea32fc89dab2257b359a0577ae06c6565cc99d1 /drivers/net/netxen/netxen_nic_hw.c
parentedf901638144525a140c68be01be1b22e6041a6d (diff)
[PATCH] NetXen: temp monitoring, newer firmware support, mm footprint reduction
NetXen: 1G/10G Ethernet Driver updates - Temparature monitoring and device control - Memory footprint reduction - Driver changes to support newer version of firmware Signed-off-by: Amit S. Kale <amitkale@netxen.com> netxen_nic.h | 165 ++++++++++++++++++++++++++++++++-- netxen_nic_ethtool.c | 89 ++++++++++++------ netxen_nic_hdr.h | 71 +++++++++++++- netxen_nic_hw.c | 206 +++++++++++++++++++++++++++++-------------- netxen_nic_hw.h | 8 + netxen_nic_init.c | 239 +++++++++++++++++++++++++++++++++++++++++--------- netxen_nic_ioctl.h | 12 +- netxen_nic_isr.c | 54 +++++------ netxen_nic_main.c | 121 +++++++++++++++++-------- netxen_nic_niu.c | 172 +++++++++++++++++++++++++++-------- netxen_nic_phan_reg.h | 24 ++++- 11 files changed, 891 insertions(+), 270 deletions(-) Signed-off-by: Jeff Garzik <jeff@garzik.org>
Diffstat (limited to 'drivers/net/netxen/netxen_nic_hw.c')
-rw-r--r--drivers/net/netxen/netxen_nic_hw.c206
1 files changed, 141 insertions, 65 deletions
diff --git a/drivers/net/netxen/netxen_nic_hw.c b/drivers/net/netxen/netxen_nic_hw.c
index 9603c635b054..99e647a5ae76 100644
--- a/drivers/net/netxen/netxen_nic_hw.c
+++ b/drivers/net/netxen/netxen_nic_hw.c
@@ -6,12 +6,12 @@
6 * modify it under the terms of the GNU General Public License 6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2 7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version. 8 * of the License, or (at your option) any later version.
9 * 9 *
10 * This program is distributed in the hope that it will be useful, but 10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of 11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details. 13 * GNU General Public License for more details.
14 * 14 *
15 * You should have received a copy of the GNU General Public License 15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software 16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, 17 * Foundation, Inc., 59 Temple Place - Suite 330, Boston,
@@ -43,15 +43,26 @@
43#define NETXEN_FLASH_BASE (BOOTLD_START) 43#define NETXEN_FLASH_BASE (BOOTLD_START)
44#define NETXEN_PHANTOM_MEM_BASE (NETXEN_FLASH_BASE) 44#define NETXEN_PHANTOM_MEM_BASE (NETXEN_FLASH_BASE)
45#define NETXEN_MAX_MTU 8000 45#define NETXEN_MAX_MTU 8000
46#define NETXEN_MIN_MTU 64 46#define NETXEN_MIN_MTU 64
47#define NETXEN_ETH_FCS_SIZE 4 47#define NETXEN_ETH_FCS_SIZE 4
48#define NETXEN_ENET_HEADER_SIZE 14 48#define NETXEN_ENET_HEADER_SIZE 14
49#define NETXEN_WINDOW_ONE 0x2000000 /* CRB Window: bit 25 of CRB address */ 49#define NETXEN_WINDOW_ONE 0x2000000 /*CRB Window: bit 25 of CRB address */
50#define NETXEN_FIRMWARE_LEN ((16 * 1024) / 4) 50#define NETXEN_FIRMWARE_LEN ((16 * 1024) / 4)
51#define NETXEN_NIU_HDRSIZE (0x1 << 6) 51#define NETXEN_NIU_HDRSIZE (0x1 << 6)
52#define NETXEN_NIU_TLRSIZE (0x1 << 5) 52#define NETXEN_NIU_TLRSIZE (0x1 << 5)
53 53
54unsigned long netxen_nic_pci_set_window(void __iomem * pci_base, 54#define lower32(x) ((u32)((x) & 0xffffffff))
55#define upper32(x) \
56 ((u32)(((unsigned long long)(x) >> 32) & 0xffffffff))
57
58#define NETXEN_NIC_ZERO_PAUSE_ADDR 0ULL
59#define NETXEN_NIC_UNIT_PAUSE_ADDR 0x200ULL
60#define NETXEN_NIC_EPG_PAUSE_ADDR1 0x2200010000c28001ULL
61#define NETXEN_NIC_EPG_PAUSE_ADDR2 0x0100088866554433ULL
62
63#define NETXEN_NIC_WINDOW_MARGIN 0x100000
64
65unsigned long netxen_nic_pci_set_window(struct netxen_adapter *adapter,
55 unsigned long long addr); 66 unsigned long long addr);
56void netxen_free_hw_resources(struct netxen_adapter *adapter); 67void netxen_free_hw_resources(struct netxen_adapter *adapter);
57 68
@@ -93,7 +104,9 @@ void netxen_nic_set_multi(struct net_device *netdev)
93 port->portnum, 104 port->portnum,
94 NETXEN_NIU_PROMISC_MODE); 105 NETXEN_NIU_PROMISC_MODE);
95 } else { 106 } else {
96 if (adapter->ops->unset_promisc) 107 if (adapter->ops->unset_promisc &&
108 adapter->ahw.boardcfg.board_type
109 != NETXEN_BRDTYPE_P2_SB31_10G_IMEZ)
97 adapter->ops->unset_promisc(adapter, 110 adapter->ops->unset_promisc(adapter,
98 port->portnum, 111 port->portnum,
99 NETXEN_NIU_NON_PROMISC_MODE); 112 NETXEN_NIU_NON_PROMISC_MODE);
@@ -161,26 +174,24 @@ int netxen_nic_change_mtu(struct net_device *netdev, int mtu)
161int netxen_nic_hw_resources(struct netxen_adapter *adapter) 174int netxen_nic_hw_resources(struct netxen_adapter *adapter)
162{ 175{
163 struct netxen_hardware_context *hw = &adapter->ahw; 176 struct netxen_hardware_context *hw = &adapter->ahw;
164 int i;
165 u32 state = 0; 177 u32 state = 0;
166 void *addr; 178 void *addr;
179 void *pause_addr;
167 int loops = 0, err = 0; 180 int loops = 0, err = 0;
168 int ctx, ring; 181 int ctx, ring;
169 u32 card_cmdring = 0; 182 u32 card_cmdring = 0;
170 struct netxen_rcv_desc_crb *rcv_desc_crb = NULL; 183 struct netxen_rcv_desc_crb *rcv_desc_crb = NULL;
171 struct netxen_recv_context *recv_ctx; 184 struct netxen_recv_context *recv_ctx;
172 struct netxen_rcv_desc_ctx *rcv_desc; 185 struct netxen_rcv_desc_ctx *rcv_desc;
173 struct cmd_desc_type0 *pcmd;
174 186
175 DPRINTK(INFO, "pci_base: %lx\n", adapter->ahw.pci_base);
176 DPRINTK(INFO, "crb_base: %lx %lx", NETXEN_PCI_CRBSPACE, 187 DPRINTK(INFO, "crb_base: %lx %lx", NETXEN_PCI_CRBSPACE,
177 adapter->ahw.pci_base + NETXEN_PCI_CRBSPACE); 188 PCI_OFFSET_SECOND_RANGE(adapter, NETXEN_PCI_CRBSPACE));
178 DPRINTK(INFO, "cam base: %lx %lx", NETXEN_CRB_CAM, 189 DPRINTK(INFO, "cam base: %lx %lx", NETXEN_CRB_CAM,
179 adapter->ahw.pci_base + NETXEN_CRB_CAM); 190 pci_base_offset(adapter, NETXEN_CRB_CAM));
180 DPRINTK(INFO, "cam RAM: %lx %lx", NETXEN_CAM_RAM_BASE, 191 DPRINTK(INFO, "cam RAM: %lx %lx", NETXEN_CAM_RAM_BASE,
181 adapter->ahw.pci_base + NETXEN_CAM_RAM_BASE); 192 pci_base_offset(adapter, NETXEN_CAM_RAM_BASE));
182 DPRINTK(INFO, "NIC base:%lx %lx\n", NIC_CRB_BASE_PORT1, 193 DPRINTK(INFO, "NIC base:%lx %lx\n", NIC_CRB_BASE_PORT1,
183 adapter->ahw.pci_base + NIC_CRB_BASE_PORT1); 194 pci_base_offset(adapter, NIC_CRB_BASE_PORT1));
184 195
185 /* Window 1 call */ 196 /* Window 1 call */
186 card_cmdring = readl(NETXEN_CRB_NORMALIZE(adapter, CRB_CMDPEG_CMDRING)); 197 card_cmdring = readl(NETXEN_CRB_NORMALIZE(adapter, CRB_CMDPEG_CMDRING));
@@ -214,25 +225,34 @@ int netxen_nic_hw_resources(struct netxen_adapter *adapter)
214 } 225 }
215 DPRINTK(INFO, "Recieve Peg ready too. starting stuff\n"); 226 DPRINTK(INFO, "Recieve Peg ready too. starting stuff\n");
216 227
217 addr = pci_alloc_consistent(adapter->ahw.pdev, 228 addr = netxen_alloc(adapter->ahw.pdev,
218 sizeof(struct cmd_desc_type0) * 229 sizeof(struct cmd_desc_type0) *
219 adapter->max_tx_desc_count, 230 adapter->max_tx_desc_count,
220 &hw->cmd_desc_phys_addr); 231 &hw->cmd_desc_phys_addr, &hw->cmd_desc_pdev);
232
221 if (addr == NULL) { 233 if (addr == NULL) {
222 DPRINTK(ERR, "bad return from pci_alloc_consistent\n"); 234 DPRINTK(ERR, "bad return from pci_alloc_consistent\n");
223 err = -ENOMEM; 235 return -ENOMEM;
224 return err; 236 }
237
238 pause_addr = netxen_alloc(adapter->ahw.pdev, 512,
239 (dma_addr_t *) & hw->pause_physaddr,
240 &hw->pause_pdev);
241 if (pause_addr == NULL) {
242 DPRINTK(1, ERR, "bad return from pci_alloc_consistent\n");
243 return -ENOMEM;
225 } 244 }
226 245
227 /* we need to prelink all of the cmd descriptors */ 246 hw->pauseaddr = (char *)pause_addr;
228 pcmd = (struct cmd_desc_type0 *)addr; 247 {
229 for (i = 1; i < adapter->max_tx_desc_count; i++) { 248 u64 *ptr = (u64 *) pause_addr;
230 pcmd->netxen_next = 249 *ptr++ = NETXEN_NIC_ZERO_PAUSE_ADDR;
231 (card_cmdring + i * sizeof(struct cmd_desc_type0)); 250 *ptr++ = NETXEN_NIC_ZERO_PAUSE_ADDR;
232 pcmd++; 251 *ptr++ = NETXEN_NIC_UNIT_PAUSE_ADDR;
252 *ptr++ = NETXEN_NIC_ZERO_PAUSE_ADDR;
253 *ptr++ = NETXEN_NIC_EPG_PAUSE_ADDR1;
254 *ptr++ = NETXEN_NIC_EPG_PAUSE_ADDR2;
233 } 255 }
234 /* fill in last link (point to first) */
235 pcmd->netxen_next = card_cmdring;
236 256
237 hw->cmd_desc_head = (struct cmd_desc_type0 *)addr; 257 hw->cmd_desc_head = (struct cmd_desc_type0 *)addr;
238 258
@@ -241,9 +261,10 @@ int netxen_nic_hw_resources(struct netxen_adapter *adapter)
241 261
242 for (ring = 0; ring < NUM_RCV_DESC_RINGS; ring++) { 262 for (ring = 0; ring < NUM_RCV_DESC_RINGS; ring++) {
243 rcv_desc = &recv_ctx->rcv_desc[ring]; 263 rcv_desc = &recv_ctx->rcv_desc[ring];
244 addr = pci_alloc_consistent(adapter->ahw.pdev, 264 addr = netxen_alloc(adapter->ahw.pdev,
245 RCV_DESC_RINGSIZE, 265 RCV_DESC_RINGSIZE,
246 &rcv_desc->phys_addr); 266 &rcv_desc->phys_addr,
267 &rcv_desc->phys_pdev);
247 if (addr == NULL) { 268 if (addr == NULL) {
248 DPRINTK(ERR, "bad return from " 269 DPRINTK(ERR, "bad return from "
249 "pci_alloc_consistent\n"); 270 "pci_alloc_consistent\n");
@@ -254,10 +275,11 @@ int netxen_nic_hw_resources(struct netxen_adapter *adapter)
254 rcv_desc->desc_head = (struct rcv_desc *)addr; 275 rcv_desc->desc_head = (struct rcv_desc *)addr;
255 } 276 }
256 277
257 addr = pci_alloc_consistent(adapter->ahw.pdev, 278 addr = netxen_alloc(adapter->ahw.pdev,
258 STATUS_DESC_RINGSIZE, 279 STATUS_DESC_RINGSIZE,
259 &recv_ctx-> 280 &recv_ctx->
260 rcv_status_desc_phys_addr); 281 rcv_status_desc_phys_addr,
282 &recv_ctx->rcv_status_desc_pdev);
261 if (addr == NULL) { 283 if (addr == NULL) {
262 DPRINTK(ERR, "bad return from" 284 DPRINTK(ERR, "bad return from"
263 " pci_alloc_consistent\n"); 285 " pci_alloc_consistent\n");
@@ -273,19 +295,20 @@ int netxen_nic_hw_resources(struct netxen_adapter *adapter)
273 DPRINTK(INFO, "ring #%d crb global ring reg 0x%x\n", 295 DPRINTK(INFO, "ring #%d crb global ring reg 0x%x\n",
274 ring, rcv_desc_crb->crb_globalrcv_ring); 296 ring, rcv_desc_crb->crb_globalrcv_ring);
275 /* Window = 1 */ 297 /* Window = 1 */
276 writel(rcv_desc->phys_addr, 298 writel(lower32(rcv_desc->phys_addr),
277 NETXEN_CRB_NORMALIZE(adapter, 299 NETXEN_CRB_NORMALIZE(adapter,
278 rcv_desc_crb-> 300 rcv_desc_crb->
279 crb_globalrcv_ring)); 301 crb_globalrcv_ring));
280 DPRINTK(INFO, "GLOBAL_RCV_RING ctx %d, addr 0x%x" 302 DPRINTK(INFO, "GLOBAL_RCV_RING ctx %d, addr 0x%x"
281 " val 0x%x," 303 " val 0x%llx,"
282 " virt %p\n", ctx, 304 " virt %p\n", ctx,
283 rcv_desc_crb->crb_globalrcv_ring, 305 rcv_desc_crb->crb_globalrcv_ring,
284 rcv_desc->phys_addr, rcv_desc->desc_head); 306 (unsigned long long)rcv_desc->phys_addr,
307 +rcv_desc->desc_head);
285 } 308 }
286 309
287 /* Window = 1 */ 310 /* Window = 1 */
288 writel(recv_ctx->rcv_status_desc_phys_addr, 311 writel(lower32(recv_ctx->rcv_status_desc_phys_addr),
289 NETXEN_CRB_NORMALIZE(adapter, 312 NETXEN_CRB_NORMALIZE(adapter,
290 recv_crb_registers[ctx]. 313 recv_crb_registers[ctx].
291 crb_rcvstatus_ring)); 314 crb_rcvstatus_ring));
@@ -293,13 +316,19 @@ int netxen_nic_hw_resources(struct netxen_adapter *adapter)
293 " val 0x%x,virt%p\n", 316 " val 0x%x,virt%p\n",
294 ctx, 317 ctx,
295 recv_crb_registers[ctx].crb_rcvstatus_ring, 318 recv_crb_registers[ctx].crb_rcvstatus_ring,
296 recv_ctx->rcv_status_desc_phys_addr, 319 (unsigned long long)recv_ctx->rcv_status_desc_phys_addr,
297 recv_ctx->rcv_status_desc_head); 320 recv_ctx->rcv_status_desc_head);
298 } 321 }
299 /* Window = 1 */ 322 /* Window = 1 */
300 writel(hw->cmd_desc_phys_addr, 323 writel(lower32(hw->pause_physaddr),
301 NETXEN_CRB_NORMALIZE(adapter, CRB_HOST_CMD_ADDR_LO)); 324 NETXEN_CRB_NORMALIZE(adapter, CRB_PAUSE_ADDR_LO));
325 writel(upper32(hw->pause_physaddr),
326 NETXEN_CRB_NORMALIZE(adapter, CRB_PAUSE_ADDR_HI));
302 327
328 writel(lower32(hw->cmd_desc_phys_addr),
329 NETXEN_CRB_NORMALIZE(adapter, CRB_HOST_CMD_ADDR_LO));
330 writel(upper32(hw->cmd_desc_phys_addr),
331 NETXEN_CRB_NORMALIZE(adapter, CRB_HOST_CMD_ADDR_HI));
303 return err; 332 return err;
304} 333}
305 334
@@ -310,13 +339,19 @@ void netxen_free_hw_resources(struct netxen_adapter *adapter)
310 int ctx, ring; 339 int ctx, ring;
311 340
312 if (adapter->ahw.cmd_desc_head != NULL) { 341 if (adapter->ahw.cmd_desc_head != NULL) {
313 pci_free_consistent(adapter->ahw.pdev, 342 pci_free_consistent(adapter->ahw.cmd_desc_pdev,
314 sizeof(struct cmd_desc_type0) * 343 sizeof(struct cmd_desc_type0) *
315 adapter->max_tx_desc_count, 344 adapter->max_tx_desc_count,
316 adapter->ahw.cmd_desc_head, 345 adapter->ahw.cmd_desc_head,
317 adapter->ahw.cmd_desc_phys_addr); 346 adapter->ahw.cmd_desc_phys_addr);
318 adapter->ahw.cmd_desc_head = NULL; 347 adapter->ahw.cmd_desc_head = NULL;
319 } 348 }
349 if (adapter->ahw.pauseaddr != NULL) {
350 pci_free_consistent(adapter->ahw.pause_pdev, 512,
351 adapter->ahw.pauseaddr,
352 adapter->ahw.pause_physaddr);
353 adapter->ahw.pauseaddr = NULL;
354 }
320 355
321 for (ctx = 0; ctx < MAX_RCV_CTX; ++ctx) { 356 for (ctx = 0; ctx < MAX_RCV_CTX; ++ctx) {
322 recv_ctx = &adapter->recv_ctx[ctx]; 357 recv_ctx = &adapter->recv_ctx[ctx];
@@ -324,7 +359,7 @@ void netxen_free_hw_resources(struct netxen_adapter *adapter)
324 rcv_desc = &recv_ctx->rcv_desc[ring]; 359 rcv_desc = &recv_ctx->rcv_desc[ring];
325 360
326 if (rcv_desc->desc_head != NULL) { 361 if (rcv_desc->desc_head != NULL) {
327 pci_free_consistent(adapter->ahw.pdev, 362 pci_free_consistent(rcv_desc->phys_pdev,
328 RCV_DESC_RINGSIZE, 363 RCV_DESC_RINGSIZE,
329 rcv_desc->desc_head, 364 rcv_desc->desc_head,
330 rcv_desc->phys_addr); 365 rcv_desc->phys_addr);
@@ -333,7 +368,7 @@ void netxen_free_hw_resources(struct netxen_adapter *adapter)
333 } 368 }
334 369
335 if (recv_ctx->rcv_status_desc_head != NULL) { 370 if (recv_ctx->rcv_status_desc_head != NULL) {
336 pci_free_consistent(adapter->ahw.pdev, 371 pci_free_consistent(recv_ctx->rcv_status_desc_pdev,
337 STATUS_DESC_RINGSIZE, 372 STATUS_DESC_RINGSIZE,
338 recv_ctx->rcv_status_desc_head, 373 recv_ctx->rcv_status_desc_head,
339 recv_ctx-> 374 recv_ctx->
@@ -360,10 +395,10 @@ void netxen_tso_check(struct netxen_adapter *adapter,
360 return; 395 return;
361 } 396 }
362 } 397 }
398 adapter->stats.xmitcsummed++;
363 CMD_DESC_TCP_HDR_OFFSET_WRT(desc, skb->h.raw - skb->data); 399 CMD_DESC_TCP_HDR_OFFSET_WRT(desc, skb->h.raw - skb->data);
364 desc->length_tcp_hdr = cpu_to_le32(desc->length_tcp_hdr); 400 desc->length_tcp_hdr = cpu_to_le32(desc->length_tcp_hdr);
365 desc->ip_hdr_offset = skb->nh.raw - skb->data; 401 desc->ip_hdr_offset = skb->nh.raw - skb->data;
366 adapter->stats.xmitcsummed++;
367} 402}
368 403
369int netxen_is_flash_supported(struct netxen_adapter *adapter) 404int netxen_is_flash_supported(struct netxen_adapter *adapter)
@@ -373,7 +408,7 @@ int netxen_is_flash_supported(struct netxen_adapter *adapter)
373 408
374 /* if the flash size less than 4Mb, make huge war cry and die */ 409 /* if the flash size less than 4Mb, make huge war cry and die */
375 for (j = 1; j < 4; j++) { 410 for (j = 1; j < 4; j++) {
376 addr = j * 0x100000; 411 addr = j * NETXEN_NIC_WINDOW_MARGIN;
377 for (i = 0; i < (sizeof(locs) / sizeof(locs[0])); i++) { 412 for (i = 0; i < (sizeof(locs) / sizeof(locs[0])); i++) {
378 if (netxen_rom_fast_read(adapter, locs[i], &val01) == 0 413 if (netxen_rom_fast_read(adapter, locs[i], &val01) == 0
379 && netxen_rom_fast_read(adapter, (addr + locs[i]), 414 && netxen_rom_fast_read(adapter, (addr + locs[i]),
@@ -458,7 +493,9 @@ void netxen_nic_pci_change_crbwindow(struct netxen_adapter *adapter, u32 wndw)
458 * register address is received by PCI. The direct region bypasses 493 * register address is received by PCI. The direct region bypasses
459 * the CRB bus. 494 * the CRB bus.
460 */ 495 */
461 offset = adapter->ahw.pci_base + NETXEN_PCIX_PH_REG(PCIX_CRB_WINDOW); 496 offset =
497 PCI_OFFSET_SECOND_RANGE(adapter,
498 NETXEN_PCIX_PH_REG(PCIX_CRB_WINDOW));
462 499
463 if (wndw & 0x1) 500 if (wndw & 0x1)
464 wndw = NETXEN_WINDOW_ONE; 501 wndw = NETXEN_WINDOW_ONE;
@@ -497,8 +534,8 @@ void netxen_load_firmware(struct netxen_adapter *adapter)
497 "loading flash image\n"); 534 "loading flash image\n");
498 return; 535 return;
499 } 536 }
500 off = netxen_nic_pci_set_window(adapter->ahw.pci_base, memaddr); 537 off = netxen_nic_pci_set_window(adapter, memaddr);
501 addr = (adapter->ahw.pci_base + off); 538 addr = pci_base_offset(adapter, off);
502 writel(data, addr); 539 writel(data, addr);
503 flashaddr += 4; 540 flashaddr += 4;
504 memaddr += 4; 541 memaddr += 4;
@@ -521,14 +558,19 @@ netxen_nic_hw_write_wx(struct netxen_adapter *adapter, u64 off, void *data,
521 if (ADDR_IN_WINDOW1(off)) { 558 if (ADDR_IN_WINDOW1(off)) {
522 addr = NETXEN_CRB_NORMALIZE(adapter, off); 559 addr = NETXEN_CRB_NORMALIZE(adapter, off);
523 } else { /* Window 0 */ 560 } else { /* Window 0 */
524 addr = adapter->ahw.pci_base + off; 561 addr = pci_base_offset(adapter, off);
525 netxen_nic_pci_change_crbwindow(adapter, 0); 562 netxen_nic_pci_change_crbwindow(adapter, 0);
526 } 563 }
527 564
528 DPRINTK(INFO, "writing to base %lx offset %llx addr %p" 565 DPRINTK(INFO, "writing to base %lx offset %llx addr %p"
529 " data %llx len %d\n", 566 " data %llx len %d\n",
530 adapter->ahw.pci_base, off, addr, 567 pci_base(adapter, off), off, addr,
531 *(unsigned long long *)data, len); 568 *(unsigned long long *)data, len);
569 if (!addr) {
570 netxen_nic_pci_change_crbwindow(adapter, 1);
571 return 1;
572 }
573
532 switch (len) { 574 switch (len) {
533 case 1: 575 case 1:
534 writeb(*(u8 *) data, addr); 576 writeb(*(u8 *) data, addr);
@@ -566,12 +608,16 @@ netxen_nic_hw_read_wx(struct netxen_adapter *adapter, u64 off, void *data,
566 if (ADDR_IN_WINDOW1(off)) { /* Window 1 */ 608 if (ADDR_IN_WINDOW1(off)) { /* Window 1 */
567 addr = NETXEN_CRB_NORMALIZE(adapter, off); 609 addr = NETXEN_CRB_NORMALIZE(adapter, off);
568 } else { /* Window 0 */ 610 } else { /* Window 0 */
569 addr = adapter->ahw.pci_base + off; 611 addr = pci_base_offset(adapter, off);
570 netxen_nic_pci_change_crbwindow(adapter, 0); 612 netxen_nic_pci_change_crbwindow(adapter, 0);
571 } 613 }
572 614
573 DPRINTK(INFO, "reading from base %lx offset %llx addr %p\n", 615 DPRINTK(INFO, "reading from base %lx offset %llx addr %p\n",
574 adapter->ahw.pci_base, off, addr); 616 pci_base(adapter, off), off, addr);
617 if (!addr) {
618 netxen_nic_pci_change_crbwindow(adapter, 1);
619 return 1;
620 }
575 switch (len) { 621 switch (len) {
576 case 1: 622 case 1:
577 *(u8 *) data = readb(addr); 623 *(u8 *) data = readb(addr);
@@ -604,7 +650,7 @@ void netxen_nic_reg_write(struct netxen_adapter *adapter, u64 off, u32 val)
604 650
605 addr = NETXEN_CRB_NORMALIZE(adapter, off); 651 addr = NETXEN_CRB_NORMALIZE(adapter, off);
606 DPRINTK(INFO, "writing to base %lx offset %llx addr %p data %x\n", 652 DPRINTK(INFO, "writing to base %lx offset %llx addr %p data %x\n",
607 adapter->ahw.pci_base, off, addr, val); 653 pci_base(adapter, off), off, addr);
608 writel(val, addr); 654 writel(val, addr);
609 655
610} 656}
@@ -629,7 +675,7 @@ void netxen_nic_write_w0(struct netxen_adapter *adapter, u32 index, u32 value)
629 void __iomem *addr; 675 void __iomem *addr;
630 676
631 netxen_nic_pci_change_crbwindow(adapter, 0); 677 netxen_nic_pci_change_crbwindow(adapter, 0);
632 addr = (void __iomem *)(adapter->ahw.pci_base + index); 678 addr = (void __iomem *)(pci_base_offset(adapter, index));
633 writel(value, addr); 679 writel(value, addr);
634 netxen_nic_pci_change_crbwindow(adapter, 1); 680 netxen_nic_pci_change_crbwindow(adapter, 1);
635} 681}
@@ -639,7 +685,7 @@ void netxen_nic_read_w0(struct netxen_adapter *adapter, u32 index, u32 * value)
639{ 685{
640 void __iomem *addr; 686 void __iomem *addr;
641 687
642 addr = (void __iomem *)(adapter->ahw.pci_base + index); 688 addr = (void __iomem *)(pci_base_offset(adapter, index));
643 689
644 netxen_nic_pci_change_crbwindow(adapter, 0); 690 netxen_nic_pci_change_crbwindow(adapter, 0);
645 *value = readl(addr); 691 *value = readl(addr);
@@ -649,7 +695,8 @@ void netxen_nic_read_w0(struct netxen_adapter *adapter, u32 index, u32 * value)
649int netxen_pci_set_window_warning_count = 0; 695int netxen_pci_set_window_warning_count = 0;
650 696
651unsigned long 697unsigned long
652netxen_nic_pci_set_window(void __iomem * pci_base, unsigned long long addr) 698netxen_nic_pci_set_window(struct netxen_adapter *adapter,
699 unsigned long long addr)
653{ 700{
654 static int ddr_mn_window = -1; 701 static int ddr_mn_window = -1;
655 static int qdr_sn_window = -1; 702 static int qdr_sn_window = -1;
@@ -661,12 +708,15 @@ netxen_nic_pci_set_window(void __iomem * pci_base, unsigned long long addr)
661 window = (addr >> 25) & 0x3ff; 708 window = (addr >> 25) & 0x3ff;
662 if (ddr_mn_window != window) { 709 if (ddr_mn_window != window) {
663 ddr_mn_window = window; 710 ddr_mn_window = window;
664 writel(window, pci_base + 711 writel(window, PCI_OFFSET_SECOND_RANGE(adapter,
665 NETXEN_PCIX_PH_REG(PCIX_MN_WINDOW)); 712 NETXEN_PCIX_PH_REG
713 (PCIX_MN_WINDOW)));
666 /* MUST make sure window is set before we forge on... */ 714 /* MUST make sure window is set before we forge on... */
667 readl(pci_base + NETXEN_PCIX_PH_REG(PCIX_MN_WINDOW)); 715 readl(PCI_OFFSET_SECOND_RANGE(adapter,
716 NETXEN_PCIX_PH_REG
717 (PCIX_MN_WINDOW)));
668 } 718 }
669 addr -= (window * 0x2000000); 719 addr -= (window * NETXEN_WINDOW_ONE);
670 addr += NETXEN_PCI_DDR_NET; 720 addr += NETXEN_PCI_DDR_NET;
671 } else if (ADDR_IN_RANGE(addr, NETXEN_ADDR_OCM0, NETXEN_ADDR_OCM0_MAX)) { 721 } else if (ADDR_IN_RANGE(addr, NETXEN_ADDR_OCM0, NETXEN_ADDR_OCM0_MAX)) {
672 addr -= NETXEN_ADDR_OCM0; 722 addr -= NETXEN_ADDR_OCM0;
@@ -682,10 +732,14 @@ netxen_nic_pci_set_window(void __iomem * pci_base, unsigned long long addr)
682 window = (addr >> 22) & 0x3f; 732 window = (addr >> 22) & 0x3f;
683 if (qdr_sn_window != window) { 733 if (qdr_sn_window != window) {
684 qdr_sn_window = window; 734 qdr_sn_window = window;
685 writel((window << 22), pci_base + 735 writel((window << 22),
686 NETXEN_PCIX_PH_REG(PCIX_SN_WINDOW)); 736 PCI_OFFSET_SECOND_RANGE(adapter,
737 NETXEN_PCIX_PH_REG
738 (PCIX_SN_WINDOW)));
687 /* MUST make sure window is set before we forge on... */ 739 /* MUST make sure window is set before we forge on... */
688 readl(pci_base + NETXEN_PCIX_PH_REG(PCIX_SN_WINDOW)); 740 readl(PCI_OFFSET_SECOND_RANGE(adapter,
741 NETXEN_PCIX_PH_REG
742 (PCIX_SN_WINDOW)));
689 } 743 }
690 addr -= (window * 0x400000); 744 addr -= (window * 0x400000);
691 addr += NETXEN_PCI_QDR_NET; 745 addr += NETXEN_PCI_QDR_NET;
@@ -811,7 +865,7 @@ netxen_crb_writelit_adapter(struct netxen_adapter *adapter, unsigned long off,
811 writel(data, NETXEN_CRB_NORMALIZE(adapter, off)); 865 writel(data, NETXEN_CRB_NORMALIZE(adapter, off));
812 } else { 866 } else {
813 netxen_nic_pci_change_crbwindow(adapter, 0); 867 netxen_nic_pci_change_crbwindow(adapter, 0);
814 addr = (void __iomem *)(adapter->ahw.pci_base + off); 868 addr = (void __iomem *)(pci_base_offset(adapter, off));
815 writel(data, addr); 869 writel(data, addr);
816 netxen_nic_pci_change_crbwindow(adapter, 1); 870 netxen_nic_pci_change_crbwindow(adapter, 1);
817 } 871 }
@@ -879,6 +933,10 @@ void netxen_nic_flash_print(struct netxen_adapter *adapter)
879 u32 fw_major = 0; 933 u32 fw_major = 0;
880 u32 fw_minor = 0; 934 u32 fw_minor = 0;
881 u32 fw_build = 0; 935 u32 fw_build = 0;
936 char brd_name[NETXEN_MAX_SHORT_NAME];
937 struct netxen_new_user_info user_info;
938 int i, addr = USER_START;
939 u32 *ptr32;
882 940
883 struct netxen_board_info *board_info = &(adapter->ahw.boardcfg); 941 struct netxen_board_info *board_info = &(adapter->ahw.boardcfg);
884 if (board_info->magic != NETXEN_BDINFO_MAGIC) { 942 if (board_info->magic != NETXEN_BDINFO_MAGIC) {
@@ -894,6 +952,24 @@ void netxen_nic_flash_print(struct netxen_adapter *adapter)
894 valid = 0; 952 valid = 0;
895 } 953 }
896 if (valid) { 954 if (valid) {
955 ptr32 = (u32 *) & user_info;
956 for (i = 0;
957 i < sizeof(struct netxen_new_user_info) / sizeof(u32);
958 i++) {
959 if (netxen_rom_fast_read(adapter, addr, ptr32) == -1) {
960 printk("%s: ERROR reading %s board userarea.\n",
961 netxen_nic_driver_name,
962 netxen_nic_driver_name);
963 return;
964 }
965 ptr32++;
966 addr += sizeof(u32);
967 }
968 get_brd_name_by_type(board_info->board_type, brd_name);
969
970 printk("NetXen %s Board S/N %s Chip id 0x%x\n",
971 brd_name, user_info.serial_num, board_info->chip_id);
972
897 printk("NetXen %s Board #%d, Chip id 0x%x\n", 973 printk("NetXen %s Board #%d, Chip id 0x%x\n",
898 board_info->board_type == 0x0b ? "XGB" : "GBE", 974 board_info->board_type == 0x0b ? "XGB" : "GBE",
899 board_info->board_num, board_info->chip_id); 975 board_info->board_num, board_info->chip_id);