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authorMithlesh Thukral <mithlesh@netxen.com>2007-04-20 10:52:37 -0400
committerJeff Garzik <jeff@garzik.org>2007-04-28 11:01:05 -0400
commit3176ff3ee71bddbd1d68e6a9e28dbcf0a2960c95 (patch)
tree260ba783bbd24bf21f17c11f9a6f06a7c50a9fc6 /drivers/net/netxen/netxen_nic_hw.c
parentd52df4a35af569071fda3f4eb08e47cc7023f094 (diff)
NetXen: Use multiple PCI functions
NetXen: Make driver use multiple PCI functions. This patch will make NetXen driver work with multiple PCI functions. This will make the usage of memory resources as well as interrupts more independent among different functions which results in better throughput. This change has been done after the multiport support is added in firmware. Signed-off by: Mithlesh Thukral <mithlesh@netxen.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
Diffstat (limited to 'drivers/net/netxen/netxen_nic_hw.c')
-rw-r--r--drivers/net/netxen/netxen_nic_hw.c221
1 files changed, 168 insertions, 53 deletions
diff --git a/drivers/net/netxen/netxen_nic_hw.c b/drivers/net/netxen/netxen_nic_hw.c
index 0fba8f190762..50430911c800 100644
--- a/drivers/net/netxen/netxen_nic_hw.c
+++ b/drivers/net/netxen/netxen_nic_hw.c
@@ -33,10 +33,128 @@
33 33
34#include "netxen_nic.h" 34#include "netxen_nic.h"
35#include "netxen_nic_hw.h" 35#include "netxen_nic_hw.h"
36#define DEFINE_GLOBAL_RECV_CRB
36#include "netxen_nic_phan_reg.h" 37#include "netxen_nic_phan_reg.h"
37 38
39
38#include <net/ip.h> 40#include <net/ip.h>
39 41
42struct netxen_recv_crb recv_crb_registers[] = {
43 /*
44 * Instance 0.
45 */
46 {
47 /* rcv_desc_crb: */
48 {
49 {
50 /* crb_rcv_producer_offset: */
51 NETXEN_NIC_REG(0x100),
52 /* crb_rcv_consumer_offset: */
53 NETXEN_NIC_REG(0x104),
54 /* crb_gloablrcv_ring: */
55 NETXEN_NIC_REG(0x108),
56 /* crb_rcv_ring_size */
57 NETXEN_NIC_REG(0x10c),
58
59 },
60 /* Jumbo frames */
61 {
62 /* crb_rcv_producer_offset: */
63 NETXEN_NIC_REG(0x110),
64 /* crb_rcv_consumer_offset: */
65 NETXEN_NIC_REG(0x114),
66 /* crb_gloablrcv_ring: */
67 NETXEN_NIC_REG(0x118),
68 /* crb_rcv_ring_size */
69 NETXEN_NIC_REG(0x11c),
70 },
71 /* LRO */
72 {
73 /* crb_rcv_producer_offset: */
74 NETXEN_NIC_REG(0x120),
75 /* crb_rcv_consumer_offset: */
76 NETXEN_NIC_REG(0x124),
77 /* crb_gloablrcv_ring: */
78 NETXEN_NIC_REG(0x128),
79 /* crb_rcv_ring_size */
80 NETXEN_NIC_REG(0x12c),
81 }
82 },
83 /* crb_rcvstatus_ring: */
84 NETXEN_NIC_REG(0x130),
85 /* crb_rcv_status_producer: */
86 NETXEN_NIC_REG(0x134),
87 /* crb_rcv_status_consumer: */
88 NETXEN_NIC_REG(0x138),
89 /* crb_rcvpeg_state: */
90 NETXEN_NIC_REG(0x13c),
91 /* crb_status_ring_size */
92 NETXEN_NIC_REG(0x140),
93
94 },
95 /*
96 * Instance 1,
97 */
98 {
99 /* rcv_desc_crb: */
100 {
101 {
102 /* crb_rcv_producer_offset: */
103 NETXEN_NIC_REG(0x144),
104 /* crb_rcv_consumer_offset: */
105 NETXEN_NIC_REG(0x148),
106 /* crb_globalrcv_ring: */
107 NETXEN_NIC_REG(0x14c),
108 /* crb_rcv_ring_size */
109 NETXEN_NIC_REG(0x150),
110
111 },
112 /* Jumbo frames */
113 {
114 /* crb_rcv_producer_offset: */
115 NETXEN_NIC_REG(0x154),
116 /* crb_rcv_consumer_offset: */
117 NETXEN_NIC_REG(0x158),
118 /* crb_globalrcv_ring: */
119 NETXEN_NIC_REG(0x15c),
120 /* crb_rcv_ring_size */
121 NETXEN_NIC_REG(0x160),
122 },
123 /* LRO */
124 {
125 /* crb_rcv_producer_offset: */
126 NETXEN_NIC_REG(0x164),
127 /* crb_rcv_consumer_offset: */
128 NETXEN_NIC_REG(0x168),
129 /* crb_globalrcv_ring: */
130 NETXEN_NIC_REG(0x16c),
131 /* crb_rcv_ring_size */
132 NETXEN_NIC_REG(0x170),
133 }
134
135 },
136 /* crb_rcvstatus_ring: */
137 NETXEN_NIC_REG(0x174),
138 /* crb_rcv_status_producer: */
139 NETXEN_NIC_REG(0x178),
140 /* crb_rcv_status_consumer: */
141 NETXEN_NIC_REG(0x17c),
142 /* crb_rcvpeg_state: */
143 NETXEN_NIC_REG(0x180),
144 /* crb_status_ring_size */
145 NETXEN_NIC_REG(0x184),
146
147 },
148};
149
150u64 ctx_addr_sig_regs[][3] = {
151 {NETXEN_NIC_REG(0x188), NETXEN_NIC_REG(0x18c), NETXEN_NIC_REG(0x1c0)},
152 {NETXEN_NIC_REG(0x190), NETXEN_NIC_REG(0x194), NETXEN_NIC_REG(0x1c4)},
153 {NETXEN_NIC_REG(0x198), NETXEN_NIC_REG(0x19c), NETXEN_NIC_REG(0x1c8)},
154 {NETXEN_NIC_REG(0x1a0), NETXEN_NIC_REG(0x1a4), NETXEN_NIC_REG(0x1cc)}
155};
156
157
40/* PCI Windowing for DDR regions. */ 158/* PCI Windowing for DDR regions. */
41 159
42#define ADDR_IN_RANGE(addr, low, high) \ 160#define ADDR_IN_RANGE(addr, low, high) \
@@ -70,8 +188,7 @@ void netxen_free_hw_resources(struct netxen_adapter *adapter);
70 188
71int netxen_nic_set_mac(struct net_device *netdev, void *p) 189int netxen_nic_set_mac(struct net_device *netdev, void *p)
72{ 190{
73 struct netxen_port *port = netdev_priv(netdev); 191 struct netxen_adapter *adapter = netdev_priv(netdev);
74 struct netxen_adapter *adapter = port->adapter;
75 struct sockaddr *addr = p; 192 struct sockaddr *addr = p;
76 193
77 if (netif_running(netdev)) 194 if (netif_running(netdev))
@@ -84,7 +201,7 @@ int netxen_nic_set_mac(struct net_device *netdev, void *p)
84 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len); 201 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
85 202
86 if (adapter->macaddr_set) 203 if (adapter->macaddr_set)
87 adapter->macaddr_set(port, addr->sa_data); 204 adapter->macaddr_set(adapter, addr->sa_data);
88 205
89 return 0; 206 return 0;
90} 207}
@@ -94,8 +211,7 @@ int netxen_nic_set_mac(struct net_device *netdev, void *p)
94 */ 211 */
95void netxen_nic_set_multi(struct net_device *netdev) 212void netxen_nic_set_multi(struct net_device *netdev)
96{ 213{
97 struct netxen_port *port = netdev_priv(netdev); 214 struct netxen_adapter *adapter = netdev_priv(netdev);
98 struct netxen_adapter *adapter = port->adapter;
99 struct dev_mc_list *mc_ptr; 215 struct dev_mc_list *mc_ptr;
100 __u32 netxen_mac_addr_cntl_data = 0; 216 __u32 netxen_mac_addr_cntl_data = 0;
101 217
@@ -103,14 +219,12 @@ void netxen_nic_set_multi(struct net_device *netdev)
103 if (netdev->flags & IFF_PROMISC) { 219 if (netdev->flags & IFF_PROMISC) {
104 if (adapter->set_promisc) 220 if (adapter->set_promisc)
105 adapter->set_promisc(adapter, 221 adapter->set_promisc(adapter,
106 port->portnum,
107 NETXEN_NIU_PROMISC_MODE); 222 NETXEN_NIU_PROMISC_MODE);
108 } else { 223 } else {
109 if (adapter->unset_promisc && 224 if (adapter->unset_promisc &&
110 adapter->ahw.boardcfg.board_type 225 adapter->ahw.boardcfg.board_type
111 != NETXEN_BRDTYPE_P2_SB31_10G_IMEZ) 226 != NETXEN_BRDTYPE_P2_SB31_10G_IMEZ)
112 adapter->unset_promisc(adapter, 227 adapter->unset_promisc(adapter,
113 port->portnum,
114 NETXEN_NIU_NON_PROMISC_MODE); 228 NETXEN_NIU_NON_PROMISC_MODE);
115 } 229 }
116 if (adapter->ahw.board_type == NETXEN_NIC_XGBE) { 230 if (adapter->ahw.board_type == NETXEN_NIC_XGBE) {
@@ -152,8 +266,7 @@ void netxen_nic_set_multi(struct net_device *netdev)
152 */ 266 */
153int netxen_nic_change_mtu(struct net_device *netdev, int mtu) 267int netxen_nic_change_mtu(struct net_device *netdev, int mtu)
154{ 268{
155 struct netxen_port *port = netdev_priv(netdev); 269 struct netxen_adapter *adapter = netdev_priv(netdev);
156 struct netxen_adapter *adapter = port->adapter;
157 int eff_mtu = mtu + NETXEN_ENET_HEADER_SIZE + NETXEN_ETH_FCS_SIZE; 270 int eff_mtu = mtu + NETXEN_ENET_HEADER_SIZE + NETXEN_ETH_FCS_SIZE;
158 271
159 if ((eff_mtu > NETXEN_MAX_MTU) || (eff_mtu < NETXEN_MIN_MTU)) { 272 if ((eff_mtu > NETXEN_MAX_MTU) || (eff_mtu < NETXEN_MIN_MTU)) {
@@ -163,7 +276,7 @@ int netxen_nic_change_mtu(struct net_device *netdev, int mtu)
163 } 276 }
164 277
165 if (adapter->set_mtu) 278 if (adapter->set_mtu)
166 adapter->set_mtu(port, mtu); 279 adapter->set_mtu(adapter, mtu);
167 netdev->mtu = mtu; 280 netdev->mtu = mtu;
168 281
169 return 0; 282 return 0;
@@ -229,7 +342,7 @@ int netxen_nic_hw_resources(struct netxen_adapter *adapter)
229 (dma_addr_t *) & adapter->ctx_desc_phys_addr, 342 (dma_addr_t *) & adapter->ctx_desc_phys_addr,
230 &adapter->ctx_desc_pdev); 343 &adapter->ctx_desc_pdev);
231 344
232 printk("ctx_desc_phys_addr: 0x%llx\n", 345 printk(KERN_INFO "ctx_desc_phys_addr: 0x%llx\n",
233 (unsigned long long) adapter->ctx_desc_phys_addr); 346 (unsigned long long) adapter->ctx_desc_phys_addr);
234 if (addr == NULL) { 347 if (addr == NULL) {
235 DPRINTK(ERR, "bad return from pci_alloc_consistent\n"); 348 DPRINTK(ERR, "bad return from pci_alloc_consistent\n");
@@ -249,7 +362,7 @@ int netxen_nic_hw_resources(struct netxen_adapter *adapter)
249 adapter->max_tx_desc_count, 362 adapter->max_tx_desc_count,
250 (dma_addr_t *) & hw->cmd_desc_phys_addr, 363 (dma_addr_t *) & hw->cmd_desc_phys_addr,
251 &adapter->ahw.cmd_desc_pdev); 364 &adapter->ahw.cmd_desc_pdev);
252 printk("cmd_desc_phys_addr: 0x%llx\n", 365 printk(KERN_INFO "cmd_desc_phys_addr: 0x%llx\n",
253 (unsigned long long) hw->cmd_desc_phys_addr); 366 (unsigned long long) hw->cmd_desc_phys_addr);
254 367
255 if (addr == NULL) { 368 if (addr == NULL) {
@@ -385,7 +498,6 @@ void netxen_tso_check(struct netxen_adapter *adapter,
385 return; 498 return;
386 } 499 }
387 } 500 }
388 adapter->stats.xmitcsummed++;
389 desc->tcp_hdr_offset = skb_transport_offset(skb); 501 desc->tcp_hdr_offset = skb_transport_offset(skb);
390 desc->ip_hdr_offset = skb_network_offset(skb); 502 desc->ip_hdr_offset = skb_network_offset(skb);
391} 503}
@@ -475,7 +587,30 @@ void netxen_nic_pci_change_crbwindow(struct netxen_adapter *adapter, u32 wndw)
475 587
476 if (adapter->curr_window == wndw) 588 if (adapter->curr_window == wndw)
477 return; 589 return;
478 590 switch(adapter->portnum) {
591 case 0:
592 offset = PCI_OFFSET_SECOND_RANGE(adapter,
593 NETXEN_PCIX_PH_REG(PCIX_CRB_WINDOW));
594 break;
595 case 1:
596 offset = PCI_OFFSET_SECOND_RANGE(adapter,
597 NETXEN_PCIX_PH_REG(PCIX_CRB_WINDOW_F1));
598 break;
599 case 2:
600 offset = PCI_OFFSET_SECOND_RANGE(adapter,
601 NETXEN_PCIX_PH_REG(PCIX_CRB_WINDOW_F2));
602 break;
603 case 3:
604 offset = PCI_OFFSET_SECOND_RANGE(adapter,
605 NETXEN_PCIX_PH_REG(PCIX_CRB_WINDOW_F3));
606 break;
607 default:
608 printk(KERN_INFO "Changing the window for PCI function"
609 "%d\n", adapter->portnum);
610 offset = PCI_OFFSET_SECOND_RANGE(adapter,
611 NETXEN_PCIX_PH_REG(PCIX_CRB_WINDOW));
612 break;
613 }
479 /* 614 /*
480 * Move the CRB window. 615 * Move the CRB window.
481 * We need to write to the "direct access" region of PCI 616 * We need to write to the "direct access" region of PCI
@@ -484,9 +619,6 @@ void netxen_nic_pci_change_crbwindow(struct netxen_adapter *adapter, u32 wndw)
484 * register address is received by PCI. The direct region bypasses 619 * register address is received by PCI. The direct region bypasses
485 * the CRB bus. 620 * the CRB bus.
486 */ 621 */
487 offset =
488 PCI_OFFSET_SECOND_RANGE(adapter,
489 NETXEN_PCIX_PH_REG(PCIX_CRB_WINDOW));
490 622
491 if (wndw & 0x1) 623 if (wndw & 0x1)
492 wndw = NETXEN_WINDOW_ONE; 624 wndw = NETXEN_WINDOW_ONE;
@@ -810,43 +942,27 @@ int netxen_nic_get_board_info(struct netxen_adapter *adapter)
810 942
811/* NIU access sections */ 943/* NIU access sections */
812 944
813int netxen_nic_set_mtu_gb(struct netxen_port *port, int new_mtu) 945int netxen_nic_set_mtu_gb(struct netxen_adapter *adapter, int new_mtu)
814{ 946{
815 struct netxen_adapter *adapter = port->adapter;
816 netxen_nic_write_w0(adapter, 947 netxen_nic_write_w0(adapter,
817 NETXEN_NIU_GB_MAX_FRAME_SIZE(port->portnum), 948 NETXEN_NIU_GB_MAX_FRAME_SIZE(adapter->portnum),
818 new_mtu); 949 new_mtu);
819 return 0; 950 return 0;
820} 951}
821 952
822int netxen_nic_set_mtu_xgb(struct netxen_port *port, int new_mtu) 953int netxen_nic_set_mtu_xgb(struct netxen_adapter *adapter, int new_mtu)
823{ 954{
824 struct netxen_adapter *adapter = port->adapter;
825 new_mtu += NETXEN_NIU_HDRSIZE + NETXEN_NIU_TLRSIZE; 955 new_mtu += NETXEN_NIU_HDRSIZE + NETXEN_NIU_TLRSIZE;
826 if (port->portnum == 0) 956 if (adapter->portnum == 0)
827 netxen_nic_write_w0(adapter, NETXEN_NIU_XGE_MAX_FRAME_SIZE, new_mtu); 957 netxen_nic_write_w0(adapter, NETXEN_NIU_XGE_MAX_FRAME_SIZE, new_mtu);
828 else if (port->portnum == 1) 958 else if (adapter->portnum == 1)
829 netxen_nic_write_w0(adapter, NETXEN_NIU_XG1_MAX_FRAME_SIZE, new_mtu); 959 netxen_nic_write_w0(adapter, NETXEN_NIU_XG1_MAX_FRAME_SIZE, new_mtu);
830 return 0; 960 return 0;
831} 961}
832 962
833void netxen_nic_init_niu_gb(struct netxen_adapter *adapter) 963void netxen_nic_init_niu_gb(struct netxen_adapter *adapter)
834{ 964{
835 int portno; 965 netxen_niu_gbe_init_port(adapter, adapter->portnum);
836 for (portno = 0; portno < NETXEN_NIU_MAX_GBE_PORTS; portno++)
837 netxen_niu_gbe_init_port(adapter, portno);
838}
839
840void netxen_nic_stop_all_ports(struct netxen_adapter *adapter)
841{
842 int port_nr;
843 struct netxen_port *port;
844
845 for (port_nr = 0; port_nr < adapter->ahw.max_ports; port_nr++) {
846 port = adapter->port[port_nr];
847 if (adapter->stop_port)
848 adapter->stop_port(adapter, port->portnum);
849 }
850} 966}
851 967
852void 968void
@@ -865,9 +981,8 @@ netxen_crb_writelit_adapter(struct netxen_adapter *adapter, unsigned long off,
865 } 981 }
866} 982}
867 983
868void netxen_nic_set_link_parameters(struct netxen_port *port) 984void netxen_nic_set_link_parameters(struct netxen_adapter *adapter)
869{ 985{
870 struct netxen_adapter *adapter = port->adapter;
871 __u32 status; 986 __u32 status;
872 __u32 autoneg; 987 __u32 autoneg;
873 __u32 mode; 988 __u32 mode;
@@ -876,47 +991,47 @@ void netxen_nic_set_link_parameters(struct netxen_port *port)
876 if (netxen_get_niu_enable_ge(mode)) { /* Gb 10/100/1000 Mbps mode */ 991 if (netxen_get_niu_enable_ge(mode)) { /* Gb 10/100/1000 Mbps mode */
877 if (adapter->phy_read 992 if (adapter->phy_read
878 && adapter-> 993 && adapter->
879 phy_read(adapter, port->portnum, 994 phy_read(adapter, adapter->portnum,
880 NETXEN_NIU_GB_MII_MGMT_ADDR_PHY_STATUS, 995 NETXEN_NIU_GB_MII_MGMT_ADDR_PHY_STATUS,
881 &status) == 0) { 996 &status) == 0) {
882 if (netxen_get_phy_link(status)) { 997 if (netxen_get_phy_link(status)) {
883 switch (netxen_get_phy_speed(status)) { 998 switch (netxen_get_phy_speed(status)) {
884 case 0: 999 case 0:
885 port->link_speed = SPEED_10; 1000 adapter->link_speed = SPEED_10;
886 break; 1001 break;
887 case 1: 1002 case 1:
888 port->link_speed = SPEED_100; 1003 adapter->link_speed = SPEED_100;
889 break; 1004 break;
890 case 2: 1005 case 2:
891 port->link_speed = SPEED_1000; 1006 adapter->link_speed = SPEED_1000;
892 break; 1007 break;
893 default: 1008 default:
894 port->link_speed = -1; 1009 adapter->link_speed = -1;
895 break; 1010 break;
896 } 1011 }
897 switch (netxen_get_phy_duplex(status)) { 1012 switch (netxen_get_phy_duplex(status)) {
898 case 0: 1013 case 0:
899 port->link_duplex = DUPLEX_HALF; 1014 adapter->link_duplex = DUPLEX_HALF;
900 break; 1015 break;
901 case 1: 1016 case 1:
902 port->link_duplex = DUPLEX_FULL; 1017 adapter->link_duplex = DUPLEX_FULL;
903 break; 1018 break;
904 default: 1019 default:
905 port->link_duplex = -1; 1020 adapter->link_duplex = -1;
906 break; 1021 break;
907 } 1022 }
908 if (adapter->phy_read 1023 if (adapter->phy_read
909 && adapter-> 1024 && adapter->
910 phy_read(adapter, port->portnum, 1025 phy_read(adapter, adapter->portnum,
911 NETXEN_NIU_GB_MII_MGMT_ADDR_AUTONEG, 1026 NETXEN_NIU_GB_MII_MGMT_ADDR_AUTONEG,
912 &autoneg) != 0) 1027 &autoneg) != 0)
913 port->link_autoneg = autoneg; 1028 adapter->link_autoneg = autoneg;
914 } else 1029 } else
915 goto link_down; 1030 goto link_down;
916 } else { 1031 } else {
917 link_down: 1032 link_down:
918 port->link_speed = -1; 1033 adapter->link_speed = -1;
919 port->link_duplex = -1; 1034 adapter->link_duplex = -1;
920 } 1035 }
921 } 1036 }
922} 1037}