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authorLinus Torvalds <torvalds@woody.linux-foundation.org>2007-04-29 13:48:48 -0400
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2007-04-29 13:48:48 -0400
commite389f9aec689209724105ae80a6c91fd2e747bc9 (patch)
tree3cc88a3e785e4f2ffeaa9dad0da695cfa437d4fe /drivers/net/netxen/netxen_nic_hdr.h
parentf73b0a08eae0e28c50db5dd5ab8245546918bfb6 (diff)
parentb4cf205846463a0a23a917bb18ad833bc9a8c0bb (diff)
Merge branch 'upstream-linus' of master.kernel.org:/pub/scm/linux/kernel/git/jgarzik/netdev-2.6
* 'upstream-linus' of master.kernel.org:/pub/scm/linux/kernel/git/jgarzik/netdev-2.6: (107 commits) smc911x: fix compilation breakage wjen debug is on [netdrvr] eexpress: minor corrections add NAPI support to sb1250-mac.c ixgb: ROUND_UP macro cleanup in drivers/net/ixgb e1000: ROUND_UP macro cleanup in drivers/net/e1000 Generic HDLC sparse annotations e100: Optionally use I/O mode only to access register space e100: allow bad MAC address when running with invalid eeprom csum ehea: fix for dlpar support ehea: fix for sysfs entries 3C509: Remove unnecessary include of <linux/pm_legacy.h> NetXen: Fix for vmalloc issues NetXen: Fixes for Power PC architecture NetXen: Port swap feature for multi port cards NetXen: Removal of redundant macros NetXen: Multi PCI support for Quad cards NetXen: Removal of redundant argument passing NetXen: Use multiple PCI functions [netdrvr e100] experiment with doing RX in a similar manner to eepro100 [PATCH] ieee80211: add missing global needed by IEEE80211_DEBUG_XXXX ...
Diffstat (limited to 'drivers/net/netxen/netxen_nic_hdr.h')
-rw-r--r--drivers/net/netxen/netxen_nic_hdr.h12
1 files changed, 12 insertions, 0 deletions
diff --git a/drivers/net/netxen/netxen_nic_hdr.h b/drivers/net/netxen/netxen_nic_hdr.h
index fe8b675f9e72..608e37b349b4 100644
--- a/drivers/net/netxen/netxen_nic_hdr.h
+++ b/drivers/net/netxen/netxen_nic_hdr.h
@@ -467,6 +467,8 @@ enum {
467#define NETXEN_PCI_OCM1 (0x05100000UL) 467#define NETXEN_PCI_OCM1 (0x05100000UL)
468#define NETXEN_PCI_OCM1_MAX (0x051fffffUL) 468#define NETXEN_PCI_OCM1_MAX (0x051fffffUL)
469#define NETXEN_PCI_CRBSPACE (0x06000000UL) 469#define NETXEN_PCI_CRBSPACE (0x06000000UL)
470#define NETXEN_PCI_128MB_SIZE (0x08000000UL)
471#define NETXEN_PCI_32MB_SIZE (0x02000000UL)
470 472
471#define NETXEN_CRB_CAM NETXEN_PCI_CRB_WINDOW(NETXEN_HW_PX_MAP_CRB_CAM) 473#define NETXEN_CRB_CAM NETXEN_PCI_CRB_WINDOW(NETXEN_HW_PX_MAP_CRB_CAM)
472 474
@@ -484,6 +486,7 @@ enum {
484 /* 10 seconds before we give up */ 486 /* 10 seconds before we give up */
485#define NETXEN_NIU_PHY_WAITMAX 50 487#define NETXEN_NIU_PHY_WAITMAX 50
486#define NETXEN_NIU_MAX_GBE_PORTS 4 488#define NETXEN_NIU_MAX_GBE_PORTS 4
489#define NETXEN_NIU_MAX_XG_PORTS 2
487 490
488#define NETXEN_NIU_MODE (NETXEN_CRB_NIU + 0x00000) 491#define NETXEN_NIU_MODE (NETXEN_CRB_NIU + 0x00000)
489 492
@@ -527,6 +530,7 @@ enum {
527#define NETXEN_NIU_XG_PAUSE_CTL (NETXEN_CRB_NIU + 0x00098) 530#define NETXEN_NIU_XG_PAUSE_CTL (NETXEN_CRB_NIU + 0x00098)
528#define NETXEN_NIU_XG_PAUSE_LEVEL (NETXEN_CRB_NIU + 0x000dc) 531#define NETXEN_NIU_XG_PAUSE_LEVEL (NETXEN_CRB_NIU + 0x000dc)
529#define NETXEN_NIU_XG_SEL (NETXEN_CRB_NIU + 0x00128) 532#define NETXEN_NIU_XG_SEL (NETXEN_CRB_NIU + 0x00128)
533#define NETXEN_NIU_GB_PAUSE_CTL (NETXEN_CRB_NIU + 0x0030c)
530 534
531#define NETXEN_NIU_FULL_LEVEL_XG (NETXEN_CRB_NIU + 0x00450) 535#define NETXEN_NIU_FULL_LEVEL_XG (NETXEN_CRB_NIU + 0x00450)
532 536
@@ -649,11 +653,19 @@ enum {
649#define PCIX_MS_WINDOW (0x10204) 653#define PCIX_MS_WINDOW (0x10204)
650#define PCIX_SN_WINDOW (0x10208) 654#define PCIX_SN_WINDOW (0x10208)
651#define PCIX_CRB_WINDOW (0x10210) 655#define PCIX_CRB_WINDOW (0x10210)
656#define PCIX_CRB_WINDOW_F0 (0x10210)
657#define PCIX_CRB_WINDOW_F1 (0x10230)
658#define PCIX_CRB_WINDOW_F2 (0x10250)
659#define PCIX_CRB_WINDOW_F3 (0x10270)
652 660
653#define PCIX_TARGET_STATUS (0x10118) 661#define PCIX_TARGET_STATUS (0x10118)
654#define PCIX_TARGET_MASK (0x10128) 662#define PCIX_TARGET_MASK (0x10128)
655 663
656#define PCIX_MSI_F0 (0x13000) 664#define PCIX_MSI_F0 (0x13000)
665#define PCIX_MSI_F1 (0x13004)
666#define PCIX_MSI_F2 (0x13008)
667#define PCIX_MSI_F3 (0x1300c)
668#define PCIX_MSI_F(i) (0x13000+((i)*4))
657 669
658#define PCIX_PS_MEM_SPACE (0x90000) 670#define PCIX_PS_MEM_SPACE (0x90000)
659 671