aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/net/ne.c
diff options
context:
space:
mode:
authorSergei Shtylyov <sshtylyov@ru.mvista.com>2006-05-08 16:58:28 -0400
committerStephen Hemminger <shemminger@osdl.org>2006-05-08 19:00:58 -0400
commitaedc0e520e5ae9ba1342c25c4604d18fb236c2bc (patch)
tree07c7bd17f27ac3dec7cd88ed58fcee062e63f202 /drivers/net/ne.c
parent8cd35da094bed8a41eb722c1d03eab24d57bf706 (diff)
Fix RTL8019AS init for Toshiba RBTX49xx boards
Ensure that 8-bit mode is selected for the on-board Realtek RTL8019AS chip on Toshiba RBHMA4x00, get rid of the duplicate #ifdef's when setting ei_status.word16. The chip's datasheet says that the PSTOP register shouldn't exceed 0x60 in 8-bit mode -- ensure this too. Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Stephen Hemminger <shemminger@osdl.org>
Diffstat (limited to 'drivers/net/ne.c')
-rw-r--r--drivers/net/ne.c31
1 files changed, 19 insertions, 12 deletions
diff --git a/drivers/net/ne.c b/drivers/net/ne.c
index 93c494bcd18d..b32765215f75 100644
--- a/drivers/net/ne.c
+++ b/drivers/net/ne.c
@@ -139,8 +139,9 @@ bad_clone_list[] __initdata = {
139 139
140#if defined(CONFIG_PLAT_MAPPI) 140#if defined(CONFIG_PLAT_MAPPI)
141# define DCR_VAL 0x4b 141# define DCR_VAL 0x4b
142#elif defined(CONFIG_PLAT_OAKS32R) 142#elif defined(CONFIG_PLAT_OAKS32R) || \
143# define DCR_VAL 0x48 143 defined(CONFIG_TOSHIBA_RBTX4927) || defined(CONFIG_TOSHIBA_RBTX4938)
144# define DCR_VAL 0x48 /* 8-bit mode */
144#else 145#else
145# define DCR_VAL 0x49 146# define DCR_VAL 0x49
146#endif 147#endif
@@ -396,10 +397,22 @@ static int __init ne_probe1(struct net_device *dev, int ioaddr)
396 /* We must set the 8390 for word mode. */ 397 /* We must set the 8390 for word mode. */
397 outb_p(DCR_VAL, ioaddr + EN0_DCFG); 398 outb_p(DCR_VAL, ioaddr + EN0_DCFG);
398 start_page = NESM_START_PG; 399 start_page = NESM_START_PG;
399 stop_page = NESM_STOP_PG; 400
401 /*
402 * Realtek RTL8019AS datasheet says that the PSTOP register
403 * shouldn't exceed 0x60 in 8-bit mode.
404 * This chip can be identified by reading the signature from
405 * the remote byte count registers (otherwise write-only)...
406 */
407 if ((DCR_VAL & 0x01) == 0 && /* 8-bit mode */
408 inb(ioaddr + EN0_RCNTLO) == 0x50 &&
409 inb(ioaddr + EN0_RCNTHI) == 0x70)
410 stop_page = 0x60;
411 else
412 stop_page = NESM_STOP_PG;
400 } else { 413 } else {
401 start_page = NE1SM_START_PG; 414 start_page = NE1SM_START_PG;
402 stop_page = NE1SM_STOP_PG; 415 stop_page = NE1SM_STOP_PG;
403 } 416 }
404 417
405#if defined(CONFIG_PLAT_MAPPI) || defined(CONFIG_PLAT_OAKS32R) 418#if defined(CONFIG_PLAT_MAPPI) || defined(CONFIG_PLAT_OAKS32R)
@@ -509,15 +522,9 @@ static int __init ne_probe1(struct net_device *dev, int ioaddr)
509 ei_status.name = name; 522 ei_status.name = name;
510 ei_status.tx_start_page = start_page; 523 ei_status.tx_start_page = start_page;
511 ei_status.stop_page = stop_page; 524 ei_status.stop_page = stop_page;
512#if defined(CONFIG_TOSHIBA_RBTX4927) || defined(CONFIG_TOSHIBA_RBTX4938)
513 wordlength = 1;
514#endif
515 525
516#ifdef CONFIG_PLAT_OAKS32R 526 /* Use 16-bit mode only if this wasn't overridden by DCR_VAL */
517 ei_status.word16 = 0; 527 ei_status.word16 = (wordlength == 2 && (DCR_VAL & 0x01));
518#else
519 ei_status.word16 = (wordlength == 2);
520#endif
521 528
522 ei_status.rx_start_page = start_page + TX_PAGES; 529 ei_status.rx_start_page = start_page + TX_PAGES;
523#ifdef PACKETBUF_MEMSIZE 530#ifdef PACKETBUF_MEMSIZE