diff options
author | Brice Goglin <brice@myri.com> | 2007-04-10 15:21:39 -0400 |
---|---|---|
committer | Jeff Garzik <jeff@garzik.org> | 2007-04-11 11:54:44 -0400 |
commit | f19baaeaadf9d77bcc6c122500c70b27c5bbc7a4 (patch) | |
tree | 24c927e32a7d9c33098ac84aa9718917835d9e35 /drivers/net/myri10ge/myri10ge.c | |
parent | ae8509b1876e6e1074edc9846296e80983e30502 (diff) |
myri10ge: more Intel chipsets providing aligned PCIe completions
Add the Intel 5000 southbridge (aka Intel 6310/6311/6321ESB) PCIe ports
and the Intel E30x0 chipsets to the whitelist of aligned PCIe completion.
Signed-off-by: Brice Goglin <brice@myri.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Diffstat (limited to 'drivers/net/myri10ge/myri10ge.c')
-rw-r--r-- | drivers/net/myri10ge/myri10ge.c | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/drivers/net/myri10ge/myri10ge.c b/drivers/net/myri10ge/myri10ge.c index 1e7fa2facbe1..756855930f34 100644 --- a/drivers/net/myri10ge/myri10ge.c +++ b/drivers/net/myri10ge/myri10ge.c | |||
@@ -2487,6 +2487,10 @@ static void myri10ge_enable_ecrc(struct myri10ge_priv *mgp) | |||
2487 | 2487 | ||
2488 | #define PCI_DEVICE_ID_INTEL_E5000_PCIE23 0x25f7 | 2488 | #define PCI_DEVICE_ID_INTEL_E5000_PCIE23 0x25f7 |
2489 | #define PCI_DEVICE_ID_INTEL_E5000_PCIE47 0x25fa | 2489 | #define PCI_DEVICE_ID_INTEL_E5000_PCIE47 0x25fa |
2490 | #define PCI_DEVICE_ID_INTEL_6300ESB_PCIEE1 0x3510 | ||
2491 | #define PCI_DEVICE_ID_INTEL_6300ESB_PCIEE4 0x351b | ||
2492 | #define PCI_DEVICE_ID_INTEL_E3000_PCIE 0x2779 | ||
2493 | #define PCI_DEVICE_ID_INTEL_E3010_PCIE 0x277a | ||
2490 | #define PCI_DEVICE_ID_SERVERWORKS_HT2100_PCIE_FIRST 0x140 | 2494 | #define PCI_DEVICE_ID_SERVERWORKS_HT2100_PCIE_FIRST 0x140 |
2491 | #define PCI_DEVICE_ID_SERVERWORKS_HT2100_PCIE_LAST 0x142 | 2495 | #define PCI_DEVICE_ID_SERVERWORKS_HT2100_PCIE_LAST 0x142 |
2492 | 2496 | ||
@@ -2526,6 +2530,18 @@ static void myri10ge_select_firmware(struct myri10ge_priv *mgp) | |||
2526 | PCI_DEVICE_ID_SERVERWORKS_HT2100_PCIE_FIRST | 2530 | PCI_DEVICE_ID_SERVERWORKS_HT2100_PCIE_FIRST |
2527 | && bridge->device <= | 2531 | && bridge->device <= |
2528 | PCI_DEVICE_ID_SERVERWORKS_HT2100_PCIE_LAST) | 2532 | PCI_DEVICE_ID_SERVERWORKS_HT2100_PCIE_LAST) |
2533 | /* All Intel E3000/E3010 PCIE ports */ | ||
2534 | || (bridge->vendor == PCI_VENDOR_ID_INTEL | ||
2535 | && (bridge->device == | ||
2536 | PCI_DEVICE_ID_INTEL_E3000_PCIE | ||
2537 | || bridge->device == | ||
2538 | PCI_DEVICE_ID_INTEL_E3010_PCIE)) | ||
2539 | /* All Intel 6310/6311/6321ESB PCIE ports */ | ||
2540 | || (bridge->vendor == PCI_VENDOR_ID_INTEL | ||
2541 | && bridge->device >= | ||
2542 | PCI_DEVICE_ID_INTEL_6300ESB_PCIEE1 | ||
2543 | && bridge->device <= | ||
2544 | PCI_DEVICE_ID_INTEL_6300ESB_PCIEE4) | ||
2529 | /* All Intel E5000 PCIE ports */ | 2545 | /* All Intel E5000 PCIE ports */ |
2530 | || (bridge->vendor == PCI_VENDOR_ID_INTEL | 2546 | || (bridge->vendor == PCI_VENDOR_ID_INTEL |
2531 | && bridge->device >= | 2547 | && bridge->device >= |