diff options
author | Lennert Buytenhek <buytenh@wantstofly.org> | 2008-05-31 19:18:58 -0400 |
---|---|---|
committer | Lennert Buytenhek <buytenh@wantstofly.org> | 2008-06-12 02:40:24 -0400 |
commit | 2679a550d39d7815f9fdbde5cef2f54e5fbdeae2 (patch) | |
tree | 04a5be35d961bba5a9a279f0fc5c59e02195db35 /drivers/net/mv643xx_eth.c | |
parent | 376489a250be5a5abe07aa39aa9623c31031b55e (diff) |
mv643xx_eth: delete unused SDMA config register bit defines
Delete the defines for SDMA config register bit values that are
never used in the driver, to tidy up the code some more.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Dale Farnsworth <dale@farnsworth.org>
Diffstat (limited to 'drivers/net/mv643xx_eth.c')
-rw-r--r-- | drivers/net/mv643xx_eth.c | 21 |
1 files changed, 4 insertions, 17 deletions
diff --git a/drivers/net/mv643xx_eth.c b/drivers/net/mv643xx_eth.c index 3d9c412e9ea1..ea7a578836c3 100644 --- a/drivers/net/mv643xx_eth.c +++ b/drivers/net/mv643xx_eth.c | |||
@@ -118,37 +118,24 @@ static char mv643xx_driver_version[] = "1.0"; | |||
118 | #define OTHER_MCAST_TABLE(p) (0x1500 + ((p) << 10)) | 118 | #define OTHER_MCAST_TABLE(p) (0x1500 + ((p) << 10)) |
119 | #define UNICAST_TABLE(p) (0x1600 + ((p) << 10)) | 119 | #define UNICAST_TABLE(p) (0x1600 + ((p) << 10)) |
120 | 120 | ||
121 | /* These macros describe Ethernet Port Sdma configuration reg (SDCR) bits */ | 121 | |
122 | #define RIFB (1 << 0) | 122 | /* |
123 | #define RX_BURST_SIZE_1_64BIT (0 << 1) | 123 | * SDMA configuration register. |
124 | #define RX_BURST_SIZE_2_64BIT (1 << 1) | 124 | */ |
125 | #define RX_BURST_SIZE_4_64BIT (2 << 1) | 125 | #define RX_BURST_SIZE_4_64BIT (2 << 1) |
126 | #define RX_BURST_SIZE_8_64BIT (3 << 1) | ||
127 | #define RX_BURST_SIZE_16_64BIT (4 << 1) | ||
128 | #define BLM_RX_NO_SWAP (1 << 4) | 126 | #define BLM_RX_NO_SWAP (1 << 4) |
129 | #define BLM_RX_BYTE_SWAP (0 << 4) | ||
130 | #define BLM_TX_NO_SWAP (1 << 5) | 127 | #define BLM_TX_NO_SWAP (1 << 5) |
131 | #define BLM_TX_BYTE_SWAP (0 << 5) | ||
132 | #define DESCRIPTORS_BYTE_SWAP (1 << 6) | ||
133 | #define DESCRIPTORS_NO_SWAP (0 << 6) | ||
134 | #define IPG_INT_RX(value) (((value) & 0x3fff) << 8) | ||
135 | #define TX_BURST_SIZE_1_64BIT (0 << 22) | ||
136 | #define TX_BURST_SIZE_2_64BIT (1 << 22) | ||
137 | #define TX_BURST_SIZE_4_64BIT (2 << 22) | 128 | #define TX_BURST_SIZE_4_64BIT (2 << 22) |
138 | #define TX_BURST_SIZE_8_64BIT (3 << 22) | ||
139 | #define TX_BURST_SIZE_16_64BIT (4 << 22) | ||
140 | 129 | ||
141 | #if defined(__BIG_ENDIAN) | 130 | #if defined(__BIG_ENDIAN) |
142 | #define PORT_SDMA_CONFIG_DEFAULT_VALUE \ | 131 | #define PORT_SDMA_CONFIG_DEFAULT_VALUE \ |
143 | RX_BURST_SIZE_4_64BIT | \ | 132 | RX_BURST_SIZE_4_64BIT | \ |
144 | IPG_INT_RX(0) | \ | ||
145 | TX_BURST_SIZE_4_64BIT | 133 | TX_BURST_SIZE_4_64BIT |
146 | #elif defined(__LITTLE_ENDIAN) | 134 | #elif defined(__LITTLE_ENDIAN) |
147 | #define PORT_SDMA_CONFIG_DEFAULT_VALUE \ | 135 | #define PORT_SDMA_CONFIG_DEFAULT_VALUE \ |
148 | RX_BURST_SIZE_4_64BIT | \ | 136 | RX_BURST_SIZE_4_64BIT | \ |
149 | BLM_RX_NO_SWAP | \ | 137 | BLM_RX_NO_SWAP | \ |
150 | BLM_TX_NO_SWAP | \ | 138 | BLM_TX_NO_SWAP | \ |
151 | IPG_INT_RX(0) | \ | ||
152 | TX_BURST_SIZE_4_64BIT | 139 | TX_BURST_SIZE_4_64BIT |
153 | #else | 140 | #else |
154 | #error One of __BIG_ENDIAN or __LITTLE_ENDIAN must be defined | 141 | #error One of __BIG_ENDIAN or __LITTLE_ENDIAN must be defined |