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authorEli Cohen <eli@mellanox.co.il>2007-05-30 06:14:31 -0400
committerRoland Dreier <rolandd@cisco.com>2007-06-07 14:51:57 -0400
commit09360d5408cb641abff0f32a172a3332f02e8e88 (patch)
tree3f8b0671cf5bafa6b1f2924c63189aa9fe345ed3 /drivers/net/mlx4
parent7244d545c123ff33a3a5bff7fcb96a07778c32d1 (diff)
mlx4_core: Fix CQ context layout
The reserved6 field should be 64 bits, not just 16 bits. Without this, the structure does not match the hardware layout on 32-bit architectures: the db_rec_addr field ends up at offset 52 instead of offset 56. The bug slipped by because the alignment of __be64 members ends up putting it in the right place on x86-64. Signed-off-by: Eli Cohen <eli@mellanox.co.il> Signed-off-by: Roland Dreier <rolandd@cisco.com>
Diffstat (limited to 'drivers/net/mlx4')
-rw-r--r--drivers/net/mlx4/cq.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/net/mlx4/cq.c b/drivers/net/mlx4/cq.c
index 437d78ad0912..39253d0c1590 100644
--- a/drivers/net/mlx4/cq.c
+++ b/drivers/net/mlx4/cq.c
@@ -61,7 +61,7 @@ struct mlx4_cq_context {
61 __be32 solicit_producer_index; 61 __be32 solicit_producer_index;
62 __be32 consumer_index; 62 __be32 consumer_index;
63 __be32 producer_index; 63 __be32 producer_index;
64 u8 reserved6[2]; 64 u32 reserved6[2];
65 __be64 db_rec_addr; 65 __be64 db_rec_addr;
66}; 66};
67 67