diff options
author | David S. Miller <davem@davemloft.net> | 2009-06-15 06:02:23 -0400 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2009-06-15 06:02:23 -0400 |
commit | 9cbc1cb8cd46ce1f7645b9de249b2ce8460129bb (patch) | |
tree | 8d104ec2a459346b99413b0b77421ca7b9936c1a /drivers/net/mlx4 | |
parent | ca44d6e60f9de26281fda203f58b570e1748c015 (diff) | |
parent | 45e3e1935e2857c54783291107d33323b3ef33c8 (diff) |
Merge branch 'master' of master.kernel.org:/pub/scm/linux/kernel/git/torvalds/linux-2.6
Conflicts:
Documentation/feature-removal-schedule.txt
drivers/scsi/fcoe/fcoe.c
net/core/drop_monitor.c
net/core/net-traces.c
Diffstat (limited to 'drivers/net/mlx4')
-rw-r--r-- | drivers/net/mlx4/en_netdev.c | 2 | ||||
-rw-r--r-- | drivers/net/mlx4/eq.c | 4 | ||||
-rw-r--r-- | drivers/net/mlx4/main.c | 14 | ||||
-rw-r--r-- | drivers/net/mlx4/mr.c | 6 | ||||
-rw-r--r-- | drivers/net/mlx4/profile.c | 2 |
5 files changed, 20 insertions, 8 deletions
diff --git a/drivers/net/mlx4/en_netdev.c b/drivers/net/mlx4/en_netdev.c index 0a7e78ade63f..e02bafdd3682 100644 --- a/drivers/net/mlx4/en_netdev.c +++ b/drivers/net/mlx4/en_netdev.c | |||
@@ -367,7 +367,7 @@ static void mlx4_en_set_default_moderation(struct mlx4_en_priv *priv) | |||
367 | int i; | 367 | int i; |
368 | 368 | ||
369 | /* If we haven't received a specific coalescing setting | 369 | /* If we haven't received a specific coalescing setting |
370 | * (module param), we set the moderation paramters as follows: | 370 | * (module param), we set the moderation parameters as follows: |
371 | * - moder_cnt is set to the number of mtu sized packets to | 371 | * - moder_cnt is set to the number of mtu sized packets to |
372 | * satisfy our coelsing target. | 372 | * satisfy our coelsing target. |
373 | * - moder_time is set to a fixed value. | 373 | * - moder_time is set to a fixed value. |
diff --git a/drivers/net/mlx4/eq.c b/drivers/net/mlx4/eq.c index dee188761a3c..b9ceddde46c0 100644 --- a/drivers/net/mlx4/eq.c +++ b/drivers/net/mlx4/eq.c | |||
@@ -497,8 +497,10 @@ static void mlx4_free_irqs(struct mlx4_dev *dev) | |||
497 | if (eq_table->have_irq) | 497 | if (eq_table->have_irq) |
498 | free_irq(dev->pdev->irq, dev); | 498 | free_irq(dev->pdev->irq, dev); |
499 | for (i = 0; i < dev->caps.num_comp_vectors + 1; ++i) | 499 | for (i = 0; i < dev->caps.num_comp_vectors + 1; ++i) |
500 | if (eq_table->eq[i].have_irq) | 500 | if (eq_table->eq[i].have_irq) { |
501 | free_irq(eq_table->eq[i].irq, eq_table->eq + i); | 501 | free_irq(eq_table->eq[i].irq, eq_table->eq + i); |
502 | eq_table->eq[i].have_irq = 0; | ||
503 | } | ||
502 | 504 | ||
503 | kfree(eq_table->irq_names); | 505 | kfree(eq_table->irq_names); |
504 | } | 506 | } |
diff --git a/drivers/net/mlx4/main.c b/drivers/net/mlx4/main.c index 30bea9689694..018348c01193 100644 --- a/drivers/net/mlx4/main.c +++ b/drivers/net/mlx4/main.c | |||
@@ -100,6 +100,10 @@ module_param_named(use_prio, use_prio, bool, 0444); | |||
100 | MODULE_PARM_DESC(use_prio, "Enable steering by VLAN priority on ETH ports " | 100 | MODULE_PARM_DESC(use_prio, "Enable steering by VLAN priority on ETH ports " |
101 | "(0/1, default 0)"); | 101 | "(0/1, default 0)"); |
102 | 102 | ||
103 | static int log_mtts_per_seg = ilog2(MLX4_MTT_ENTRY_PER_SEG); | ||
104 | module_param_named(log_mtts_per_seg, log_mtts_per_seg, int, 0444); | ||
105 | MODULE_PARM_DESC(log_mtts_per_seg, "Log2 number of MTT entries per segment (1-5)"); | ||
106 | |||
103 | int mlx4_check_port_params(struct mlx4_dev *dev, | 107 | int mlx4_check_port_params(struct mlx4_dev *dev, |
104 | enum mlx4_port_type *port_type) | 108 | enum mlx4_port_type *port_type) |
105 | { | 109 | { |
@@ -203,12 +207,13 @@ static int mlx4_dev_cap(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap) | |||
203 | dev->caps.max_cqes = dev_cap->max_cq_sz - 1; | 207 | dev->caps.max_cqes = dev_cap->max_cq_sz - 1; |
204 | dev->caps.reserved_cqs = dev_cap->reserved_cqs; | 208 | dev->caps.reserved_cqs = dev_cap->reserved_cqs; |
205 | dev->caps.reserved_eqs = dev_cap->reserved_eqs; | 209 | dev->caps.reserved_eqs = dev_cap->reserved_eqs; |
210 | dev->caps.mtts_per_seg = 1 << log_mtts_per_seg; | ||
206 | dev->caps.reserved_mtts = DIV_ROUND_UP(dev_cap->reserved_mtts, | 211 | dev->caps.reserved_mtts = DIV_ROUND_UP(dev_cap->reserved_mtts, |
207 | MLX4_MTT_ENTRY_PER_SEG); | 212 | dev->caps.mtts_per_seg); |
208 | dev->caps.reserved_mrws = dev_cap->reserved_mrws; | 213 | dev->caps.reserved_mrws = dev_cap->reserved_mrws; |
209 | dev->caps.reserved_uars = dev_cap->reserved_uars; | 214 | dev->caps.reserved_uars = dev_cap->reserved_uars; |
210 | dev->caps.reserved_pds = dev_cap->reserved_pds; | 215 | dev->caps.reserved_pds = dev_cap->reserved_pds; |
211 | dev->caps.mtt_entry_sz = MLX4_MTT_ENTRY_PER_SEG * dev_cap->mtt_entry_sz; | 216 | dev->caps.mtt_entry_sz = dev->caps.mtts_per_seg * dev_cap->mtt_entry_sz; |
212 | dev->caps.max_msg_sz = dev_cap->max_msg_sz; | 217 | dev->caps.max_msg_sz = dev_cap->max_msg_sz; |
213 | dev->caps.page_size_cap = ~(u32) (dev_cap->min_page_sz - 1); | 218 | dev->caps.page_size_cap = ~(u32) (dev_cap->min_page_sz - 1); |
214 | dev->caps.flags = dev_cap->flags; | 219 | dev->caps.flags = dev_cap->flags; |
@@ -1304,6 +1309,11 @@ static int __init mlx4_verify_params(void) | |||
1304 | return -1; | 1309 | return -1; |
1305 | } | 1310 | } |
1306 | 1311 | ||
1312 | if ((log_mtts_per_seg < 1) || (log_mtts_per_seg > 5)) { | ||
1313 | printk(KERN_WARNING "mlx4_core: bad log_mtts_per_seg: %d\n", log_mtts_per_seg); | ||
1314 | return -1; | ||
1315 | } | ||
1316 | |||
1307 | return 0; | 1317 | return 0; |
1308 | } | 1318 | } |
1309 | 1319 | ||
diff --git a/drivers/net/mlx4/mr.c b/drivers/net/mlx4/mr.c index 0a467785f065..5887e4764d22 100644 --- a/drivers/net/mlx4/mr.c +++ b/drivers/net/mlx4/mr.c | |||
@@ -209,7 +209,7 @@ int mlx4_mtt_init(struct mlx4_dev *dev, int npages, int page_shift, | |||
209 | } else | 209 | } else |
210 | mtt->page_shift = page_shift; | 210 | mtt->page_shift = page_shift; |
211 | 211 | ||
212 | for (mtt->order = 0, i = MLX4_MTT_ENTRY_PER_SEG; i < npages; i <<= 1) | 212 | for (mtt->order = 0, i = dev->caps.mtts_per_seg; i < npages; i <<= 1) |
213 | ++mtt->order; | 213 | ++mtt->order; |
214 | 214 | ||
215 | mtt->first_seg = mlx4_alloc_mtt_range(dev, mtt->order); | 215 | mtt->first_seg = mlx4_alloc_mtt_range(dev, mtt->order); |
@@ -350,7 +350,7 @@ int mlx4_mr_enable(struct mlx4_dev *dev, struct mlx4_mr *mr) | |||
350 | mpt_entry->pd_flags |= cpu_to_be32(MLX4_MPT_PD_FLAG_FAST_REG | | 350 | mpt_entry->pd_flags |= cpu_to_be32(MLX4_MPT_PD_FLAG_FAST_REG | |
351 | MLX4_MPT_PD_FLAG_RAE); | 351 | MLX4_MPT_PD_FLAG_RAE); |
352 | mpt_entry->mtt_sz = cpu_to_be32((1 << mr->mtt.order) * | 352 | mpt_entry->mtt_sz = cpu_to_be32((1 << mr->mtt.order) * |
353 | MLX4_MTT_ENTRY_PER_SEG); | 353 | dev->caps.mtts_per_seg); |
354 | } else { | 354 | } else { |
355 | mpt_entry->flags |= cpu_to_be32(MLX4_MPT_FLAG_SW_OWNS); | 355 | mpt_entry->flags |= cpu_to_be32(MLX4_MPT_FLAG_SW_OWNS); |
356 | } | 356 | } |
@@ -391,7 +391,7 @@ static int mlx4_write_mtt_chunk(struct mlx4_dev *dev, struct mlx4_mtt *mtt, | |||
391 | (start_index + npages - 1) / (PAGE_SIZE / sizeof (u64))) | 391 | (start_index + npages - 1) / (PAGE_SIZE / sizeof (u64))) |
392 | return -EINVAL; | 392 | return -EINVAL; |
393 | 393 | ||
394 | if (start_index & (MLX4_MTT_ENTRY_PER_SEG - 1)) | 394 | if (start_index & (dev->caps.mtts_per_seg - 1)) |
395 | return -EINVAL; | 395 | return -EINVAL; |
396 | 396 | ||
397 | mtts = mlx4_table_find(&priv->mr_table.mtt_table, mtt->first_seg + | 397 | mtts = mlx4_table_find(&priv->mr_table.mtt_table, mtt->first_seg + |
diff --git a/drivers/net/mlx4/profile.c b/drivers/net/mlx4/profile.c index cebdf3243ca1..bd22df95adf9 100644 --- a/drivers/net/mlx4/profile.c +++ b/drivers/net/mlx4/profile.c | |||
@@ -98,7 +98,7 @@ u64 mlx4_make_profile(struct mlx4_dev *dev, | |||
98 | profile[MLX4_RES_EQ].size = dev_cap->eqc_entry_sz; | 98 | profile[MLX4_RES_EQ].size = dev_cap->eqc_entry_sz; |
99 | profile[MLX4_RES_DMPT].size = dev_cap->dmpt_entry_sz; | 99 | profile[MLX4_RES_DMPT].size = dev_cap->dmpt_entry_sz; |
100 | profile[MLX4_RES_CMPT].size = dev_cap->cmpt_entry_sz; | 100 | profile[MLX4_RES_CMPT].size = dev_cap->cmpt_entry_sz; |
101 | profile[MLX4_RES_MTT].size = MLX4_MTT_ENTRY_PER_SEG * dev_cap->mtt_entry_sz; | 101 | profile[MLX4_RES_MTT].size = dev->caps.mtts_per_seg * dev_cap->mtt_entry_sz; |
102 | profile[MLX4_RES_MCG].size = MLX4_MGM_ENTRY_SIZE; | 102 | profile[MLX4_RES_MCG].size = MLX4_MGM_ENTRY_SIZE; |
103 | 103 | ||
104 | profile[MLX4_RES_QP].num = request->num_qp; | 104 | profile[MLX4_RES_QP].num = request->num_qp; |