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authorJack Morgenstein <jackm@dev.mellanox.co.il>2007-08-01 05:29:05 -0400
committerRoland Dreier <rolandd@cisco.com>2007-10-09 22:59:16 -0400
commit8ad11fb6b0739e704953e2b0aed453bf7d75d4f6 (patch)
tree671838bc9293987efba214f2d645d7e40befc5a8 /drivers/net/mlx4
parentd7bb58fb1c0e7264a7261c7d0304121ef9402e94 (diff)
IB/mlx4: Implement FMRs
Implement FMRs for mlx4. This is an adaptation of code from mthca. Signed-off-by: Jack Morgenstein <jackm@dev.mellanox.co.il> Signed-off-by: Michael S. Tsirkin <mst@dev.mellanox.co.il> Signed-off-by: Roland Dreier <rolandd@cisco.com>
Diffstat (limited to 'drivers/net/mlx4')
-rw-r--r--drivers/net/mlx4/mr.c165
1 files changed, 165 insertions, 0 deletions
diff --git a/drivers/net/mlx4/mr.c b/drivers/net/mlx4/mr.c
index 3cc98c699aaf..4bc39e65015a 100644
--- a/drivers/net/mlx4/mr.c
+++ b/drivers/net/mlx4/mr.c
@@ -68,6 +68,9 @@ struct mlx4_mpt_entry {
68 68
69#define MLX4_MTT_FLAG_PRESENT 1 69#define MLX4_MTT_FLAG_PRESENT 1
70 70
71#define MLX4_MPT_STATUS_SW 0xF0
72#define MLX4_MPT_STATUS_HW 0x00
73
71static u32 mlx4_buddy_alloc(struct mlx4_buddy *buddy, int order) 74static u32 mlx4_buddy_alloc(struct mlx4_buddy *buddy, int order)
72{ 75{
73 int o; 76 int o;
@@ -469,3 +472,165 @@ void mlx4_cleanup_mr_table(struct mlx4_dev *dev)
469 mlx4_buddy_cleanup(&mr_table->mtt_buddy); 472 mlx4_buddy_cleanup(&mr_table->mtt_buddy);
470 mlx4_bitmap_cleanup(&mr_table->mpt_bitmap); 473 mlx4_bitmap_cleanup(&mr_table->mpt_bitmap);
471} 474}
475
476static inline int mlx4_check_fmr(struct mlx4_fmr *fmr, u64 *page_list,
477 int npages, u64 iova)
478{
479 int i, page_mask;
480
481 if (npages > fmr->max_pages)
482 return -EINVAL;
483
484 page_mask = (1 << fmr->page_shift) - 1;
485
486 /* We are getting page lists, so va must be page aligned. */
487 if (iova & page_mask)
488 return -EINVAL;
489
490 /* Trust the user not to pass misaligned data in page_list */
491 if (0)
492 for (i = 0; i < npages; ++i) {
493 if (page_list[i] & ~page_mask)
494 return -EINVAL;
495 }
496
497 if (fmr->maps >= fmr->max_maps)
498 return -EINVAL;
499
500 return 0;
501}
502
503int mlx4_map_phys_fmr(struct mlx4_dev *dev, struct mlx4_fmr *fmr, u64 *page_list,
504 int npages, u64 iova, u32 *lkey, u32 *rkey)
505{
506 u32 key;
507 int i, err;
508
509 err = mlx4_check_fmr(fmr, page_list, npages, iova);
510 if (err)
511 return err;
512
513 ++fmr->maps;
514
515 key = key_to_hw_index(fmr->mr.key);
516 key += dev->caps.num_mpts;
517 *lkey = *rkey = fmr->mr.key = hw_index_to_key(key);
518
519 *(u8 *) fmr->mpt = MLX4_MPT_STATUS_SW;
520
521 /* Make sure MPT status is visible before writing MTT entries */
522 wmb();
523
524 for (i = 0; i < npages; ++i)
525 fmr->mtts[i] = cpu_to_be64(page_list[i] | MLX4_MTT_FLAG_PRESENT);
526
527 dma_sync_single(&dev->pdev->dev, fmr->dma_handle,
528 npages * sizeof(u64), DMA_TO_DEVICE);
529
530 fmr->mpt->key = cpu_to_be32(key);
531 fmr->mpt->lkey = cpu_to_be32(key);
532 fmr->mpt->length = cpu_to_be64(npages * (1ull << fmr->page_shift));
533 fmr->mpt->start = cpu_to_be64(iova);
534
535 /* Make MTT entries are visible before setting MPT status */
536 wmb();
537
538 *(u8 *) fmr->mpt = MLX4_MPT_STATUS_HW;
539
540 /* Make sure MPT status is visible before consumer can use FMR */
541 wmb();
542
543 return 0;
544}
545EXPORT_SYMBOL_GPL(mlx4_map_phys_fmr);
546
547int mlx4_fmr_alloc(struct mlx4_dev *dev, u32 pd, u32 access, int max_pages,
548 int max_maps, u8 page_shift, struct mlx4_fmr *fmr)
549{
550 struct mlx4_priv *priv = mlx4_priv(dev);
551 u64 mtt_seg;
552 int err = -ENOMEM;
553
554 if (page_shift < 12 || page_shift >= 32)
555 return -EINVAL;
556
557 /* All MTTs must fit in the same page */
558 if (max_pages * sizeof *fmr->mtts > PAGE_SIZE)
559 return -EINVAL;
560
561 fmr->page_shift = page_shift;
562 fmr->max_pages = max_pages;
563 fmr->max_maps = max_maps;
564 fmr->maps = 0;
565
566 err = mlx4_mr_alloc(dev, pd, 0, 0, access, max_pages,
567 page_shift, &fmr->mr);
568 if (err)
569 return err;
570
571 mtt_seg = fmr->mr.mtt.first_seg * dev->caps.mtt_entry_sz;
572
573 fmr->mtts = mlx4_table_find(&priv->mr_table.mtt_table,
574 fmr->mr.mtt.first_seg,
575 &fmr->dma_handle);
576 if (!fmr->mtts) {
577 err = -ENOMEM;
578 goto err_free;
579 }
580
581 fmr->mpt = mlx4_table_find(&priv->mr_table.dmpt_table,
582 key_to_hw_index(fmr->mr.key), NULL);
583 if (!fmr->mpt) {
584 err = -ENOMEM;
585 goto err_free;
586 }
587
588 return 0;
589
590err_free:
591 mlx4_mr_free(dev, &fmr->mr);
592 return err;
593}
594EXPORT_SYMBOL_GPL(mlx4_fmr_alloc);
595
596int mlx4_fmr_enable(struct mlx4_dev *dev, struct mlx4_fmr *fmr)
597{
598 return mlx4_mr_enable(dev, &fmr->mr);
599}
600EXPORT_SYMBOL_GPL(mlx4_fmr_enable);
601
602void mlx4_fmr_unmap(struct mlx4_dev *dev, struct mlx4_fmr *fmr,
603 u32 *lkey, u32 *rkey)
604{
605 u32 key;
606
607 if (!fmr->maps)
608 return;
609
610 key = key_to_hw_index(fmr->mr.key);
611 key &= dev->caps.num_mpts - 1;
612 *lkey = *rkey = fmr->mr.key = hw_index_to_key(key);
613
614 fmr->maps = 0;
615
616 *(u8 *) fmr->mpt = MLX4_MPT_STATUS_SW;
617}
618EXPORT_SYMBOL_GPL(mlx4_fmr_unmap);
619
620int mlx4_fmr_free(struct mlx4_dev *dev, struct mlx4_fmr *fmr)
621{
622 if (fmr->maps)
623 return -EBUSY;
624
625 fmr->mr.enabled = 0;
626 mlx4_mr_free(dev, &fmr->mr);
627
628 return 0;
629}
630EXPORT_SYMBOL_GPL(mlx4_fmr_free);
631
632int mlx4_SYNC_TPT(struct mlx4_dev *dev)
633{
634 return mlx4_cmd(dev, 0, 0, 0, MLX4_CMD_SYNC_TPT, 1000);
635}
636EXPORT_SYMBOL_GPL(mlx4_SYNC_TPT);