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authorRoland Dreier <rolandd@cisco.com>2008-07-23 11:12:26 -0400
committerRoland Dreier <rolandd@cisco.com>2008-07-23 11:12:26 -0400
commit95d04f0735b4fc837bff9aedcc3f3efb20ddc3d1 (patch)
tree900cd7debae9827c3e20f5199307ae27e83ba862 /drivers/net/mlx4/mr.c
parente4044cfc493338cd09870bd45dc646336bb66e9f (diff)
IB/mlx4: Add support for memory management extensions and local DMA L_Key
Add support for the following operations to mlx4 when device firmware supports them: - Send with invalidate and local invalidate send queue work requests; - Allocate/free fast register MRs; - Allocate/free fast register MR page lists; - Fast register MR send queue work requests; - Local DMA L_Key. Signed-off-by: Roland Dreier <rolandd@cisco.com>
Diffstat (limited to 'drivers/net/mlx4/mr.c')
-rw-r--r--drivers/net/mlx4/mr.c23
1 files changed, 18 insertions, 5 deletions
diff --git a/drivers/net/mlx4/mr.c b/drivers/net/mlx4/mr.c
index b3ea93b98689..a3c04c5f12c2 100644
--- a/drivers/net/mlx4/mr.c
+++ b/drivers/net/mlx4/mr.c
@@ -47,7 +47,7 @@ struct mlx4_mpt_entry {
47 __be32 flags; 47 __be32 flags;
48 __be32 qpn; 48 __be32 qpn;
49 __be32 key; 49 __be32 key;
50 __be32 pd; 50 __be32 pd_flags;
51 __be64 start; 51 __be64 start;
52 __be64 length; 52 __be64 length;
53 __be32 lkey; 53 __be32 lkey;
@@ -61,11 +61,15 @@ struct mlx4_mpt_entry {
61} __attribute__((packed)); 61} __attribute__((packed));
62 62
63#define MLX4_MPT_FLAG_SW_OWNS (0xfUL << 28) 63#define MLX4_MPT_FLAG_SW_OWNS (0xfUL << 28)
64#define MLX4_MPT_FLAG_FREE (0x3UL << 28)
64#define MLX4_MPT_FLAG_MIO (1 << 17) 65#define MLX4_MPT_FLAG_MIO (1 << 17)
65#define MLX4_MPT_FLAG_BIND_ENABLE (1 << 15) 66#define MLX4_MPT_FLAG_BIND_ENABLE (1 << 15)
66#define MLX4_MPT_FLAG_PHYSICAL (1 << 9) 67#define MLX4_MPT_FLAG_PHYSICAL (1 << 9)
67#define MLX4_MPT_FLAG_REGION (1 << 8) 68#define MLX4_MPT_FLAG_REGION (1 << 8)
68 69
70#define MLX4_MPT_PD_FLAG_FAST_REG (1 << 26)
71#define MLX4_MPT_PD_FLAG_EN_INV (3 << 24)
72
69#define MLX4_MTT_FLAG_PRESENT 1 73#define MLX4_MTT_FLAG_PRESENT 1
70 74
71#define MLX4_MPT_STATUS_SW 0xF0 75#define MLX4_MPT_STATUS_SW 0xF0
@@ -324,21 +328,30 @@ int mlx4_mr_enable(struct mlx4_dev *dev, struct mlx4_mr *mr)
324 328
325 memset(mpt_entry, 0, sizeof *mpt_entry); 329 memset(mpt_entry, 0, sizeof *mpt_entry);
326 330
327 mpt_entry->flags = cpu_to_be32(MLX4_MPT_FLAG_SW_OWNS | 331 mpt_entry->flags = cpu_to_be32(MLX4_MPT_FLAG_MIO |
328 MLX4_MPT_FLAG_MIO |
329 MLX4_MPT_FLAG_REGION | 332 MLX4_MPT_FLAG_REGION |
330 mr->access); 333 mr->access);
331 334
332 mpt_entry->key = cpu_to_be32(key_to_hw_index(mr->key)); 335 mpt_entry->key = cpu_to_be32(key_to_hw_index(mr->key));
333 mpt_entry->pd = cpu_to_be32(mr->pd); 336 mpt_entry->pd_flags = cpu_to_be32(mr->pd | MLX4_MPT_PD_FLAG_EN_INV);
334 mpt_entry->start = cpu_to_be64(mr->iova); 337 mpt_entry->start = cpu_to_be64(mr->iova);
335 mpt_entry->length = cpu_to_be64(mr->size); 338 mpt_entry->length = cpu_to_be64(mr->size);
336 mpt_entry->entity_size = cpu_to_be32(mr->mtt.page_shift); 339 mpt_entry->entity_size = cpu_to_be32(mr->mtt.page_shift);
340
337 if (mr->mtt.order < 0) { 341 if (mr->mtt.order < 0) {
338 mpt_entry->flags |= cpu_to_be32(MLX4_MPT_FLAG_PHYSICAL); 342 mpt_entry->flags |= cpu_to_be32(MLX4_MPT_FLAG_PHYSICAL);
339 mpt_entry->mtt_seg = 0; 343 mpt_entry->mtt_seg = 0;
340 } else 344 } else {
341 mpt_entry->mtt_seg = cpu_to_be64(mlx4_mtt_addr(dev, &mr->mtt)); 345 mpt_entry->mtt_seg = cpu_to_be64(mlx4_mtt_addr(dev, &mr->mtt));
346 }
347
348 if (mr->mtt.order >= 0 && mr->mtt.page_shift == 0) {
349 /* fast register MR in free state */
350 mpt_entry->flags |= cpu_to_be32(MLX4_MPT_FLAG_FREE);
351 mpt_entry->pd_flags |= cpu_to_be32(MLX4_MPT_PD_FLAG_FAST_REG);
352 } else {
353 mpt_entry->flags |= cpu_to_be32(MLX4_MPT_FLAG_SW_OWNS);
354 }
342 355
343 err = mlx4_SW2HW_MPT(dev, mailbox, 356 err = mlx4_SW2HW_MPT(dev, mailbox,
344 key_to_hw_index(mr->key) & (dev->caps.num_mpts - 1)); 357 key_to_hw_index(mr->key) & (dev->caps.num_mpts - 1));