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authorYevgeny Petrilin <yevgenyp@mellanox.co.il>2008-10-22 13:25:29 -0400
committerRoland Dreier <rolandd@cisco.com>2008-10-22 13:25:29 -0400
commit93fc9e1bb6507dde945c2eab68c93e1066ac3691 (patch)
treeaa495ec31b7372580f9ec50acead1d170fd70aab /drivers/net/mlx4/fw.h
parenta3cdcbfa8fb1fccfe48d359da86e99546610c562 (diff)
mlx4_core: Support multiple pre-reserved QP regions
For ethernet support, we need to reserve QPs for the ethernet and fibre channel driver. The QPs are reserved at the end of the QP table. (This way we assure that they are aligned to their size) We need to consider these reserved ranges in bitmap creation, so we extend the mlx4 bitmap utility functions to allow reserved ranges at both the bottom and the top of the range. Signed-off-by: Yevgeny Petrilin <yevgenyp@mellanox.co.il> Signed-off-by: Roland Dreier <rolandd@cisco.com>
Diffstat (limited to 'drivers/net/mlx4/fw.h')
-rw-r--r--drivers/net/mlx4/fw.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/net/mlx4/fw.h b/drivers/net/mlx4/fw.h
index decbb5c2ad41..c34e726d66e4 100644
--- a/drivers/net/mlx4/fw.h
+++ b/drivers/net/mlx4/fw.h
@@ -102,6 +102,8 @@ struct mlx4_dev_cap {
102 u32 reserved_lkey; 102 u32 reserved_lkey;
103 u64 max_icm_sz; 103 u64 max_icm_sz;
104 int max_gso_sz; 104 int max_gso_sz;
105 u8 log_max_macs[MLX4_MAX_PORTS + 1];
106 u8 log_max_vlans[MLX4_MAX_PORTS + 1];
105}; 107};
106 108
107struct mlx4_adapter { 109struct mlx4_adapter {