diff options
author | Yevgeny Petrilin <yevgenyp@mellanox.co.il> | 2010-08-23 23:46:23 -0400 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2010-08-24 17:54:51 -0400 |
commit | 7699517db435fd24143bd32dd644275e3eeb4c86 (patch) | |
tree | e39bad6758eb4172cd4bafe481803c8f752a2630 /drivers/net/mlx4/fw.c | |
parent | e7c1c2c46201e46f8ce817196507d2ffd3dafd8e (diff) |
mlx4_en: Fixing report in Ethtool get_settings
The report now based on query from FW, giving the correct tranciever type
and link speed.
Signed-off-by: Yevgeny Petrilin <yevgenyp@mellanox.co.il>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/mlx4/fw.c')
-rw-r--r-- | drivers/net/mlx4/fw.c | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/drivers/net/mlx4/fw.c b/drivers/net/mlx4/fw.c index a87bf3c97055..515c6348f32b 100644 --- a/drivers/net/mlx4/fw.c +++ b/drivers/net/mlx4/fw.c | |||
@@ -141,6 +141,7 @@ int mlx4_QUERY_DEV_CAP(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap) | |||
141 | struct mlx4_cmd_mailbox *mailbox; | 141 | struct mlx4_cmd_mailbox *mailbox; |
142 | u32 *outbox; | 142 | u32 *outbox; |
143 | u8 field; | 143 | u8 field; |
144 | u32 field32; | ||
144 | u16 size; | 145 | u16 size; |
145 | u16 stat_rate; | 146 | u16 stat_rate; |
146 | int err; | 147 | int err; |
@@ -368,6 +369,9 @@ int mlx4_QUERY_DEV_CAP(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap) | |||
368 | #define QUERY_PORT_MAX_MACVLAN_OFFSET 0x0a | 369 | #define QUERY_PORT_MAX_MACVLAN_OFFSET 0x0a |
369 | #define QUERY_PORT_MAX_VL_OFFSET 0x0b | 370 | #define QUERY_PORT_MAX_VL_OFFSET 0x0b |
370 | #define QUERY_PORT_MAC_OFFSET 0x10 | 371 | #define QUERY_PORT_MAC_OFFSET 0x10 |
372 | #define QUERY_PORT_TRANS_VENDOR_OFFSET 0x18 | ||
373 | #define QUERY_PORT_WAVELENGTH_OFFSET 0x1c | ||
374 | #define QUERY_PORT_TRANS_CODE_OFFSET 0x20 | ||
371 | 375 | ||
372 | for (i = 1; i <= dev_cap->num_ports; ++i) { | 376 | for (i = 1; i <= dev_cap->num_ports; ++i) { |
373 | err = mlx4_cmd_box(dev, 0, mailbox->dma, i, 0, MLX4_CMD_QUERY_PORT, | 377 | err = mlx4_cmd_box(dev, 0, mailbox->dma, i, 0, MLX4_CMD_QUERY_PORT, |
@@ -391,6 +395,11 @@ int mlx4_QUERY_DEV_CAP(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap) | |||
391 | dev_cap->log_max_vlans[i] = field >> 4; | 395 | dev_cap->log_max_vlans[i] = field >> 4; |
392 | MLX4_GET(dev_cap->eth_mtu[i], outbox, QUERY_PORT_ETH_MTU_OFFSET); | 396 | MLX4_GET(dev_cap->eth_mtu[i], outbox, QUERY_PORT_ETH_MTU_OFFSET); |
393 | MLX4_GET(dev_cap->def_mac[i], outbox, QUERY_PORT_MAC_OFFSET); | 397 | MLX4_GET(dev_cap->def_mac[i], outbox, QUERY_PORT_MAC_OFFSET); |
398 | MLX4_GET(field32, outbox, QUERY_PORT_TRANS_VENDOR_OFFSET); | ||
399 | dev_cap->trans_type[i] = field32 >> 24; | ||
400 | dev_cap->vendor_oui[i] = field32 & 0xffffff; | ||
401 | MLX4_GET(dev_cap->wavelength[i], outbox, QUERY_PORT_WAVELENGTH_OFFSET); | ||
402 | MLX4_GET(dev_cap->trans_code[i], outbox, QUERY_PORT_TRANS_CODE_OFFSET); | ||
394 | } | 403 | } |
395 | } | 404 | } |
396 | 405 | ||